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1; RUN: llc -mtriple=mips -mattr=+o32,+fp64,+mips32r2 < %s \2; RUN: | FileCheck --check-prefix=O32-FP64-INV %s3; RUN: llc -mtriple=mipsel -mattr=+o32,+fp64,+mips32r2 < %s \4; RUN: | FileCheck --check-prefix=O32-FP64-INV %s5 6; RUN: llc -mtriple=mips -mattr=+o32,+fpxx < %s | FileCheck --check-prefix=O32-FPXX %s7; RUN: llc -mtriple=mipsel -mattr=+o32,+fpxx < %s | FileCheck --check-prefix=O32-FPXX %s8 9; RUN-TODO: llc -mtriple=mips64 -mattr=+o32,+fpxx < %s | FileCheck --check-prefix=O32-FPXX %s10; RUN-TODO: llc -mtriple=mips64el -mattr=+o32,+fpxx < %s | FileCheck --check-prefix=O32-FPXX %s11 12define void @fpu_clobber() nounwind {13entry:14 call void asm "# Clobber", "~{$f21}"()15 ret void16}17 18; O32-FPXX-LABEL: fpu_clobber:19 20; O32-FPXX: addiu $sp, $sp, -821 22; O32-FP64-INV-NOT: sdc1 $f20,23; O32-FPXX-DAG: sdc1 [[F20:\$f20]], [[OFF20:[0-9]+]]($sp)24; O32-FPXX-DAG: ldc1 [[F20]], [[OFF20]]($sp)25 26; O32-FPXX: addiu $sp, $sp, 827