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1; RUN: llc -mtriple=mips   < %s | FileCheck --check-prefixes=ALL,O32 %s2; RUN: llc -mtriple=mipsel < %s | FileCheck --check-prefixes=ALL,O32 %s3; RUN: llc -mtriple=mips   < %s | FileCheck --check-prefixes=ALL,O32-INV %s4; RUN: llc -mtriple=mipsel < %s | FileCheck --check-prefixes=ALL,O32-INV %s5 6; RUN-TODO: llc -mtriple=mips64 -target-abi o32 < %s \7; RUN-TODO:   | FileCheck --check-prefixes=ALL,O32 %s8; RUN-TODO: llc -mtriple=mips64el -target-abi o32 < %s \9; RUN-TODO:   | FileCheck --check-prefixes=ALL,O32 %s10; RUN-TODO: llc -mtriple=mips64 -target-abi o32 < %s \11; RUN-TODO:   | FileCheck --check-prefixes=ALL,O32-INV %s12; RUN-TODO: llc -mtriple=mips64el -target-abi o32 < %s \13; RUN-TODO:   | FileCheck --check-prefixes=ALL,O32-INV %s14 15; RUN: llc -mtriple=mips64 -target-abi n32 < %s \16; RUN:   | FileCheck --check-prefixes=ALL,N32 %s17; RUN: llc -mtriple=mips64el -target-abi n32 < %s \18; RUN:   | FileCheck --check-prefixes=ALL,N32 %s19; RUN: llc -mtriple=mips64 -target-abi n32 < %s \20; RUN:   | FileCheck --check-prefixes=ALL,N32-INV %s21; RUN: llc -mtriple=mips64el -target-abi n32 < %s \22; RUN:   | FileCheck --check-prefixes=ALL,N32-INV %s23 24; RUN: llc -mtriple=mips64 -target-abi n64 < %s \25; RUN:   | FileCheck --check-prefixes=ALL,N64 %s26; RUN: llc -mtriple=mips64el -target-abi n64 < %s \27; RUN:   | FileCheck --check-prefixes=ALL,N64 %s28; RUN: llc -mtriple=mips64 -target-abi n64 < %s \29; RUN:   | FileCheck --check-prefixes=ALL,N64-INV %s30; RUN: llc -mtriple=mips64el -target-abi n64 < %s \31; RUN:   | FileCheck --check-prefixes=ALL,N64-INV %s32 33; Test the callee-saved registers are callee-saved as specified by section34; 2 of the MIPSpro N32 Handbook and section 3 of the SYSV ABI spec.35 36define void @gpr_clobber() nounwind {37entry:38        ; Clobbering the stack pointer is a bad idea so we'll skip that one39        call void asm "# Clobber", "~{$0},~{$1},~{$2},~{$3},~{$4},~{$5},~{$6},~{$7},~{$8},~{$9},~{$10},~{$11},~{$12},~{$13},~{$14},~{$15},~{$16},~{$17},~{$18},~{$19},~{$20},~{$21},~{$22},~{$23},~{$24},~{$25},~{$26},~{$27},~{$28},~{$30},~{$31}"()40        ret void41}42 43; ALL-LABEL: gpr_clobber:44; O32:           addiu $sp, $sp, -4045; O32-INV-NOT:   sw $0,46; O32-INV-NOT:   sw $1,47; O32-INV-NOT:   sw $2,48; O32-INV-NOT:   sw $3,49; O32-INV-NOT:   sw $4,50; O32-INV-NOT:   sw $5,51; O32-INV-NOT:   sw $6,52; O32-INV-NOT:   sw $7,53; O32-INV-NOT:   sw $8,54; O32-INV-NOT:   sw $9,55; O32-INV-NOT:   sw $10,56; O32-INV-NOT:   sw $11,57; O32-INV-NOT:   sw $12,58; O32-INV-NOT:   sw $13,59; O32-INV-NOT:   sw $14,60; O32-INV-NOT:   sw $15,61; O32-DAG:       sw [[G16:\$16]], [[OFF16:[0-9]+]]($sp)62; O32-DAG:       sw [[G17:\$17]], [[OFF17:[0-9]+]]($sp)63; O32-DAG:       sw [[G18:\$18]], [[OFF18:[0-9]+]]($sp)64; O32-DAG:       sw [[G19:\$19]], [[OFF19:[0-9]+]]($sp)65; O32-DAG:       sw [[G20:\$20]], [[OFF20:[0-9]+]]($sp)66; O32-DAG:       sw [[G21:\$21]], [[OFF21:[0-9]+]]($sp)67; O32-DAG:       sw [[G22:\$22]], [[OFF22:[0-9]+]]($sp)68; O32-DAG:       sw [[G23:\$23]], [[OFF23:[0-9]+]]($sp)69; O32-INV-NOT:   sw $24,70; O32-INV-NOT:   sw $25,71; O32-INV-NOT:   sw $26,72; O32-INV-NOT:   sw $27,73; O32-INV-NOT:   sw $28,74; O32-INV-NOT:   sw $29,75; O32-DAG:       sw [[G30:\$fp]], [[OFF30:[0-9]+]]($sp)76; O32-DAG:       sw [[G31:\$ra]], [[OFF31:[0-9]+]]($sp)77; O32-DAG:       lw [[G16]], [[OFF16]]($sp)78; O32-DAG:       lw [[G17]], [[OFF17]]($sp)79; O32-DAG:       lw [[G18]], [[OFF18]]($sp)80; O32-DAG:       lw [[G19]], [[OFF19]]($sp)81; O32-DAG:       lw [[G20]], [[OFF20]]($sp)82; O32-DAG:       lw [[G21]], [[OFF21]]($sp)83; O32-DAG:       lw [[G22]], [[OFF22]]($sp)84; O32-DAG:       lw [[G23]], [[OFF23]]($sp)85; O32-DAG:       lw [[G30]], [[OFF30]]($sp)86; O32-DAG:       lw [[G31]], [[OFF31]]($sp)87; O32:           addiu $sp, $sp, 4088 89; N32:           addiu $sp, $sp, -9690; N32-INV-NOT:   sd $0,91; N32-INV-NOT:   sd $1,92; N32-INV-NOT:   sd $2,93; N32-INV-NOT:   sd $3,94; N32-INV-NOT:   sd $4,95; N32-INV-NOT:   sd $5,96; N32-INV-NOT:   sd $6,97; N32-INV-NOT:   sd $7,98; N32-INV-NOT:   sd $8,99; N32-INV-NOT:   sd $9,100; N32-INV-NOT:   sd $10,101; N32-INV-NOT:   sd $11,102; N32-INV-NOT:   sd $12,103; N32-INV-NOT:   sd $13,104; N32-INV-NOT:   sd $14,105; N32-INV-NOT:   sd $15,106; N32-DAG:       sd [[G16:\$16]], [[OFF16:[0-9]+]]($sp)107; N32-DAG:       sd [[G17:\$17]], [[OFF17:[0-9]+]]($sp)108; N32-DAG:       sd [[G18:\$18]], [[OFF18:[0-9]+]]($sp)109; N32-DAG:       sd [[G19:\$19]], [[OFF19:[0-9]+]]($sp)110; N32-DAG:       sd [[G20:\$20]], [[OFF20:[0-9]+]]($sp)111; N32-DAG:       sd [[G21:\$21]], [[OFF21:[0-9]+]]($sp)112; N32-DAG:       sd [[G22:\$22]], [[OFF22:[0-9]+]]($sp)113; N32-DAG:       sd [[G23:\$23]], [[OFF23:[0-9]+]]($sp)114; N32-INV-NOT:   sd $24,115; N32-INV-NOT:   sd $25,116; N32-INV-NOT:   sd $26,117; N32-INV-NOT:   sd $27,118; N32-DAG:       sd [[G28:\$gp]], [[OFF28:[0-9]+]]($sp)119; N32-INV-NOT:   sd $29,120; N32-DAG:       sd [[G30:\$fp]], [[OFF30:[0-9]+]]($sp)121; N32-DAG:       sd [[G31:\$ra]], [[OFF31:[0-9]+]]($sp)122; N32-DAG:       ld [[G16]], [[OFF16]]($sp)123; N32-DAG:       ld [[G17]], [[OFF17]]($sp)124; N32-DAG:       ld [[G18]], [[OFF18]]($sp)125; N32-DAG:       ld [[G19]], [[OFF19]]($sp)126; N32-DAG:       ld [[G20]], [[OFF20]]($sp)127; N32-DAG:       ld [[G21]], [[OFF21]]($sp)128; N32-DAG:       ld [[G22]], [[OFF22]]($sp)129; N32-DAG:       ld [[G23]], [[OFF23]]($sp)130; N32-DAG:       ld [[G28]], [[OFF28]]($sp)131; N32-DAG:       ld [[G30]], [[OFF30]]($sp)132; N32-DAG:       ld [[G31]], [[OFF31]]($sp)133; N32:           addiu $sp, $sp, 96134 135; N64:           daddiu $sp, $sp, -96136; N64-INV-NOT:   sd $0,137; N64-INV-NOT:   sd $1,138; N64-INV-NOT:   sd $2,139; N64-INV-NOT:   sd $3,140; N64-INV-NOT:   sd $4,141; N64-INV-NOT:   sd $5,142; N64-INV-NOT:   sd $6,143; N64-INV-NOT:   sd $7,144; N64-INV-NOT:   sd $8,145; N64-INV-NOT:   sd $9,146; N64-INV-NOT:   sd $10,147; N64-INV-NOT:   sd $11,148; N64-INV-NOT:   sd $12,149; N64-INV-NOT:   sd $13,150; N64-INV-NOT:   sd $14,151; N64-INV-NOT:   sd $15,152; N64-DAG:       sd [[G16:\$16]], [[OFF16:[0-9]+]]($sp)153; N64-DAG:       sd [[G17:\$17]], [[OFF17:[0-9]+]]($sp)154; N64-DAG:       sd [[G18:\$18]], [[OFF18:[0-9]+]]($sp)155; N64-DAG:       sd [[G19:\$19]], [[OFF19:[0-9]+]]($sp)156; N64-DAG:       sd [[G20:\$20]], [[OFF20:[0-9]+]]($sp)157; N64-DAG:       sd [[G21:\$21]], [[OFF21:[0-9]+]]($sp)158; N64-DAG:       sd [[G22:\$22]], [[OFF22:[0-9]+]]($sp)159; N64-DAG:       sd [[G23:\$23]], [[OFF23:[0-9]+]]($sp)160; N64-DAG:       sd [[G30:\$fp]], [[OFF30:[0-9]+]]($sp)161; N64-DAG:       sd [[G31:\$ra]], [[OFF31:[0-9]+]]($sp)162; N64-INV-NOT:   sd $24,163; N64-INV-NOT:   sd $25,164; N64-INV-NOT:   sd $26,165; N64-INV-NOT:   sd $27,166; N64-DAG:       sd [[G28:\$gp]], [[OFF28:[0-9]+]]($sp)167; N64-INV-NOT:   sd $29,168; N64-DAG:       ld [[G16]], [[OFF16]]($sp)169; N64-DAG:       ld [[G17]], [[OFF17]]($sp)170; N64-DAG:       ld [[G18]], [[OFF18]]($sp)171; N64-DAG:       ld [[G19]], [[OFF19]]($sp)172; N64-DAG:       ld [[G20]], [[OFF20]]($sp)173; N64-DAG:       ld [[G21]], [[OFF21]]($sp)174; N64-DAG:       ld [[G22]], [[OFF22]]($sp)175; N64-DAG:       ld [[G23]], [[OFF23]]($sp)176; N64-DAG:       ld [[G28]], [[OFF28]]($sp)177; N64-DAG:       ld [[G30]], [[OFF30]]($sp)178; N64-DAG:       ld [[G31]], [[OFF31]]($sp)179; N64:           daddiu $sp, $sp, 96180