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1; RUN: llc -mtriple=mipsel -mcpu=mips32r6 -disable-mips-delay-filler < %s | FileCheck %s2; RUN: llc -mtriple=mips -mcpu=mips32r6 -disable-mips-delay-filler < %s -filetype=obj \3; RUN: -o - | llvm-objdump -d - | FileCheck %s --check-prefix=ENCODING4; RUN: llc -mtriple=mipsel -mcpu=mips64r6 -disable-mips-delay-filler -target-abi=n64 < %s | FileCheck %s5; RUN: llc -mtriple=mips -mcpu=mips64r6 -disable-mips-delay-filler -target-abi=n64 < %s -filetype=obj \6; RUN: -o - | llvm-objdump -d - | FileCheck %s --check-prefix=ENCODING7 8; bnezc and beqzc have restriction that $rt != 09 10define i32 @f() {11; CHECK-LABEL: f:12; CHECK-NOT: bnezc $013 14 %cmp = icmp eq i32 1, 115 br i1 %cmp, label %if.then, label %if.end16 17 if.then:18 ret i32 119 20 if.end:21 ret i32 022}23 24define i32 @f1() {25; CHECK-LABEL: f1:26; CHECK-NOT: beqzc $027 28 %cmp = icmp eq i32 0, 029 br i1 %cmp, label %if.then, label %if.end30 31 if.then:32 ret i32 133 34 if.end:35 ret i32 036}37 38; We silently fixup cases where the register allocator or user has given us39; an instruction with incorrect operands that is trivially acceptable.40; beqc and bnec have the restriction that $rs < $rt.41 42define i32 @f2(i32 %a, i32 %b) {43; ENCODING-LABEL: <f2>:44; ENCODING-NOT: beqc $5, $445; ENCODING-NOT: bnec $5, $446 47 %cmp = icmp eq i32 %b, %a48 br i1 %cmp, label %if.then, label %if.end49 50 if.then:51 ret i32 152 53 if.end:54 ret i32 055}56 57define i64 @f3() {58; CHECK-LABEL: f3:59; CHECK-NOT: bnezc $060 61 %cmp = icmp eq i64 1, 162 br i1 %cmp, label %if.then, label %if.end63 64 if.then:65 ret i64 166 67 if.end:68 ret i64 069}70 71define i64 @f4() {72; CHECK-LABEL: f4:73; CHECK-NOT: beqzc $074 75 %cmp = icmp eq i64 0, 076 br i1 %cmp, label %if.then, label %if.end77 78 if.then:79 ret i64 180 81 if.end:82 ret i64 083}84 85; We silently fixup cases where the register allocator or user has given us86; an instruction with incorrect operands that is trivially acceptable.87; beqc and bnec have the restriction that $rs < $rt.88 89define i64 @f5(i64 %a, i64 %b) {90; ENCODING-LABEL: <f5>:91; ENCODING-NOT: beqc $5, $492; ENCODING-NOT: bnec $5, $493 94 %cmp = icmp eq i64 %b, %a95 br i1 %cmp, label %if.then, label %if.end96 97 if.then:98 ret i64 199 100 if.end:101 ret i64 0102}103 104define i32 @f6(i32 %a) {105; CHECK-LABEL: f6:106; CHECK: beqzc ${{[0-9]+}}, {{((\$)|(\.L))}}BB107 108 %cmp = icmp eq i32 %a, 0109 br i1 %cmp, label %if.then, label %if.end110 111 if.then:112 ret i32 1113 114 if.end:115 ret i32 0116}117 118define i32 @f7(i32 %a) {119; CHECK-LABEL: f7:120; CHECK: bnezc ${{[0-9]+}}, {{((\$)|(\.L))}}BB121 122 %cmp = icmp eq i32 0, %a123 br i1 %cmp, label %if.then, label %if.end124 125 if.then:126 ret i32 1127 128 if.end:129 ret i32 0130}131