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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=mipsel -mcpu=mips32 < %s | FileCheck -check-prefixes=MIPS-GT-R1,MIPS32-R1-R2 %s3; RUN: llc -mtriple=mipsel -mcpu=mips32r2 < %s | FileCheck -check-prefixes=MIPS-GT-R1,MIPS32-R1-R2 %s4; RUN: llc -mtriple=mipsel -mcpu=mips32r6 < %s | FileCheck -check-prefixes=MIPS-GT-R1,MIPS32-R6 %s5; RUN: llc -mtriple=mips64el -mcpu=mips64 < %s | FileCheck -check-prefixes=MIPS-GT-R1,MIPS64-GT-R1 %s6; RUN: llc -mtriple=mips64el -mcpu=mips64r2 < %s | FileCheck -check-prefixes=MIPS-GT-R1,MIPS64-GT-R1 %s7; RUN: llc -mtriple=mips64el -mcpu=mips64r6 < %s | FileCheck -check-prefixes=MIPS-GT-R1,MIPS64-GT-R1 %s8; RUN: llc -mtriple=mips64el -mcpu=mips4 < %s | FileCheck -check-prefixes=MIPS4 %s9 10; Prefixes:11; ALL - All12; MIPS-GT-R1 - MIPS32r1/MIPS64r1 and above13; MIPS64-GT-R1 - MIPS64r1 and above14 15define i32 @ctlz_i32(i32 signext %X) nounwind readnone {16; MIPS-GT-R1-LABEL: ctlz_i32:17; MIPS-GT-R1: # %bb.0: # %entry18; MIPS-GT-R1-NEXT: jr $ra19; MIPS-GT-R1-NEXT: clz $2, $420;21; MIPS4-LABEL: ctlz_i32:22; MIPS4: # %bb.0: # %entry23; MIPS4-NEXT: srl $1, $4, 124; MIPS4-NEXT: or $1, $4, $125; MIPS4-NEXT: srl $2, $1, 226; MIPS4-NEXT: or $1, $1, $227; MIPS4-NEXT: srl $2, $1, 428; MIPS4-NEXT: lui $3, 2184529; MIPS4-NEXT: lui $4, 1310730; MIPS4-NEXT: lui $5, 385531; MIPS4-NEXT: or $1, $1, $232; MIPS4-NEXT: ori $2, $5, 385533; MIPS4-NEXT: ori $4, $4, 1310734; MIPS4-NEXT: ori $3, $3, 2184535; MIPS4-NEXT: srl $5, $1, 836; MIPS4-NEXT: or $1, $1, $537; MIPS4-NEXT: srl $5, $1, 1638; MIPS4-NEXT: nor $1, $1, $539; MIPS4-NEXT: srl $5, $1, 140; MIPS4-NEXT: and $3, $5, $341; MIPS4-NEXT: subu $1, $1, $342; MIPS4-NEXT: and $3, $1, $443; MIPS4-NEXT: srl $1, $1, 244; MIPS4-NEXT: and $1, $1, $445; MIPS4-NEXT: addu $1, $3, $146; MIPS4-NEXT: srl $3, $1, 447; MIPS4-NEXT: addu $1, $1, $348; MIPS4-NEXT: and $1, $1, $249; MIPS4-NEXT: sll $2, $1, 850; MIPS4-NEXT: addu $2, $2, $151; MIPS4-NEXT: sll $3, $1, 1652; MIPS4-NEXT: addu $2, $3, $253; MIPS4-NEXT: sll $1, $1, 2454; MIPS4-NEXT: addu $1, $1, $255; MIPS4-NEXT: jr $ra56; MIPS4-NEXT: srl $2, $1, 2457entry:58 %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %X, i1 true)59 ret i32 %tmp160}61 62declare i32 @llvm.ctlz.i32(i32, i1) nounwind readnone63 64define i32 @ctlo_i32(i32 signext %X) nounwind readnone {65; MIPS-GT-R1-LABEL: ctlo_i32:66; MIPS-GT-R1: # %bb.0: # %entry67; MIPS-GT-R1-NEXT: jr $ra68; MIPS-GT-R1-NEXT: clo $2, $469;70; MIPS4-LABEL: ctlo_i32:71; MIPS4: # %bb.0: # %entry72; MIPS4-NEXT: not $1, $473; MIPS4-NEXT: srl $2, $1, 174; MIPS4-NEXT: or $1, $1, $275; MIPS4-NEXT: srl $2, $1, 276; MIPS4-NEXT: or $1, $1, $277; MIPS4-NEXT: lui $2, 2184578; MIPS4-NEXT: lui $3, 1310779; MIPS4-NEXT: lui $4, 385580; MIPS4-NEXT: srl $5, $1, 481; MIPS4-NEXT: ori $4, $4, 385582; MIPS4-NEXT: ori $3, $3, 1310783; MIPS4-NEXT: ori $2, $2, 2184584; MIPS4-NEXT: or $1, $1, $585; MIPS4-NEXT: srl $5, $1, 886; MIPS4-NEXT: or $1, $1, $587; MIPS4-NEXT: srl $5, $1, 1688; MIPS4-NEXT: nor $1, $1, $589; MIPS4-NEXT: srl $5, $1, 190; MIPS4-NEXT: and $2, $5, $291; MIPS4-NEXT: subu $1, $1, $292; MIPS4-NEXT: and $2, $1, $393; MIPS4-NEXT: srl $1, $1, 294; MIPS4-NEXT: and $1, $1, $395; MIPS4-NEXT: addu $1, $2, $196; MIPS4-NEXT: srl $2, $1, 497; MIPS4-NEXT: addu $1, $1, $298; MIPS4-NEXT: and $1, $1, $499; MIPS4-NEXT: sll $2, $1, 8100; MIPS4-NEXT: addu $2, $2, $1101; MIPS4-NEXT: sll $3, $1, 16102; MIPS4-NEXT: addu $2, $3, $2103; MIPS4-NEXT: sll $1, $1, 24104; MIPS4-NEXT: addu $1, $1, $2105; MIPS4-NEXT: jr $ra106; MIPS4-NEXT: srl $2, $1, 24107entry:108 %neg = xor i32 %X, -1109 %tmp1 = tail call i32 @llvm.ctlz.i32(i32 %neg, i1 true)110 ret i32 %tmp1111}112 113define i64 @ctlz_i64(i64 %X) nounwind readnone {114; MIPS32-R1-R2-LABEL: ctlz_i64:115; MIPS32-R1-R2: # %bb.0: # %entry116; MIPS32-R1-R2-NEXT: clz $1, $5117; MIPS32-R1-R2-NEXT: clz $2, $4118; MIPS32-R1-R2-NEXT: addiu $2, $2, 32119; MIPS32-R1-R2-NEXT: movn $2, $1, $5120; MIPS32-R1-R2-NEXT: jr $ra121; MIPS32-R1-R2-NEXT: addiu $3, $zero, 0122;123; MIPS32-R6-LABEL: ctlz_i64:124; MIPS32-R6: # %bb.0: # %entry125; MIPS32-R6-NEXT: clz $1, $5126; MIPS32-R6-NEXT: selnez $1, $1, $5127; MIPS32-R6-NEXT: clz $2, $4128; MIPS32-R6-NEXT: addiu $2, $2, 32129; MIPS32-R6-NEXT: seleqz $2, $2, $5130; MIPS32-R6-NEXT: or $2, $1, $2131; MIPS32-R6-NEXT: jr $ra132; MIPS32-R6-NEXT: addiu $3, $zero, 0133;134; MIPS64-GT-R1-LABEL: ctlz_i64:135; MIPS64-GT-R1: # %bb.0: # %entry136; MIPS64-GT-R1-NEXT: jr $ra137; MIPS64-GT-R1-NEXT: dclz $2, $4138;139; MIPS4-LABEL: ctlz_i64:140; MIPS4: # %bb.0: # %entry141; MIPS4-NEXT: dsrl $1, $4, 1142; MIPS4-NEXT: or $1, $4, $1143; MIPS4-NEXT: dsrl $2, $1, 2144; MIPS4-NEXT: or $1, $1, $2145; MIPS4-NEXT: dsrl $2, $1, 4146; MIPS4-NEXT: or $1, $1, $2147; MIPS4-NEXT: lui $2, 13107148; MIPS4-NEXT: dsrl $3, $1, 8149; MIPS4-NEXT: daddiu $2, $2, 13107150; MIPS4-NEXT: or $1, $1, $3151; MIPS4-NEXT: dsll $2, $2, 16152; MIPS4-NEXT: lui $3, 3855153; MIPS4-NEXT: daddiu $3, $3, 3855154; MIPS4-NEXT: dsll $3, $3, 16155; MIPS4-NEXT: daddiu $3, $3, 3855156; MIPS4-NEXT: daddiu $2, $2, 13107157; MIPS4-NEXT: lui $4, 21845158; MIPS4-NEXT: daddiu $4, $4, 21845159; MIPS4-NEXT: dsll $4, $4, 16160; MIPS4-NEXT: dsrl $5, $1, 16161; MIPS4-NEXT: or $1, $1, $5162; MIPS4-NEXT: dsll $2, $2, 16163; MIPS4-NEXT: dsll $3, $3, 16164; MIPS4-NEXT: lui $5, 257165; MIPS4-NEXT: daddiu $5, $5, 257166; MIPS4-NEXT: dsll $5, $5, 16167; MIPS4-NEXT: daddiu $5, $5, 257168; MIPS4-NEXT: dsll $5, $5, 16169; MIPS4-NEXT: dsrl $6, $1, 32170; MIPS4-NEXT: daddiu $5, $5, 257171; MIPS4-NEXT: daddiu $3, $3, 3855172; MIPS4-NEXT: daddiu $2, $2, 13107173; MIPS4-NEXT: daddiu $4, $4, 21845174; MIPS4-NEXT: dsll $4, $4, 16175; MIPS4-NEXT: daddiu $4, $4, 21845176; MIPS4-NEXT: nor $1, $1, $6177; MIPS4-NEXT: dsrl $6, $1, 1178; MIPS4-NEXT: and $4, $6, $4179; MIPS4-NEXT: dsubu $1, $1, $4180; MIPS4-NEXT: and $4, $1, $2181; MIPS4-NEXT: dsrl $1, $1, 2182; MIPS4-NEXT: and $1, $1, $2183; MIPS4-NEXT: daddu $1, $4, $1184; MIPS4-NEXT: dsrl $2, $1, 4185; MIPS4-NEXT: daddu $1, $1, $2186; MIPS4-NEXT: and $1, $1, $3187; MIPS4-NEXT: dmult $1, $5188; MIPS4-NEXT: mflo $1189; MIPS4-NEXT: jr $ra190; MIPS4-NEXT: dsrl $2, $1, 56191entry:192 %tmp1 = tail call i64 @llvm.ctlz.i64(i64 %X, i1 true)193 ret i64 %tmp1194}195 196declare i64 @llvm.ctlz.i64(i64, i1) nounwind readnone197 198define i64 @ctlo_i64(i64 %X) nounwind readnone {199; MIPS32-R1-R2-LABEL: ctlo_i64:200; MIPS32-R1-R2: # %bb.0: # %entry201; MIPS32-R1-R2-NEXT: not $1, $5202; MIPS32-R1-R2-NEXT: clo $3, $5203; MIPS32-R1-R2-NEXT: clo $2, $4204; MIPS32-R1-R2-NEXT: addiu $2, $2, 32205; MIPS32-R1-R2-NEXT: movn $2, $3, $1206; MIPS32-R1-R2-NEXT: jr $ra207; MIPS32-R1-R2-NEXT: addiu $3, $zero, 0208;209; MIPS32-R6-LABEL: ctlo_i64:210; MIPS32-R6: # %bb.0: # %entry211; MIPS32-R6-NEXT: not $1, $5212; MIPS32-R6-NEXT: clo $2, $5213; MIPS32-R6-NEXT: selnez $2, $2, $1214; MIPS32-R6-NEXT: clo $3, $4215; MIPS32-R6-NEXT: addiu $3, $3, 32216; MIPS32-R6-NEXT: seleqz $1, $3, $1217; MIPS32-R6-NEXT: or $2, $2, $1218; MIPS32-R6-NEXT: jr $ra219; MIPS32-R6-NEXT: addiu $3, $zero, 0220;221; MIPS64-GT-R1-LABEL: ctlo_i64:222; MIPS64-GT-R1: # %bb.0: # %entry223; MIPS64-GT-R1-NEXT: jr $ra224; MIPS64-GT-R1-NEXT: dclo $2, $4225;226; MIPS4-LABEL: ctlo_i64:227; MIPS4: # %bb.0: # %entry228; MIPS4-NEXT: daddiu $1, $zero, -1229; MIPS4-NEXT: xor $1, $4, $1230; MIPS4-NEXT: dsrl $2, $1, 1231; MIPS4-NEXT: or $1, $1, $2232; MIPS4-NEXT: dsrl $2, $1, 2233; MIPS4-NEXT: or $1, $1, $2234; MIPS4-NEXT: dsrl $2, $1, 4235; MIPS4-NEXT: lui $3, 13107236; MIPS4-NEXT: or $1, $1, $2237; MIPS4-NEXT: daddiu $2, $3, 13107238; MIPS4-NEXT: dsrl $3, $1, 8239; MIPS4-NEXT: dsll $2, $2, 16240; MIPS4-NEXT: lui $4, 3855241; MIPS4-NEXT: daddiu $4, $4, 3855242; MIPS4-NEXT: dsll $4, $4, 16243; MIPS4-NEXT: or $1, $1, $3244; MIPS4-NEXT: daddiu $3, $4, 3855245; MIPS4-NEXT: daddiu $2, $2, 13107246; MIPS4-NEXT: lui $4, 21845247; MIPS4-NEXT: daddiu $4, $4, 21845248; MIPS4-NEXT: dsll $4, $4, 16249; MIPS4-NEXT: daddiu $4, $4, 21845250; MIPS4-NEXT: dsrl $5, $1, 16251; MIPS4-NEXT: dsll $2, $2, 16252; MIPS4-NEXT: dsll $3, $3, 16253; MIPS4-NEXT: lui $6, 257254; MIPS4-NEXT: daddiu $6, $6, 257255; MIPS4-NEXT: dsll $6, $6, 16256; MIPS4-NEXT: daddiu $6, $6, 257257; MIPS4-NEXT: dsll $6, $6, 16258; MIPS4-NEXT: or $1, $1, $5259; MIPS4-NEXT: daddiu $5, $6, 257260; MIPS4-NEXT: daddiu $3, $3, 3855261; MIPS4-NEXT: daddiu $2, $2, 13107262; MIPS4-NEXT: dsll $4, $4, 16263; MIPS4-NEXT: daddiu $4, $4, 21845264; MIPS4-NEXT: dsrl $6, $1, 32265; MIPS4-NEXT: nor $1, $1, $6266; MIPS4-NEXT: dsrl $6, $1, 1267; MIPS4-NEXT: and $4, $6, $4268; MIPS4-NEXT: dsubu $1, $1, $4269; MIPS4-NEXT: and $4, $1, $2270; MIPS4-NEXT: dsrl $1, $1, 2271; MIPS4-NEXT: and $1, $1, $2272; MIPS4-NEXT: daddu $1, $4, $1273; MIPS4-NEXT: dsrl $2, $1, 4274; MIPS4-NEXT: daddu $1, $1, $2275; MIPS4-NEXT: and $1, $1, $3276; MIPS4-NEXT: dmult $1, $5277; MIPS4-NEXT: mflo $1278; MIPS4-NEXT: jr $ra279; MIPS4-NEXT: dsrl $2, $1, 56280entry:281 %neg = xor i64 %X, -1282 %tmp1 = tail call i64 @llvm.ctlz.i64(i64 %neg, i1 true)283 ret i64 %tmp1284}285