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1; RUN: llc -mtriple=mipsel -mcpu=mips32 < %s | FileCheck %s -check-prefix=CHECK-MIPS322; RUN: llc -mtriple=mips64el -mcpu=mips64 -relocation-model=pic < %s | \3; RUN: FileCheck %s -check-prefix=CHECK-MIPS644; RUN: llc -mtriple=mipsel -mcpu=mips64 -target-abi n32 < %s | \5; RUN: FileCheck %s -check-prefix=CHECK-MIPSN326 7; Test that the expansion of ADJCALLSTACKDOWN and ADJCALLSTACKUP generate8; (d)subu and (d)addu rather than just (d)addu. The (d)subu sequences are9; generally shorter as the constant that has to be materialized is smaller.10 11define i32 @main() {12entry:13 %z = alloca [1048576 x i8], align 114 %call = call i32 @foo(ptr %z)15 ret i32 016; CHECK-LABEL: main17 18; CHECK-MIPS32: lui $[[R0:[0-9]+]], 1619; CHECK-MIPS32: addiu $[[R0]], $[[R0]], 2420; CHECK-MIPS32: subu $sp, $sp, $[[R0]]21 22; CHECK-MIPS32: lui $[[R1:[0-9]+]], 1623; CHECK-MIPS32: addiu $[[R1]], $[[R1]], 2424; CHECK-MIPS32: addu $sp, $sp, $[[R1]]25 26; CHECK-MIPS64: lui $[[R0:[0-9]+]], 127; CHECK-MIPS64: daddiu $[[R0]], $[[R0]], 3228; CHECK-MIPS64: dsubu $sp, $sp, $[[R0]]29 30; FIXME:31; These are here to match other lui's used in address computations. We need to32; investigate why address computations are not CSE'd. Or implement it.33 34; CHECK-MIPS64: lui35; CHECK-MIPS64: lui36; CHECK-MIPS64: lui37; CHECK-MIPS64: lui38 39; CHECK-MIPS64: lui $[[R1:[0-9]+]], 1640; CHECK-MIPS64: daddiu $[[R1]], $[[R1]], 3241; CHECK-MIPS64: daddu $sp, $sp, $[[R1]]42 43; CHECK-MIPSN32: lui $[[R0:[0-9]+]], 1644; CHECK-MIPSN32: addiu $[[R0]], $[[R0]], 1645; CHECK-MIPSN32: subu $sp, $sp, $[[R0]]46 47; CHECK-MIPSN32: lui $[[R1:[0-9]+]], 1648; CHECK-MIPSN32: addiu $[[R1]], $[[R1]], 1649; CHECK-MIPSN32: addu $sp, $sp, $[[R1]]50 51}52 53declare i32 @foo(ptr)54