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1; RUN: llc -mtriple=mips64 -mcpu=mips64r2 -target-abi=n64 < %s -o - | FileCheck %s2 3define i64 @dext_add_zext(i32 signext %n) {4entry:5  %add = add i32 %n, 16  %res = zext i32 %add to i647  ret i64 %res8 9; CHECK-LABEL: dext_add_zext:10; CHECK:       dext $[[R0:[0-9]+]], $[[R0:[0-9]+]], 0, 3211 12}13 14define i32 @ext_and24(i32 signext %a) {15entry:16  %and = and i32 %a, 1677721517  ret i32 %and18 19; CHECK-LABEL: ext_and24:20; CHECK:       ext $[[R0:[0-9]+]], $[[R1:[0-9]+]], 0, 2421 22}23 24define i64 @dext_and32(i64 zeroext %a) {25entry:26  %and = and i64 %a, 429496729527  ret i64 %and28 29; CHECK-LABEL: dext_and32:30; CHECK:       dext $[[R0:[0-9]+]], $[[R1:[0-9]+]], 0, 3231 32}33 34define i64 @dext_and35(i64 zeroext %a) {35entry:36  %and = and i64 %a, 3435973836737  ret i64 %and38 39; CHECK-LABEL: dext_and35:40; CHECK:       dextm $[[R0:[0-9]+]], $[[R1:[0-9]+]], 0, 3541 42}43 44define i64 @dext_and20(i64 zeroext %a) {45entry:46  %and = and i64 %a, 104857547  ret i64 %and48 49; CHECK-LABEL: dext_and20:50; CHECK:       dext $[[R0:[0-9]+]], $[[R1:[0-9]+]], 0, 2051 52}53 54define i64 @dext_and16(i64 zeroext %a) {55entry:56  %and = and i64 %a, 6553557  ret i64 %and58 59; CHECK-LABEL: dext_and16:60; CHECK:       andi $[[R0:[0-9]+]], $[[R1:[0-9]+]], 6553561 62}63 64define i64 @dext_lsr_and20(i64 zeroext %a) {65entry:66  %shr = lshr i64 %a, 567  %and = and i64 %shr, 104857568  ret i64 %and69 70; CHECK-LABEL: dext_lsr_and20:71; CHECK:       dext $[[R0:[0-9]+]], $[[R1:[0-9]+]], 5, 2072 73}74 75define i64 @dext_lsr_and8(i64 zeroext %a) {76entry:77  %shr = lshr i64 %a, 4078  %and = and i64 %shr, 25579  ret i64 %and80 81; CHECK-LABEL: dext_lsr_and8:82; CHECK:       dextu $[[R0:[0-9]+]], $[[R1:[0-9]+]], 40, 883 84}85 86define i64 @dext_zext(i32 signext %a) {87entry:88  %conv = zext i32 %a to i6489  ret i64 %conv90 91; CHECK-LABEL: dext_zext:92; CHECK:       dext $[[R0:[0-9]+]], $[[R1:[0-9]+]], 0, 3293 94}95 96define i64 @dext_and_lsr(i64 zeroext %n) {97entry:98  %and = lshr i64 %n, 899  %shr = and i64 %and, 4095100  ret i64 %shr101 102; CHECK-LABEL: dext_and_lsr:103; CHECK:       dext $[[R0:[0-9]+]], $[[R1:[0-9]+]], 8, 12104 105}106