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1; RUN: llc < %s -verify-machineinstrs -mtriple=mipsel -mcpu=mips32 \2; RUN: | FileCheck %s -check-prefix=323; RUN: llc < %s -verify-machineinstrs -mtriple=mipsel -mcpu=mips32r2 \4; RUN: | FileCheck %s -check-prefix=32R25; RUN: llc < %s -verify-machineinstrs -mtriple=mips64el -mcpu=mips4 -target-abi=n64 \6; RUN: | FileCheck %s -check-prefix=647; RUN: llc < %s -verify-machineinstrs -mtriple=mips64el -mcpu=mips64 -target-abi=n64 \8; RUN: | FileCheck %s -check-prefix=649; RUN: llc < %s -verify-machineinstrs -mtriple=mips64el -mcpu=mips64r2 -target-abi=n64 \10; RUN: | FileCheck %s -check-prefix=64R211 12define double @func0(double %d0, double %d1) nounwind readnone {13entry:14;15; 32: lui $[[MSK1:[0-9]+]], 3276816; 32: and $[[AND1:[0-9]+]], ${{[0-9]+}}, $[[MSK1]]17; 32: lui $[[T0:[0-9]+]], 3276718; 32: ori $[[MSK0:[0-9]+]], $[[T0]], 6553519; 32: and $[[AND0:[0-9]+]], ${{[0-9]+}}, $[[MSK0]]20; 32: or $[[OR:[0-9]+]], $[[AND0]], $[[AND1]]21; 32: mtc1 $[[OR]], $f122 23; 32R2: ext $[[EXT:[0-9]+]], ${{[0-9]+}}, 31, 124; 32R2: ins $[[INS:[0-9]+]], $[[EXT]], 31, 125; 32R2: mthc1 $[[INS]], $f026 27; 64: daddiu $[[T0:[0-9]+]], $zero, 128; 64: dsll $[[MSK1:[0-9]+]], $[[T0]], 6329; 64: and $[[AND1:[0-9]+]], ${{[0-9]+}}, $[[MSK1]]30; 64: daddiu $[[MSK0:[0-9]+]], $[[MSK1]], -131; 64: and $[[AND0:[0-9]+]], ${{[0-9]+}}, $[[MSK0]]32; 64: or $[[OR:[0-9]+]], $[[AND0]], $[[AND1]]33; 64: dmtc1 $[[OR]], $f034 35; 64R2: dextu $[[EXT:[0-9]+]], ${{[0-9]+}}, 63, 136; 64R2: dinsu $[[INS:[0-9]+]], $[[EXT]], 63, 137; 64R2: dmtc1 $[[INS]], $f038 39 %call = tail call double @copysign(double %d0, double %d1) nounwind readnone40 ret double %call41}42 43declare double @copysign(double, double) nounwind readnone44 45define float @func1(float %f0, float %f1) nounwind readnone {46entry:47 48; 32: lui $[[MSK1:[0-9]+]], 3276849; 32: and $[[AND1:[0-9]+]], ${{[0-9]+}}, $[[MSK1]]50; 32: lui $[[T0:[0-9]+]], 3276751; 32: ori $[[MSK0:[0-9]+]], $[[T0]], 6553552; 32: and $[[AND0:[0-9]+]], ${{[0-9]+}}, $[[MSK0]]53; 32: or $[[OR:[0-9]+]], $[[AND0]], $[[AND1]]54; 32: mtc1 $[[OR]], $f055 56; 32R2: ext $[[EXT:[0-9]+]], ${{[0-9]+}}, 31, 157; 32R2: ins $[[INS:[0-9]+]], $[[EXT]], 31, 158; 32R2: mtc1 $[[INS]], $f059 60 %call = tail call float @copysignf(float %f0, float %f1) nounwind readnone61 ret float %call62}63 64declare float @copysignf(float, float) nounwind readnone65 66