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1; Check that madd.[ds], msub.[ds], nmadd.[ds], and nmsub.[ds] are supported2; correctly.3; The spec for nmadd.[ds], and nmsub.[ds] does not state that they obey the4; the Has2008 and ABS2008 configuration bits which govern the conformance to5; IEEE 754 (1985) and IEEE 754 (2008). These instructions are therefore only6; available when -enable-no-nans-fp-math is given.7 8; RUN: llc < %s -mtriple=mipsel -mcpu=mips32 -enable-no-nans-fp-math | FileCheck %s -check-prefixes=ALL,32-NOMADD9; RUN: llc < %s -mtriple=mipsel -mcpu=mips32r2 -enable-no-nans-fp-math | FileCheck %s -check-prefixes=ALL,32R2,32R2-NONAN10; RUN: llc < %s -mtriple=mipsel -mcpu=mips32r6 -enable-no-nans-fp-math | FileCheck %s -check-prefixes=ALL,32R6-NOMADD11; RUN: llc < %s -mtriple=mips64el -mcpu=mips64 -target-abi=n64 -enable-no-nans-fp-math | FileCheck %s -check-prefixes=ALL,64,64-NONAN12; RUN: llc < %s -mtriple=mips64el -mcpu=mips64r2 -target-abi=n64 -enable-no-nans-fp-math | FileCheck %s -check-prefixes=ALL,64R2,64R2-NONAN13; RUN: llc < %s -mtriple=mips64el -mcpu=mips64r6 -target-abi=n64 -enable-no-nans-fp-math | FileCheck %s -check-prefixes=ALL,64R6-NOMADD14; RUN: llc < %s -mtriple=mipsel -mcpu=mips32 | FileCheck %s -check-prefixes=ALL,32-NOMADD15; RUN: llc < %s -mtriple=mipsel -mcpu=mips32r2 | FileCheck %s -check-prefixes=ALL,32R2,32R2-NAN16; RUN: llc < %s -mtriple=mipsel -mcpu=mips32r6 | FileCheck %s -check-prefixes=ALL,32R6-NOMADD17; RUN: llc < %s -mtriple=mips64el -mcpu=mips64 -target-abi=n64 | FileCheck %s -check-prefixes=ALL,64,64-NAN18; RUN: llc < %s -mtriple=mips64el -mcpu=mips64r2 -target-abi=n64 | FileCheck %s -check-prefixes=ALL,64R2,64R2-NAN19; RUN: llc < %s -mtriple=mips64el -mcpu=mips64r6 -target-abi=n64 | FileCheck %s -check-prefixes=ALL,64R6-NOMADD20 21; Check that madd.[ds], msub.[ds], nmadd.[ds], and nmsub.[ds] are not generated22; when +nomadd attribute is specified.23; Output for mips32 and mips64r6 reused since aforementioned instructions are24; not generated in those cases.25; RUN: llc < %s -mtriple=mipsel -mcpu=mips32r2 -enable-no-nans-fp-math -mattr=+nomadd4 | FileCheck %s -check-prefixes=ALL,32-NOMADD26; RUN: llc < %s -mtriple=mips64el -mcpu=mips64 -target-abi=n64 -enable-no-nans-fp-math -mattr=+nomadd4 | FileCheck %s -check-prefixes=ALL,64R6-NOMADD27; RUN: llc < %s -mtriple=mips64el -mcpu=mips64r2 -target-abi=n64 -enable-no-nans-fp-math -mattr=+nomadd4 | FileCheck %s -check-prefixes=ALL,64R6-NOMADD28; RUN: llc < %s -mtriple=mipsel -mcpu=mips32r2 -mattr=+nomadd4 | FileCheck %s -check-prefixes=ALL,32-NOMADD29; RUN: llc < %s -mtriple=mips64el -mcpu=mips64 -target-abi=n64 -mattr=+nomadd4 | FileCheck %s -check-prefixes=ALL,64R6-NOMADD30; RUN: llc < %s -mtriple=mips64el -mcpu=mips64r2 -target-abi=n64 -mattr=+nomadd4 | FileCheck %s -check-prefixes=ALL,64R6-NOMADD31 32define float @FOO0float(float %a, float %b, float %c) nounwind readnone {33entry:34; ALL-LABEL: FOO0float:35 36; 32-NOMADD-DAG: mtc1 $6, $[[T0:f[0-9]+]]37; 32-NOMADD-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f1438; 32-NOMADD-DAG: add.s $[[T2:f[0-9]+]], $[[T1]], $[[T0]]39; 32-NOMADD-DAG: mtc1 $zero, $[[T2:f[0-9]+]]40; 32-NOMADD-DAG: add.s $f0, $[[T1]], $[[T2]]41 42; 32R2: mtc1 $6, $[[T0:f[0-9]+]]43; 32R2: madd.s $[[T1:f[0-9]+]], $[[T0]], $f12, $f1444; 32R2: mtc1 $zero, $[[T2:f[0-9]+]]45; 32R2: add.s $f0, $[[T1]], $[[T2]]46 47; 32R6-NOMADD-DAG: mtc1 $6, $[[T0:f[0-9]+]]48; 32R6-NOMADD-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f1449; 32R6-NOMADD-DAG: add.s $[[T2:f[0-9]+]], $[[T1]], $[[T0]]50; 32R6-NOMADD-DAG: mtc1 $zero, $[[T2:f[0-9]+]]51; 32R6-NOMADD-DAG: add.s $f0, $[[T1]], $[[T2]]52 53; 64-DAG: madd.s $[[T0:f[0-9]+]], $f14, $f12, $f1354; 64-DAG: mtc1 $zero, $[[T1:f[0-9]+]]55; 64-DAG: add.s $f0, $[[T0]], $[[T1]]56 57; 64R2: madd.s $[[T0:f[0-9]+]], $f14, $f12, $f1358; 64R2: mtc1 $zero, $[[T1:f[0-9]+]]59; 64R2: add.s $f0, $[[T0]], $[[T1]]60 61; 64R6-NOMADD-DAG: mul.s $[[T0:f[0-9]+]], $f12, $f1362; 64R6-NOMADD-DAG: add.s $[[T1:f[0-9]+]], $[[T0]], $f1463; 64R6-NOMADD-DAG: mtc1 $zero, $[[T2:f[0-9]+]]64; 64R6-NOMADD-DAG: add.s $f0, $[[T1]], $[[T2]]65 66 %mul = fmul float %a, %b67 %add = fadd float %mul, %c68 %add1 = fadd float %add, 0.000000e+0069 ret float %add170}71 72define float @FOO1float(float %a, float %b, float %c) nounwind readnone {73entry:74; ALL-LABEL: FOO1float:75 76; 32-NOMADD-DAG: mtc1 $6, $[[T0:f[0-9]+]]77; 32-NOMADD-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f1478; 32-NOMADD-DAG: sub.s $[[T2:f[0-9]+]], $[[T1]], $[[T0]]79; 32-NOMADD-DAG: mtc1 $zero, $[[T2:f[0-9]+]]80; 32-NOMADD-DAG: add.s $f0, $[[T1]], $[[T2]]81 82; 32R2: mtc1 $6, $[[T0:f[0-9]+]]83; 32R2: msub.s $[[T1:f[0-9]+]], $[[T0]], $f12, $f1484; 32R2: mtc1 $zero, $[[T2:f[0-9]+]]85; 32R2: add.s $f0, $[[T1]], $[[T2]]86 87; 32R6-NOMADD-DAG: mtc1 $6, $[[T0:f[0-9]+]]88; 32R6-NOMADD-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f1489; 32R6-NOMADD-DAG: sub.s $[[T2:f[0-9]+]], $[[T1]], $[[T0]]90; 32R6-NOMADD-DAG: mtc1 $zero, $[[T2:f[0-9]+]]91; 32R6-NOMADD-DAG: add.s $f0, $[[T1]], $[[T2]]92 93; 64-DAG: msub.s $[[T0:f[0-9]+]], $f14, $f12, $f1394; 64-DAG: mtc1 $zero, $[[T1:f[0-9]+]]95; 64-DAG: add.s $f0, $[[T0]], $[[T1]]96 97; 64R2: msub.s $[[T0:f[0-9]+]], $f14, $f12, $f1398; 64R2: mtc1 $zero, $[[T1:f[0-9]+]]99; 64R2: add.s $f0, $[[T0]], $[[T1]]100 101; 64R6-NOMADD-DAG: mul.s $[[T0:f[0-9]+]], $f12, $f13102; 64R6-NOMADD-DAG: sub.s $[[T1:f[0-9]+]], $[[T0]], $f14103; 64R6-NOMADD-DAG: mtc1 $zero, $[[T2:f[0-9]+]]104; 64R6-NOMADD-DAG: add.s $f0, $[[T1]], $[[T2]]105 106 %mul = fmul float %a, %b107 %sub = fsub float %mul, %c108 %add = fadd float %sub, 0.000000e+00109 ret float %add110}111 112define float @FOO2float(float %a, float %b, float %c) nounwind readnone {113entry:114; ALL-LABEL: FOO2float:115 116; 32-NOMADD-DAG: mtc1 $6, $[[T0:f[0-9]+]]117; 32-NOMADD-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f14118; 32-NOMADD-DAG: add.s $[[T2:f[0-9]+]], $[[T1]], $[[T0]]119; 32-NOMADD-DAG: mtc1 $zero, $[[T2:f[0-9]+]]120; 32-NOMADD-DAG: sub.s $f0, $[[T2]], $[[T1]]121 122; 32R2-NONAN: mtc1 $6, $[[T0:f[0-9]+]]123; 32R2-NONAN: nmadd.s $f0, $[[T0]], $f12, $f14124 125; 32R2-NAN: mtc1 $6, $[[T0:f[0-9]+]]126; 32R2-NAN: madd.s $[[T1:f[0-9]+]], $[[T0]], $f12, $f14127; 32R2-NAN: mtc1 $zero, $[[T2:f[0-9]+]]128; 32R2-NAN: sub.s $f0, $[[T2]], $[[T1]]129 130; 32R6-NOMADD-DAG: mtc1 $6, $[[T0:f[0-9]+]]131; 32R6-NOMADD-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f14132; 32R6-NOMADD-DAG: add.s $[[T2:f[0-9]+]], $[[T1]], $[[T0]]133; 32R6-NOMADD-DAG: mtc1 $zero, $[[T2:f[0-9]+]]134; 32R6-NOMADD-DAG: sub.s $f0, $[[T2]], $[[T1]]135 136; 64-NONAN: nmadd.s $f0, $f14, $f12, $f13137 138; 64-NAN: madd.s $[[T0:f[0-9]+]], $f14, $f12, $f13139; 64-NAN: mtc1 $zero, $[[T1:f[0-9]+]]140; 64-NAN: sub.s $f0, $[[T1]], $[[T0]]141 142; 64R2-NONAN: nmadd.s $f0, $f14, $f12, $f13143 144; 64R2-NAN: madd.s $[[T0:f[0-9]+]], $f14, $f12, $f13145; 64R2-NAN: mtc1 $zero, $[[T1:f[0-9]+]]146; 64R2-NAN: sub.s $f0, $[[T1]], $[[T0]]147 148; 64R6-NOMADD-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f13149; 64R6-NOMADD-DAG: add.s $[[T2:f[0-9]+]], $[[T1]], $f14150; 64R6-NOMADD-DAG: mtc1 $zero, $[[T2:f[0-9]+]]151; 64R6-NOMADD-DAG: sub.s $f0, $[[T2]], $[[T1]]152 153 %mul = fmul float %a, %b154 %add = fadd float %mul, %c155 %sub = fsub float 0.000000e+00, %add156 ret float %sub157}158 159define float @FOO3float(float %a, float %b, float %c) nounwind readnone {160entry:161; ALL-LABEL: FOO3float:162 163; 32-NOMADD-DAG: mtc1 $6, $[[T0:f[0-9]+]]164; 32-NOMADD-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f14165; 32-NOMADD-DAG: sub.s $[[T2:f[0-9]+]], $[[T1]], $[[T0]]166; 32-NOMADD-DAG: mtc1 $zero, $[[T2:f[0-9]+]]167; 32-NOMADD-DAG: sub.s $f0, $[[T2]], $[[T1]]168 169; 32R2-NONAN: mtc1 $6, $[[T0:f[0-9]+]]170; 32R2-NONAN: nmsub.s $f0, $[[T0]], $f12, $f14171 172; 32R2-NAN: mtc1 $6, $[[T0:f[0-9]+]]173; 32R2-NAN: msub.s $[[T1:f[0-9]+]], $[[T0]], $f12, $f14174; 32R2-NAN: mtc1 $zero, $[[T2:f[0-9]+]]175; 32R2-NAN: sub.s $f0, $[[T2]], $[[T1]]176 177; 64-NAN: msub.s $[[T0:f[0-9]+]], $f14, $f12, $f13178; 64-NAN: mtc1 $zero, $[[T1:f[0-9]+]]179; 64-NAN: sub.s $f0, $[[T1]], $[[T0]]180 181; 64-NONAN: nmsub.s $f0, $f14, $f12, $f13182 183; 64R2-NAN: msub.s $[[T0:f[0-9]+]], $f14, $f12, $f13184; 64R2-NAN: mtc1 $zero, $[[T1:f[0-9]+]]185; 64R2-NAN: sub.s $f0, $[[T1]], $[[T0]]186 187; 64R6-NOMADD-DAG: mul.s $[[T1:f[0-9]+]], $f12, $f13188; 64R6-NOMADD-DAG: sub.s $[[T2:f[0-9]+]], $[[T1]], $f14189; 64R6-NOMADD-DAG: mtc1 $zero, $[[T2:f[0-9]+]]190; 64R6-NOMADD-DAG: sub.s $f0, $[[T2]], $[[T1]]191 192 %mul = fmul float %a, %b193 %sub = fsub float %mul, %c194 %sub1 = fsub float 0.000000e+00, %sub195 ret float %sub1196}197 198define double @FOO10double(double %a, double %b, double %c) nounwind readnone {199entry:200; ALL-LABEL: FOO10double:201 202; 32-NOMADD-DAG: ldc1 $[[T0:f[0-9]+]], 16($sp)203; 32-NOMADD-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f14204; 32-NOMADD-DAG: add.d $[[T2:f[0-9]+]], $[[T1]], $[[T0]]205; 32-NOMADD-DAG: mtc1 $zero, $[[T2:f[0-9]+]]206; 32-NOMADD-DAG: add.d $f0, $[[T1]], $[[T2]]207 208; 32R2: ldc1 $[[T0:f[0-9]+]], 16($sp)209; 32R2: madd.d $[[T1:f[0-9]+]], $[[T0]], $f12, $f14210; 32R2: mtc1 $zero, $[[T2:f[0-9]+]]211; 32R2: mthc1 $zero, $[[T2]]212; 32R2: add.d $f0, $[[T1]], $[[T2]]213 214; 32R6-NOMADD-DAG: ldc1 $[[T0:f[0-9]+]], 16($sp)215; 32R6-NOMADD-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f14216; 32R6-NOMADD-DAG: add.d $[[T2:f[0-9]+]], $[[T1]], $[[T0]]217; 32R6-NOMADD-DAG: mtc1 $zero, $[[T2:f[0-9]+]]218; 32R6-NOMADD-DAG: add.d $f0, $[[T1]], $[[T2]]219 220; 64-DAG: madd.d $[[T0:f[0-9]+]], $f14, $f12, $f13221; 64-DAG: mtc1 $zero, $[[T1:f[0-9]+]]222; 64-DAG: add.d $f0, $[[T0]], $[[T1]]223 224; 64R2: madd.d $[[T0:f[0-9]+]], $f14, $f12, $f13225; 64R2: mtc1 $zero, $[[T1:f[0-9]+]]226; 64R2: add.d $f0, $[[T0]], $[[T1]]227 228; 64R6-NOMADD-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f13229; 64R6-NOMADD-DAG: add.d $[[T2:f[0-9]+]], $[[T1]], $f14230; 64R6-NOMADD-DAG: dmtc1 $zero, $[[T2:f[0-9]+]]231; 64R6-NOMADD-DAG: add.d $f0, $[[T1]], $[[T2]]232 233 %mul = fmul double %a, %b234 %add = fadd double %mul, %c235 %add1 = fadd double %add, 0.000000e+00236 ret double %add1237}238 239define double @FOO11double(double %a, double %b, double %c) nounwind readnone {240entry:241; ALL-LABEL: FOO11double:242 243; 32-NOMADD-DAG: ldc1 $[[T0:f[0-9]+]], 16($sp)244; 32-NOMADD-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f14245; 32-NOMADD-DAG: sub.d $[[T2:f[0-9]+]], $[[T1]], $[[T0]]246; 32-NOMADD-DAG: mtc1 $zero, $[[T2:f[0-9]+]]247; 32-NOMADD-DAG: add.d $f0, $[[T1]], $[[T2]]248 249; 32R2: ldc1 $[[T0:f[0-9]+]], 16($sp)250; 32R2: msub.d $[[T1:f[0-9]+]], $[[T0]], $f12, $f14251; 32R2: mtc1 $zero, $[[T2:f[0-9]+]]252; 32R2: mthc1 $zero, $[[T2]]253; 32R2: add.d $f0, $[[T1]], $[[T2]]254 255; 32R6-NOMADD-DAG: ldc1 $[[T0:f[0-9]+]], 16($sp)256; 32R6-NOMADD-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f14257; 32R6-NOMADD-DAG: sub.d $[[T2:f[0-9]+]], $[[T1]], $[[T0]]258; 32R6-NOMADD-DAG: mtc1 $zero, $[[T2:f[0-9]+]]259; 32R6-NOMADD-DAG: add.d $f0, $[[T1]], $[[T2]]260 261; 64-DAG: msub.d $[[T0:f[0-9]+]], $f14, $f12, $f13262; 64-DAG: mtc1 $zero, $[[T1:f[0-9]+]]263; 64-DAG: add.d $f0, $[[T0]], $[[T1]]264 265; 64R2: msub.d $[[T0:f[0-9]+]], $f14, $f12, $f13266; 64R2: mtc1 $zero, $[[T1:f[0-9]+]]267; 64R2: add.d $f0, $[[T0]], $[[T1]]268 269; 64R6-NOMADD-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f13270; 64R6-NOMADD-DAG: sub.d $[[T2:f[0-9]+]], $[[T1]], $f14271; 64R6-NOMADD-DAG: dmtc1 $zero, $[[T2:f[0-9]+]]272; 64R6-NOMADD-DAG: add.d $f0, $[[T1]], $[[T2]]273 274 %mul = fmul double %a, %b275 %sub = fsub double %mul, %c276 %add = fadd double %sub, 0.000000e+00277 ret double %add278}279 280define double @FOO12double(double %a, double %b, double %c) nounwind readnone {281entry:282; ALL-LABEL: FOO12double:283 284; 32-NOMADD-DAG: ldc1 $[[T0:f[0-9]+]], 16($sp)285; 32-NOMADD-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f14286; 32-NOMADD-DAG: add.d $[[T2:f[0-9]+]], $[[T1]], $[[T0]]287; 32-NOMADD-DAG: mtc1 $zero, $[[T2:f[0-9]+]]288; 32-NOMADD-DAG: sub.d $f0, $[[T2]], $[[T1]]289 290; 32R2-NONAN: ldc1 $[[T0:f[0-9]+]], 16($sp)291; 32R2-NONAN: nmadd.d $f0, $[[T0]], $f12, $f14292 293; 32R2-NAN: ldc1 $[[T0:f[0-9]+]], 16($sp)294; 32R2-NAN: madd.d $[[T1:f[0-9]+]], $[[T0]], $f12, $f14295; 32R2-NAN: mtc1 $zero, $[[T2:f[0-9]+]]296; 32R2-NAN: mthc1 $zero, $[[T2]]297; 32R2-NAN: sub.d $f0, $[[T2]], $[[T1]]298 299; 32R6-NOMADD-DAG: ldc1 $[[T0:f[0-9]+]], 16($sp)300; 32R6-NOMADD-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f14301; 32R6-NOMADD-DAG: add.d $[[T2:f[0-9]+]], $[[T1]], $[[T0]]302; 32R6-NOMADD-DAG: mtc1 $zero, $[[T2:f[0-9]+]]303; 32R6-NOMADD-DAG: sub.d $f0, $[[T2]], $[[T1]]304 305; 64-NONAN: nmadd.d $f0, $f14, $f12, $f13306 307; 64-NAN: madd.d $[[T0:f[0-9]+]], $f14, $f12, $f13308; 64-NAN: mtc1 $zero, $[[T1:f[0-9]+]]309; 64-NAN: sub.d $f0, $[[T1]], $[[T0]]310 311; 64R2-NONAN: nmadd.d $f0, $f14, $f12, $f13312 313; 64R2-NAN: madd.d $[[T0:f[0-9]+]], $f14, $f12, $f13314; 64R2-NAN: mtc1 $zero, $[[T1:f[0-9]+]]315; 64R2-NAN: sub.d $f0, $[[T1]], $[[T0]]316 317; 64R6-NOMADD-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f13318; 64R6-NOMADD-DAG: add.d $[[T2:f[0-9]+]], $[[T1]], $f14319; 64R6-NOMADD-DAG: dmtc1 $zero, $[[T2:f[0-9]+]]320; 64R6-NOMADD-DAG: sub.d $f0, $[[T2]], $[[T1]]321 322 %mul = fmul double %a, %b323 %add = fadd double %mul, %c324 %sub = fsub double 0.000000e+00, %add325 ret double %sub326}327 328define double @FOO13double(double %a, double %b, double %c) nounwind readnone {329entry:330; ALL-LABEL: FOO13double:331 332; 32-NOMADD-DAG: ldc1 $[[T0:f[0-9]+]], 16($sp)333; 32-NOMADD-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f14334; 32-NOMADD-DAG: sub.d $[[T2:f[0-9]+]], $[[T1]], $[[T0]]335; 32-NOMADD-DAG: mtc1 $zero, $[[T2:f[0-9]+]]336; 32-NOMADD-DAG: sub.d $f0, $[[T2]], $[[T1]]337 338; 32R2-NONAN: ldc1 $[[T0:f[0-9]+]], 16($sp)339; 32R2-NONAN: nmsub.d $f0, $[[T0]], $f12, $f14340 341; 32R2-NAN: ldc1 $[[T0:f[0-9]+]], 16($sp)342; 32R2-NAN: msub.d $[[T1:f[0-9]+]], $[[T0]], $f12, $f14343; 32R2-NAN: mtc1 $zero, $[[T2:f[0-9]+]]344; 32R2-NAN: mthc1 $zero, $[[T2]]345; 32R2-NAN: sub.d $f0, $[[T2]], $[[T1]]346 347; 32R6-NOMADD-DAG: ldc1 $[[T0:f[0-9]+]], 16($sp)348; 32R6-NOMADD-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f14349; 32R6-NOMADD-DAG: sub.d $[[T2:f[0-9]+]], $[[T1]], $[[T0]]350; 32R6-NOMADD-DAG: mtc1 $zero, $[[T2:f[0-9]+]]351; 32R6-NOMADD-DAG: sub.d $f0, $[[T2]], $[[T1]]352 353; 64-NONAN: nmsub.d $f0, $f14, $f12, $f13354 355; 64-NAN: msub.d $[[T0:f[0-9]+]], $f14, $f12, $f13356; 64-NAN: mtc1 $zero, $[[T1:f[0-9]+]]357; 64-NAN: sub.d $f0, $[[T1]], $[[T0]]358 359; 64R2-NONAN: nmsub.d $f0, $f14, $f12, $f13360 361; 64R2-NAN: msub.d $[[T0:f[0-9]+]], $f14, $f12, $f13362; 64R2-NAN: mtc1 $zero, $[[T1:f[0-9]+]]363; 64R2-NAN: sub.d $f0, $[[T1]], $[[T0]]364 365; 64R6-NOMADD-DAG: mul.d $[[T1:f[0-9]+]], $f12, $f13366; 64R6-NOMADD-DAG: sub.d $[[T2:f[0-9]+]], $[[T1]], $f14367; 64R6-NOMADD-DAG: dmtc1 $zero, $[[T2:f[0-9]+]]368; 64R6-NOMADD-DAG: sub.d $f0, $[[T2]], $[[T1]]369 370 %mul = fmul double %a, %b371 %sub = fsub double %mul, %c372 %sub1 = fsub double 0.000000e+00, %sub373 ret double %sub1374}375