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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=mips-linux-gnu -mcpu=mips32 | FileCheck %s --check-prefixes=CHECK,CHECK-BE3; RUN: llc < %s -mtriple=mipsel-linux-gnu -mcpu=mips32 | FileCheck %s --check-prefixes=CHECK,CHECK-LE4 5declare i8 @llvm.fshl.i8(i8, i8, i8)6declare i16 @llvm.fshl.i16(i16, i16, i16)7declare i32 @llvm.fshl.i32(i32, i32, i32)8declare i64 @llvm.fshl.i64(i64, i64, i64)9declare <4 x i32> @llvm.fshl.v4i32(<4 x i32>, <4 x i32>, <4 x i32>)10 11declare i8 @llvm.fshr.i8(i8, i8, i8)12declare i16 @llvm.fshr.i16(i16, i16, i16)13declare i32 @llvm.fshr.i32(i32, i32, i32)14declare i64 @llvm.fshr.i64(i64, i64, i64)15declare <4 x i32> @llvm.fshr.v4i32(<4 x i32>, <4 x i32>, <4 x i32>)16 17; General case - all operands can be variables.18 19define i16 @fshl_i16(i16 %x, i16 %y, i16 %z) {20; CHECK-LABEL: fshl_i16:21; CHECK: # %bb.0:22; CHECK-NEXT: andi $1, $5, 6553523; CHECK-NEXT: sll $2, $4, 1624; CHECK-NEXT: or $1, $2, $125; CHECK-NEXT: andi $2, $6, 1526; CHECK-NEXT: sllv $1, $1, $227; CHECK-NEXT: jr $ra28; CHECK-NEXT: srl $2, $1, 1629 %f = call i16 @llvm.fshl.i16(i16 %x, i16 %y, i16 %z)30 ret i16 %f31}32 33define i32 @fshl_i32(i32 %x, i32 %y, i32 %z) {34; CHECK-LABEL: fshl_i32:35; CHECK: # %bb.0:36; CHECK-NEXT: sllv $1, $4, $637; CHECK-NEXT: not $2, $638; CHECK-NEXT: srl $3, $5, 139; CHECK-NEXT: srlv $2, $3, $240; CHECK-NEXT: jr $ra41; CHECK-NEXT: or $2, $1, $242 %f = call i32 @llvm.fshl.i32(i32 %x, i32 %y, i32 %z)43 ret i32 %f44}45 46; Verify that weird types are minimally supported.47declare i37 @llvm.fshl.i37(i37, i37, i37)48define i37 @fshl_i37(i37 %x, i37 %y, i37 %z) {49; CHECK-BE-LABEL: fshl_i37:50; CHECK-BE: # %bb.0:51; CHECK-BE-NEXT: addiu $sp, $sp, -4052; CHECK-BE-NEXT: .cfi_def_cfa_offset 4053; CHECK-BE-NEXT: sw $ra, 36($sp) # 4-byte Folded Spill54; CHECK-BE-NEXT: sw $19, 32($sp) # 4-byte Folded Spill55; CHECK-BE-NEXT: sw $18, 28($sp) # 4-byte Folded Spill56; CHECK-BE-NEXT: sw $17, 24($sp) # 4-byte Folded Spill57; CHECK-BE-NEXT: sw $16, 20($sp) # 4-byte Folded Spill58; CHECK-BE-NEXT: .cfi_offset 31, -459; CHECK-BE-NEXT: .cfi_offset 19, -860; CHECK-BE-NEXT: .cfi_offset 18, -1261; CHECK-BE-NEXT: .cfi_offset 17, -1662; CHECK-BE-NEXT: .cfi_offset 16, -2063; CHECK-BE-NEXT: move $16, $764; CHECK-BE-NEXT: move $17, $665; CHECK-BE-NEXT: move $18, $566; CHECK-BE-NEXT: move $19, $467; CHECK-BE-NEXT: lw $1, 56($sp)68; CHECK-BE-NEXT: andi $4, $1, 3169; CHECK-BE-NEXT: lw $5, 60($sp)70; CHECK-BE-NEXT: addiu $6, $zero, 071; CHECK-BE-NEXT: jal __umoddi372; CHECK-BE-NEXT: addiu $7, $zero, 3773; CHECK-BE-NEXT: srl $1, $3, 574; CHECK-BE-NEXT: andi $1, $1, 175; CHECK-BE-NEXT: movn $19, $18, $176; CHECK-BE-NEXT: sllv $2, $19, $377; CHECK-BE-NEXT: not $4, $378; CHECK-BE-NEXT: srl $5, $16, 579; CHECK-BE-NEXT: sll $6, $17, 2780; CHECK-BE-NEXT: or $5, $6, $581; CHECK-BE-NEXT: movn $18, $5, $182; CHECK-BE-NEXT: srl $6, $18, 183; CHECK-BE-NEXT: srlv $6, $6, $484; CHECK-BE-NEXT: or $2, $2, $685; CHECK-BE-NEXT: sllv $3, $18, $386; CHECK-BE-NEXT: sll $6, $16, 2787; CHECK-BE-NEXT: movn $5, $6, $188; CHECK-BE-NEXT: srl $1, $5, 189; CHECK-BE-NEXT: srlv $1, $1, $490; CHECK-BE-NEXT: or $3, $3, $191; CHECK-BE-NEXT: lw $16, 20($sp) # 4-byte Folded Reload92; CHECK-BE-NEXT: lw $17, 24($sp) # 4-byte Folded Reload93; CHECK-BE-NEXT: lw $18, 28($sp) # 4-byte Folded Reload94; CHECK-BE-NEXT: lw $19, 32($sp) # 4-byte Folded Reload95; CHECK-BE-NEXT: lw $ra, 36($sp) # 4-byte Folded Reload96; CHECK-BE-NEXT: jr $ra97; CHECK-BE-NEXT: addiu $sp, $sp, 4098;99; CHECK-LE-LABEL: fshl_i37:100; CHECK-LE: # %bb.0:101; CHECK-LE-NEXT: addiu $sp, $sp, -40102; CHECK-LE-NEXT: .cfi_def_cfa_offset 40103; CHECK-LE-NEXT: sw $ra, 36($sp) # 4-byte Folded Spill104; CHECK-LE-NEXT: sw $19, 32($sp) # 4-byte Folded Spill105; CHECK-LE-NEXT: sw $18, 28($sp) # 4-byte Folded Spill106; CHECK-LE-NEXT: sw $17, 24($sp) # 4-byte Folded Spill107; CHECK-LE-NEXT: sw $16, 20($sp) # 4-byte Folded Spill108; CHECK-LE-NEXT: .cfi_offset 31, -4109; CHECK-LE-NEXT: .cfi_offset 19, -8110; CHECK-LE-NEXT: .cfi_offset 18, -12111; CHECK-LE-NEXT: .cfi_offset 17, -16112; CHECK-LE-NEXT: .cfi_offset 16, -20113; CHECK-LE-NEXT: move $16, $7114; CHECK-LE-NEXT: move $17, $6115; CHECK-LE-NEXT: move $18, $5116; CHECK-LE-NEXT: move $19, $4117; CHECK-LE-NEXT: lw $1, 60($sp)118; CHECK-LE-NEXT: andi $5, $1, 31119; CHECK-LE-NEXT: lw $4, 56($sp)120; CHECK-LE-NEXT: addiu $6, $zero, 37121; CHECK-LE-NEXT: jal __umoddi3122; CHECK-LE-NEXT: addiu $7, $zero, 0123; CHECK-LE-NEXT: srl $1, $2, 5124; CHECK-LE-NEXT: andi $3, $1, 1125; CHECK-LE-NEXT: srl $1, $17, 5126; CHECK-LE-NEXT: sll $4, $16, 27127; CHECK-LE-NEXT: or $1, $4, $1128; CHECK-LE-NEXT: move $4, $19129; CHECK-LE-NEXT: movn $4, $1, $3130; CHECK-LE-NEXT: sllv $5, $4, $2131; CHECK-LE-NEXT: not $6, $2132; CHECK-LE-NEXT: sll $7, $17, 27133; CHECK-LE-NEXT: movn $1, $7, $3134; CHECK-LE-NEXT: srl $1, $1, 1135; CHECK-LE-NEXT: srlv $1, $1, $6136; CHECK-LE-NEXT: or $1, $5, $1137; CHECK-LE-NEXT: movn $18, $19, $3138; CHECK-LE-NEXT: sllv $2, $18, $2139; CHECK-LE-NEXT: srl $3, $4, 1140; CHECK-LE-NEXT: srlv $3, $3, $6141; CHECK-LE-NEXT: or $3, $2, $3142; CHECK-LE-NEXT: move $2, $1143; CHECK-LE-NEXT: lw $16, 20($sp) # 4-byte Folded Reload144; CHECK-LE-NEXT: lw $17, 24($sp) # 4-byte Folded Reload145; CHECK-LE-NEXT: lw $18, 28($sp) # 4-byte Folded Reload146; CHECK-LE-NEXT: lw $19, 32($sp) # 4-byte Folded Reload147; CHECK-LE-NEXT: lw $ra, 36($sp) # 4-byte Folded Reload148; CHECK-LE-NEXT: jr $ra149; CHECK-LE-NEXT: addiu $sp, $sp, 40150 %f = call i37 @llvm.fshl.i37(i37 %x, i37 %y, i37 %z)151 ret i37 %f152}153 154; extract(concat(0b1110000, 0b1111111) << 2) = 0b1000011155 156declare i7 @llvm.fshl.i7(i7, i7, i7)157define i7 @fshl_i7_const_fold() {158; CHECK-LABEL: fshl_i7_const_fold:159; CHECK: # %bb.0:160; CHECK-NEXT: jr $ra161; CHECK-NEXT: addiu $2, $zero, 67162 %f = call i7 @llvm.fshl.i7(i7 112, i7 127, i7 2)163 ret i7 %f164}165 166define i8 @fshl_i8_const_fold_overshift_1() {167; CHECK-LABEL: fshl_i8_const_fold_overshift_1:168; CHECK: # %bb.0:169; CHECK-NEXT: jr $ra170; CHECK-NEXT: addiu $2, $zero, 128171 %f = call i8 @llvm.fshl.i8(i8 255, i8 0, i8 15)172 ret i8 %f173}174 175define i8 @fshl_i8_const_fold_overshift_2() {176; CHECK-LABEL: fshl_i8_const_fold_overshift_2:177; CHECK: # %bb.0:178; CHECK-NEXT: jr $ra179; CHECK-NEXT: addiu $2, $zero, 120180 %f = call i8 @llvm.fshl.i8(i8 15, i8 15, i8 11)181 ret i8 %f182}183 184define i8 @fshl_i8_const_fold_overshift_3() {185; CHECK-LABEL: fshl_i8_const_fold_overshift_3:186; CHECK: # %bb.0:187; CHECK-NEXT: jr $ra188; CHECK-NEXT: addiu $2, $zero, 0189 %f = call i8 @llvm.fshl.i8(i8 0, i8 225, i8 8)190 ret i8 %f191}192 193; With constant shift amount, this is 'extr'.194 195define i32 @fshl_i32_const_shift(i32 %x, i32 %y) {196; CHECK-LABEL: fshl_i32_const_shift:197; CHECK: # %bb.0:198; CHECK-NEXT: srl $1, $5, 23199; CHECK-NEXT: sll $2, $4, 9200; CHECK-NEXT: jr $ra201; CHECK-NEXT: or $2, $2, $1202 %f = call i32 @llvm.fshl.i32(i32 %x, i32 %y, i32 9)203 ret i32 %f204}205 206; Check modulo math on shift amount.207 208define i32 @fshl_i32_const_overshift(i32 %x, i32 %y) {209; CHECK-LABEL: fshl_i32_const_overshift:210; CHECK: # %bb.0:211; CHECK-NEXT: srl $1, $5, 23212; CHECK-NEXT: sll $2, $4, 9213; CHECK-NEXT: jr $ra214; CHECK-NEXT: or $2, $2, $1215 %f = call i32 @llvm.fshl.i32(i32 %x, i32 %y, i32 41)216 ret i32 %f217}218 219; 64-bit should also work.220 221define i64 @fshl_i64_const_overshift(i64 %x, i64 %y) {222; CHECK-BE-LABEL: fshl_i64_const_overshift:223; CHECK-BE: # %bb.0:224; CHECK-BE-NEXT: srl $1, $6, 23225; CHECK-BE-NEXT: sll $2, $5, 9226; CHECK-BE-NEXT: or $2, $2, $1227; CHECK-BE-NEXT: srl $1, $7, 23228; CHECK-BE-NEXT: sll $3, $6, 9229; CHECK-BE-NEXT: jr $ra230; CHECK-BE-NEXT: or $3, $3, $1231;232; CHECK-LE-LABEL: fshl_i64_const_overshift:233; CHECK-LE: # %bb.0:234; CHECK-LE-NEXT: srl $1, $6, 23235; CHECK-LE-NEXT: sll $2, $7, 9236; CHECK-LE-NEXT: or $2, $2, $1237; CHECK-LE-NEXT: srl $1, $7, 23238; CHECK-LE-NEXT: sll $3, $4, 9239; CHECK-LE-NEXT: jr $ra240; CHECK-LE-NEXT: or $3, $3, $1241 %f = call i64 @llvm.fshl.i64(i64 %x, i64 %y, i64 105)242 ret i64 %f243}244 245; This should work without any node-specific logic.246 247define i8 @fshl_i8_const_fold() {248; CHECK-LABEL: fshl_i8_const_fold:249; CHECK: # %bb.0:250; CHECK-NEXT: jr $ra251; CHECK-NEXT: addiu $2, $zero, 128252 %f = call i8 @llvm.fshl.i8(i8 255, i8 0, i8 7)253 ret i8 %f254}255 256; Repeat everything for funnel shift right.257 258; General case - all operands can be variables.259 260define i16 @fshr_i16(i16 %x, i16 %y, i16 %z) {261; CHECK-LABEL: fshr_i16:262; CHECK: # %bb.0:263; CHECK-NEXT: andi $1, $5, 65535264; CHECK-NEXT: sll $2, $4, 16265; CHECK-NEXT: or $1, $2, $1266; CHECK-NEXT: andi $2, $6, 15267; CHECK-NEXT: jr $ra268; CHECK-NEXT: srlv $2, $1, $2269 %f = call i16 @llvm.fshr.i16(i16 %x, i16 %y, i16 %z)270 ret i16 %f271}272 273define i32 @fshr_i32(i32 %x, i32 %y, i32 %z) {274; CHECK-LABEL: fshr_i32:275; CHECK: # %bb.0:276; CHECK-NEXT: srlv $1, $5, $6277; CHECK-NEXT: not $2, $6278; CHECK-NEXT: sll $3, $4, 1279; CHECK-NEXT: sllv $2, $3, $2280; CHECK-NEXT: jr $ra281; CHECK-NEXT: or $2, $2, $1282 %f = call i32 @llvm.fshr.i32(i32 %x, i32 %y, i32 %z)283 ret i32 %f284}285 286; Verify that weird types are minimally supported.287declare i37 @llvm.fshr.i37(i37, i37, i37)288define i37 @fshr_i37(i37 %x, i37 %y, i37 %z) {289; CHECK-BE-LABEL: fshr_i37:290; CHECK-BE: # %bb.0:291; CHECK-BE-NEXT: addiu $sp, $sp, -40292; CHECK-BE-NEXT: .cfi_def_cfa_offset 40293; CHECK-BE-NEXT: sw $ra, 36($sp) # 4-byte Folded Spill294; CHECK-BE-NEXT: sw $19, 32($sp) # 4-byte Folded Spill295; CHECK-BE-NEXT: sw $18, 28($sp) # 4-byte Folded Spill296; CHECK-BE-NEXT: sw $17, 24($sp) # 4-byte Folded Spill297; CHECK-BE-NEXT: sw $16, 20($sp) # 4-byte Folded Spill298; CHECK-BE-NEXT: .cfi_offset 31, -4299; CHECK-BE-NEXT: .cfi_offset 19, -8300; CHECK-BE-NEXT: .cfi_offset 18, -12301; CHECK-BE-NEXT: .cfi_offset 17, -16302; CHECK-BE-NEXT: .cfi_offset 16, -20303; CHECK-BE-NEXT: move $16, $7304; CHECK-BE-NEXT: move $17, $6305; CHECK-BE-NEXT: move $18, $5306; CHECK-BE-NEXT: move $19, $4307; CHECK-BE-NEXT: lw $1, 56($sp)308; CHECK-BE-NEXT: andi $4, $1, 31309; CHECK-BE-NEXT: lw $5, 60($sp)310; CHECK-BE-NEXT: addiu $6, $zero, 0311; CHECK-BE-NEXT: jal __umoddi3312; CHECK-BE-NEXT: addiu $7, $zero, 37313; CHECK-BE-NEXT: addiu $1, $3, 27314; CHECK-BE-NEXT: andi $3, $1, 32315; CHECK-BE-NEXT: srl $2, $16, 5316; CHECK-BE-NEXT: sll $4, $17, 27317; CHECK-BE-NEXT: or $4, $4, $2318; CHECK-BE-NEXT: movz $19, $18, $3319; CHECK-BE-NEXT: movz $18, $4, $3320; CHECK-BE-NEXT: srlv $2, $18, $1321; CHECK-BE-NEXT: not $5, $1322; CHECK-BE-NEXT: sll $6, $19, 1323; CHECK-BE-NEXT: sllv $6, $6, $5324; CHECK-BE-NEXT: sll $7, $16, 27325; CHECK-BE-NEXT: or $2, $6, $2326; CHECK-BE-NEXT: movz $4, $7, $3327; CHECK-BE-NEXT: srlv $1, $4, $1328; CHECK-BE-NEXT: sll $3, $18, 1329; CHECK-BE-NEXT: sllv $3, $3, $5330; CHECK-BE-NEXT: or $3, $3, $1331; CHECK-BE-NEXT: lw $16, 20($sp) # 4-byte Folded Reload332; CHECK-BE-NEXT: lw $17, 24($sp) # 4-byte Folded Reload333; CHECK-BE-NEXT: lw $18, 28($sp) # 4-byte Folded Reload334; CHECK-BE-NEXT: lw $19, 32($sp) # 4-byte Folded Reload335; CHECK-BE-NEXT: lw $ra, 36($sp) # 4-byte Folded Reload336; CHECK-BE-NEXT: jr $ra337; CHECK-BE-NEXT: addiu $sp, $sp, 40338;339; CHECK-LE-LABEL: fshr_i37:340; CHECK-LE: # %bb.0:341; CHECK-LE-NEXT: addiu $sp, $sp, -40342; CHECK-LE-NEXT: .cfi_def_cfa_offset 40343; CHECK-LE-NEXT: sw $ra, 36($sp) # 4-byte Folded Spill344; CHECK-LE-NEXT: sw $19, 32($sp) # 4-byte Folded Spill345; CHECK-LE-NEXT: sw $18, 28($sp) # 4-byte Folded Spill346; CHECK-LE-NEXT: sw $17, 24($sp) # 4-byte Folded Spill347; CHECK-LE-NEXT: sw $16, 20($sp) # 4-byte Folded Spill348; CHECK-LE-NEXT: .cfi_offset 31, -4349; CHECK-LE-NEXT: .cfi_offset 19, -8350; CHECK-LE-NEXT: .cfi_offset 18, -12351; CHECK-LE-NEXT: .cfi_offset 17, -16352; CHECK-LE-NEXT: .cfi_offset 16, -20353; CHECK-LE-NEXT: move $16, $7354; CHECK-LE-NEXT: move $17, $6355; CHECK-LE-NEXT: move $18, $5356; CHECK-LE-NEXT: move $19, $4357; CHECK-LE-NEXT: lw $1, 60($sp)358; CHECK-LE-NEXT: andi $5, $1, 31359; CHECK-LE-NEXT: lw $4, 56($sp)360; CHECK-LE-NEXT: addiu $6, $zero, 37361; CHECK-LE-NEXT: jal __umoddi3362; CHECK-LE-NEXT: addiu $7, $zero, 0363; CHECK-LE-NEXT: addiu $1, $2, 27364; CHECK-LE-NEXT: andi $3, $1, 32365; CHECK-LE-NEXT: srl $2, $17, 5366; CHECK-LE-NEXT: sll $4, $16, 27367; CHECK-LE-NEXT: or $2, $4, $2368; CHECK-LE-NEXT: sll $4, $17, 27369; CHECK-LE-NEXT: move $5, $19370; CHECK-LE-NEXT: movz $5, $2, $3371; CHECK-LE-NEXT: movz $2, $4, $3372; CHECK-LE-NEXT: srlv $2, $2, $1373; CHECK-LE-NEXT: not $4, $1374; CHECK-LE-NEXT: sll $6, $5, 1375; CHECK-LE-NEXT: sllv $6, $6, $4376; CHECK-LE-NEXT: or $2, $6, $2377; CHECK-LE-NEXT: srlv $1, $5, $1378; CHECK-LE-NEXT: movz $18, $19, $3379; CHECK-LE-NEXT: sll $3, $18, 1380; CHECK-LE-NEXT: sllv $3, $3, $4381; CHECK-LE-NEXT: or $3, $3, $1382; CHECK-LE-NEXT: lw $16, 20($sp) # 4-byte Folded Reload383; CHECK-LE-NEXT: lw $17, 24($sp) # 4-byte Folded Reload384; CHECK-LE-NEXT: lw $18, 28($sp) # 4-byte Folded Reload385; CHECK-LE-NEXT: lw $19, 32($sp) # 4-byte Folded Reload386; CHECK-LE-NEXT: lw $ra, 36($sp) # 4-byte Folded Reload387; CHECK-LE-NEXT: jr $ra388; CHECK-LE-NEXT: addiu $sp, $sp, 40389 %f = call i37 @llvm.fshr.i37(i37 %x, i37 %y, i37 %z)390 ret i37 %f391}392 393; extract(concat(0b1110000, 0b1111111) >> 2) = 0b0011111394 395declare i7 @llvm.fshr.i7(i7, i7, i7)396define i7 @fshr_i7_const_fold() {397; CHECK-LABEL: fshr_i7_const_fold:398; CHECK: # %bb.0:399; CHECK-NEXT: jr $ra400; CHECK-NEXT: addiu $2, $zero, 31401 %f = call i7 @llvm.fshr.i7(i7 112, i7 127, i7 2)402 ret i7 %f403}404 405define i8 @fshr_i8_const_fold_overshift_1() {406; CHECK-LABEL: fshr_i8_const_fold_overshift_1:407; CHECK: # %bb.0:408; CHECK-NEXT: jr $ra409; CHECK-NEXT: addiu $2, $zero, 254410 %f = call i8 @llvm.fshr.i8(i8 255, i8 0, i8 15)411 ret i8 %f412}413 414define i8 @fshr_i8_const_fold_overshift_2() {415; CHECK-LABEL: fshr_i8_const_fold_overshift_2:416; CHECK: # %bb.0:417; CHECK-NEXT: jr $ra418; CHECK-NEXT: addiu $2, $zero, 225419 %f = call i8 @llvm.fshr.i8(i8 15, i8 15, i8 11)420 ret i8 %f421}422 423define i8 @fshr_i8_const_fold_overshift_3() {424; CHECK-LABEL: fshr_i8_const_fold_overshift_3:425; CHECK: # %bb.0:426; CHECK-NEXT: jr $ra427; CHECK-NEXT: addiu $2, $zero, 255428 %f = call i8 @llvm.fshr.i8(i8 0, i8 255, i8 8)429 ret i8 %f430}431 432; With constant shift amount, this is 'extr'.433 434define i32 @fshr_i32_const_shift(i32 %x, i32 %y) {435; CHECK-LABEL: fshr_i32_const_shift:436; CHECK: # %bb.0:437; CHECK-NEXT: srl $1, $5, 9438; CHECK-NEXT: sll $2, $4, 23439; CHECK-NEXT: jr $ra440; CHECK-NEXT: or $2, $2, $1441 %f = call i32 @llvm.fshr.i32(i32 %x, i32 %y, i32 9)442 ret i32 %f443}444 445; Check modulo math on shift amount. 41-32=9.446 447define i32 @fshr_i32_const_overshift(i32 %x, i32 %y) {448; CHECK-LABEL: fshr_i32_const_overshift:449; CHECK: # %bb.0:450; CHECK-NEXT: srl $1, $5, 9451; CHECK-NEXT: sll $2, $4, 23452; CHECK-NEXT: jr $ra453; CHECK-NEXT: or $2, $2, $1454 %f = call i32 @llvm.fshr.i32(i32 %x, i32 %y, i32 41)455 ret i32 %f456}457 458; 64-bit should also work. 105-64 = 41.459 460define i64 @fshr_i64_const_overshift(i64 %x, i64 %y) {461; CHECK-BE-LABEL: fshr_i64_const_overshift:462; CHECK-BE: # %bb.0:463; CHECK-BE-NEXT: srl $1, $5, 9464; CHECK-BE-NEXT: sll $2, $4, 23465; CHECK-BE-NEXT: or $2, $2, $1466; CHECK-BE-NEXT: srl $1, $6, 9467; CHECK-BE-NEXT: sll $3, $5, 23468; CHECK-BE-NEXT: jr $ra469; CHECK-BE-NEXT: or $3, $3, $1470;471; CHECK-LE-LABEL: fshr_i64_const_overshift:472; CHECK-LE: # %bb.0:473; CHECK-LE-NEXT: srl $1, $7, 9474; CHECK-LE-NEXT: sll $2, $4, 23475; CHECK-LE-NEXT: or $2, $2, $1476; CHECK-LE-NEXT: srl $1, $4, 9477; CHECK-LE-NEXT: sll $3, $5, 23478; CHECK-LE-NEXT: jr $ra479; CHECK-LE-NEXT: or $3, $3, $1480 %f = call i64 @llvm.fshr.i64(i64 %x, i64 %y, i64 105)481 ret i64 %f482}483 484; This should work without any node-specific logic.485 486define i8 @fshr_i8_const_fold() {487; CHECK-LABEL: fshr_i8_const_fold:488; CHECK: # %bb.0:489; CHECK-NEXT: jr $ra490; CHECK-NEXT: addiu $2, $zero, 254491 %f = call i8 @llvm.fshr.i8(i8 255, i8 0, i8 7)492 ret i8 %f493}494 495define i32 @fshl_i32_shift_by_bitwidth(i32 %x, i32 %y) {496; CHECK-LABEL: fshl_i32_shift_by_bitwidth:497; CHECK: # %bb.0:498; CHECK-NEXT: jr $ra499; CHECK-NEXT: move $2, $4500 %f = call i32 @llvm.fshl.i32(i32 %x, i32 %y, i32 32)501 ret i32 %f502}503 504define i32 @fshr_i32_shift_by_bitwidth(i32 %x, i32 %y) {505; CHECK-LABEL: fshr_i32_shift_by_bitwidth:506; CHECK: # %bb.0:507; CHECK-NEXT: jr $ra508; CHECK-NEXT: move $2, $5509 %f = call i32 @llvm.fshr.i32(i32 %x, i32 %y, i32 32)510 ret i32 %f511}512 513define <4 x i32> @fshl_v4i32_shift_by_bitwidth(<4 x i32> %x, <4 x i32> %y) {514; CHECK-LABEL: fshl_v4i32_shift_by_bitwidth:515; CHECK: # %bb.0:516; CHECK-NEXT: move $2, $4517; CHECK-NEXT: move $3, $5518; CHECK-NEXT: move $4, $6519; CHECK-NEXT: jr $ra520; CHECK-NEXT: move $5, $7521 %f = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %x, <4 x i32> %y, <4 x i32> <i32 32, i32 32, i32 32, i32 32>)522 ret <4 x i32> %f523}524 525define <4 x i32> @fshr_v4i32_shift_by_bitwidth(<4 x i32> %x, <4 x i32> %y) {526; CHECK-LABEL: fshr_v4i32_shift_by_bitwidth:527; CHECK: # %bb.0:528; CHECK-NEXT: lw $5, 28($sp)529; CHECK-NEXT: lw $4, 24($sp)530; CHECK-NEXT: lw $3, 20($sp)531; CHECK-NEXT: lw $2, 16($sp)532; CHECK-NEXT: jr $ra533; CHECK-NEXT: nop534 %f = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %x, <4 x i32> %y, <4 x i32> <i32 32, i32 32, i32 32, i32 32>)535 ret <4 x i32> %f536}537 538