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1; RUN: llc -no-integrated-as -mtriple=mipsel < %s | \2; RUN: FileCheck %s -check-prefixes=ALL,GAS3; RUN: llc -mtriple=mipsel < %s | FileCheck %s -check-prefixes=ALL,IAS4 5define void @constraint_I() nounwind {6; First I with short7; ALL-LABEL: constraint_I:8; ALL: #APP9; ALL: addiu ${{[0-9]+}}, ${{[0-9]+}}, 409610; ALL: #NO_APP11 tail call i16 asm sideeffect "addiu $0, $1, $2", "=r,r,I"(i16 7, i16 4096) nounwind12 13; Then I with int14; ALL: #APP15; ALL: addiu ${{[0-9]+}}, ${{[0-9]+}}, -316; ALL: #NO_APP17 tail call i32 asm sideeffect "addiu $0, $1, $2", "=r,r,I"(i32 7, i32 -3) nounwind18 ret void19}20 21define void @constraint_J() nounwind {22; Now J with 023; ALL-LABEL: constraint_J:24; ALL: #APP25; ALL: addiu ${{[0-9]+}}, ${{[0-9]+}}, 026; ALL: #NO_APP27 tail call i32 asm sideeffect "addiu $0, $1, $2\0A\09 ", "=r,r,J"(i32 7, i16 0) nounwind28 ret void29}30 31define void @constraint_K() nounwind {32; Now K with 6433; ALL: #APP34; GAS: addu ${{[0-9]+}}, ${{[0-9]+}}, 6435; IAS: addiu ${{[0-9]+}}, ${{[0-9]+}}, 6436; ALL: #NO_APP 37 tail call i16 asm sideeffect "addu $0, $1, $2\0A\09 ", "=r,r,K"(i16 7, i16 64) nounwind38 ret void39}40 41define void @constraint_L() nounwind {42; Now L with 0x0010000043; ALL: #APP44; ALL: add ${{[0-9]+}}, ${{[0-9]+}}, ${{[0-9]+}}45; ALL: #NO_APP 46 tail call i32 asm sideeffect "add $0, $1, $3\0A\09", "=r,r,L,r"(i32 7, i32 1048576, i32 0) nounwind47 ret void48}49 50define void @constraint_N() nounwind {51; Now N with -352; ALL: #APP53; ALL: addiu ${{[0-9]+}}, ${{[0-9]+}}, -354; ALL: #NO_APP 55 tail call i32 asm sideeffect "addiu $0, $1, $2", "=r,r,N"(i32 7, i32 -3) nounwind56 ret void57}58 59define void @constraint_O() nounwind {60; Now O with -361; ALL: #APP62; ALL: addiu ${{[0-9]+}}, ${{[0-9]+}}, -363; ALL: #NO_APP 64 tail call i32 asm sideeffect "addiu $0, $1, $2", "=r,r,O"(i32 7, i16 -3) nounwind65 ret void66}67 68define void @constraint_P() nounwind {69; Now P with 6553570; ALL: #APP71; GAS: addiu ${{[0-9]+}}, ${{[0-9]+}}, 6553572; ALL: #NO_APP73 tail call i32 asm sideeffect "addiu $0, $1, $2", "=r,r,P"(i32 7, i32 65535) nounwind74 ret void75}76