69 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 42; RUN: llc -mtriple=mips -mattr=+single-float < %s | FileCheck %s --check-prefix=MIPS323; RUN: llc -mtriple=mips64 -mattr=+single-float < %s | FileCheck %s --check-prefix=MIPS644 5define void @read_double(ptr %0) {6; MIPS32-LABEL: read_double:7; MIPS32: # %bb.0:8; MIPS32-NEXT: lw $2, 4($4)9; MIPS32-NEXT: lw $3, 0($4)10; MIPS32-NEXT: #APP11; MIPS32-NEXT: #NO_APP12; MIPS32-NEXT: jr $ra13; MIPS32-NEXT: nop14;15; MIPS64-LABEL: read_double:16; MIPS64: # %bb.0:17; MIPS64-NEXT: ld $2, 0($4)18; MIPS64-NEXT: #APP19; MIPS64-NEXT: #NO_APP20; MIPS64-NEXT: jr $ra21; MIPS64-NEXT: nop22 %2 = load double, ptr %0, align 823 tail call void asm sideeffect "", "r,~{$1}"(double %2)24 ret void25}26 27define void @read_float(ptr %0) {28; MIPS32-LABEL: read_float:29; MIPS32: # %bb.0:30; MIPS32-NEXT: lwc1 $f0, 0($4)31; MIPS32-NEXT: #APP32; MIPS32-NEXT: #NO_APP33; MIPS32-NEXT: jr $ra34; MIPS32-NEXT: nop35;36; MIPS64-LABEL: read_float:37; MIPS64: # %bb.0:38; MIPS64-NEXT: lwc1 $f0, 0($4)39; MIPS64-NEXT: #APP40; MIPS64-NEXT: #NO_APP41; MIPS64-NEXT: jr $ra42; MIPS64-NEXT: nop43 %2 = load float, ptr %0, align 844 tail call void asm sideeffect "", "f"(float %2)45 ret void46}47 48; Test that a proper register class is assigned to clobbers in single-float mode49define float @explicit_float_register_clobber(ptr %0) {50; MIPS32-LABEL: explicit_float_register_clobber:51; MIPS32: # %bb.0:52; MIPS32-NEXT: lwc1 $f1, 0($4)53; MIPS32-NEXT: #APP54; MIPS32-NEXT: #NO_APP55; MIPS32-NEXT: jr $ra56; MIPS32-NEXT: mov.s $f0, $f157;58; MIPS64-LABEL: explicit_float_register_clobber:59; MIPS64: # %bb.0:60; MIPS64-NEXT: lwc1 $f1, 0($4)61; MIPS64-NEXT: #APP62; MIPS64-NEXT: #NO_APP63; MIPS64-NEXT: jr $ra64; MIPS64-NEXT: mov.s $f0, $f165 %2 = load float, ptr %0, align 866 tail call void asm sideeffect "", "~{$f0}"()67 ret float %268}69