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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips2 | FileCheck %s \3; RUN: -check-prefix=MIPS4; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32 | FileCheck %s \5; RUN: -check-prefix=MIPS6; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r2 | FileCheck %s \7; RUN: -check-prefix=MIPS32R28; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r3 | FileCheck %s \9; RUN: -check-prefix=MIPS32R210; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r5 | FileCheck %s \11; RUN: -check-prefix=MIPS32R212; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r6 | FileCheck %s \13; RUN: -check-prefix=MIPS32R614; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips3 | FileCheck %s \15; RUN: -check-prefix=MIPS6416; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips4 | FileCheck %s \17; RUN: -check-prefix=MIPS6418; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips64 | FileCheck %s \19; RUN: -check-prefix=MIPS6420; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips64r2 | FileCheck %s \21; RUN: -check-prefix=MIPS64R222; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips64r3 | FileCheck %s \23; RUN: -check-prefix=MIPS64R224; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips64r5 | FileCheck %s \25; RUN: -check-prefix=MIPS64R226; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips64r6 | FileCheck %s \27; RUN: -check-prefix=MIPS64R628; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r3 -mattr=+micromips | FileCheck %s \29; RUN: -check-prefix=MM32R330; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r6 -mattr=+micromips | FileCheck %s \31; RUN: -check-prefix=MM32R632 33define signext i1 @and_i1(i1 signext %a, i1 signext %b) {34; MIPS-LABEL: and_i1:35; MIPS: # %bb.0: # %entry36; MIPS-NEXT: jr $ra37; MIPS-NEXT: and $2, $4, $538;39; MIPS32R2-LABEL: and_i1:40; MIPS32R2: # %bb.0: # %entry41; MIPS32R2-NEXT: jr $ra42; MIPS32R2-NEXT: and $2, $4, $543;44; MIPS32R6-LABEL: and_i1:45; MIPS32R6: # %bb.0: # %entry46; MIPS32R6-NEXT: jr $ra47; MIPS32R6-NEXT: and $2, $4, $548;49; MIPS64-LABEL: and_i1:50; MIPS64: # %bb.0: # %entry51; MIPS64-NEXT: and $1, $4, $552; MIPS64-NEXT: jr $ra53; MIPS64-NEXT: sll $2, $1, 054;55; MIPS64R2-LABEL: and_i1:56; MIPS64R2: # %bb.0: # %entry57; MIPS64R2-NEXT: and $1, $4, $558; MIPS64R2-NEXT: jr $ra59; MIPS64R2-NEXT: sll $2, $1, 060;61; MIPS64R6-LABEL: and_i1:62; MIPS64R6: # %bb.0: # %entry63; MIPS64R6-NEXT: and $1, $4, $564; MIPS64R6-NEXT: jr $ra65; MIPS64R6-NEXT: sll $2, $1, 066;67; MM32R3-LABEL: and_i1:68; MM32R3: # %bb.0: # %entry69; MM32R3-NEXT: and16 $4, $570; MM32R3-NEXT: move $2, $471; MM32R3-NEXT: jrc $ra72;73; MM32R6-LABEL: and_i1:74; MM32R6: # %bb.0: # %entry75; MM32R6-NEXT: and $2, $4, $576; MM32R6-NEXT: jrc $ra77entry:78 %r = and i1 %a, %b79 ret i1 %r80}81 82define signext i8 @and_i8(i8 signext %a, i8 signext %b) {83; MIPS-LABEL: and_i8:84; MIPS: # %bb.0: # %entry85; MIPS-NEXT: jr $ra86; MIPS-NEXT: and $2, $4, $587;88; MIPS32R2-LABEL: and_i8:89; MIPS32R2: # %bb.0: # %entry90; MIPS32R2-NEXT: jr $ra91; MIPS32R2-NEXT: and $2, $4, $592;93; MIPS32R6-LABEL: and_i8:94; MIPS32R6: # %bb.0: # %entry95; MIPS32R6-NEXT: jr $ra96; MIPS32R6-NEXT: and $2, $4, $597;98; MIPS64-LABEL: and_i8:99; MIPS64: # %bb.0: # %entry100; MIPS64-NEXT: and $1, $4, $5101; MIPS64-NEXT: jr $ra102; MIPS64-NEXT: sll $2, $1, 0103;104; MIPS64R2-LABEL: and_i8:105; MIPS64R2: # %bb.0: # %entry106; MIPS64R2-NEXT: and $1, $4, $5107; MIPS64R2-NEXT: jr $ra108; MIPS64R2-NEXT: sll $2, $1, 0109;110; MIPS64R6-LABEL: and_i8:111; MIPS64R6: # %bb.0: # %entry112; MIPS64R6-NEXT: and $1, $4, $5113; MIPS64R6-NEXT: jr $ra114; MIPS64R6-NEXT: sll $2, $1, 0115;116; MM32R3-LABEL: and_i8:117; MM32R3: # %bb.0: # %entry118; MM32R3-NEXT: and16 $4, $5119; MM32R3-NEXT: move $2, $4120; MM32R3-NEXT: jrc $ra121;122; MM32R6-LABEL: and_i8:123; MM32R6: # %bb.0: # %entry124; MM32R6-NEXT: and $2, $4, $5125; MM32R6-NEXT: jrc $ra126entry:127 %r = and i8 %a, %b128 ret i8 %r129}130 131define signext i16 @and_i16(i16 signext %a, i16 signext %b) {132; MIPS-LABEL: and_i16:133; MIPS: # %bb.0: # %entry134; MIPS-NEXT: jr $ra135; MIPS-NEXT: and $2, $4, $5136;137; MIPS32R2-LABEL: and_i16:138; MIPS32R2: # %bb.0: # %entry139; MIPS32R2-NEXT: jr $ra140; MIPS32R2-NEXT: and $2, $4, $5141;142; MIPS32R6-LABEL: and_i16:143; MIPS32R6: # %bb.0: # %entry144; MIPS32R6-NEXT: jr $ra145; MIPS32R6-NEXT: and $2, $4, $5146;147; MIPS64-LABEL: and_i16:148; MIPS64: # %bb.0: # %entry149; MIPS64-NEXT: and $1, $4, $5150; MIPS64-NEXT: jr $ra151; MIPS64-NEXT: sll $2, $1, 0152;153; MIPS64R2-LABEL: and_i16:154; MIPS64R2: # %bb.0: # %entry155; MIPS64R2-NEXT: and $1, $4, $5156; MIPS64R2-NEXT: jr $ra157; MIPS64R2-NEXT: sll $2, $1, 0158;159; MIPS64R6-LABEL: and_i16:160; MIPS64R6: # %bb.0: # %entry161; MIPS64R6-NEXT: and $1, $4, $5162; MIPS64R6-NEXT: jr $ra163; MIPS64R6-NEXT: sll $2, $1, 0164;165; MM32R3-LABEL: and_i16:166; MM32R3: # %bb.0: # %entry167; MM32R3-NEXT: and16 $4, $5168; MM32R3-NEXT: move $2, $4169; MM32R3-NEXT: jrc $ra170;171; MM32R6-LABEL: and_i16:172; MM32R6: # %bb.0: # %entry173; MM32R6-NEXT: and $2, $4, $5174; MM32R6-NEXT: jrc $ra175entry:176 %r = and i16 %a, %b177 ret i16 %r178}179 180define signext i32 @and_i32(i32 signext %a, i32 signext %b) {181; MIPS-LABEL: and_i32:182; MIPS: # %bb.0: # %entry183; MIPS-NEXT: jr $ra184; MIPS-NEXT: and $2, $4, $5185;186; MIPS32R2-LABEL: and_i32:187; MIPS32R2: # %bb.0: # %entry188; MIPS32R2-NEXT: jr $ra189; MIPS32R2-NEXT: and $2, $4, $5190;191; MIPS32R6-LABEL: and_i32:192; MIPS32R6: # %bb.0: # %entry193; MIPS32R6-NEXT: jr $ra194; MIPS32R6-NEXT: and $2, $4, $5195;196; MIPS64-LABEL: and_i32:197; MIPS64: # %bb.0: # %entry198; MIPS64-NEXT: jr $ra199; MIPS64-NEXT: and $2, $4, $5200;201; MIPS64R2-LABEL: and_i32:202; MIPS64R2: # %bb.0: # %entry203; MIPS64R2-NEXT: jr $ra204; MIPS64R2-NEXT: and $2, $4, $5205;206; MIPS64R6-LABEL: and_i32:207; MIPS64R6: # %bb.0: # %entry208; MIPS64R6-NEXT: jr $ra209; MIPS64R6-NEXT: and $2, $4, $5210;211; MM32R3-LABEL: and_i32:212; MM32R3: # %bb.0: # %entry213; MM32R3-NEXT: and16 $4, $5214; MM32R3-NEXT: move $2, $4215; MM32R3-NEXT: jrc $ra216;217; MM32R6-LABEL: and_i32:218; MM32R6: # %bb.0: # %entry219; MM32R6-NEXT: and $2, $4, $5220; MM32R6-NEXT: jrc $ra221entry:222 %r = and i32 %a, %b223 ret i32 %r224}225 226define signext i64 @and_i64(i64 signext %a, i64 signext %b) {227; MIPS-LABEL: and_i64:228; MIPS: # %bb.0: # %entry229; MIPS-NEXT: and $2, $4, $6230; MIPS-NEXT: jr $ra231; MIPS-NEXT: and $3, $5, $7232;233; MIPS32R2-LABEL: and_i64:234; MIPS32R2: # %bb.0: # %entry235; MIPS32R2-NEXT: and $2, $4, $6236; MIPS32R2-NEXT: jr $ra237; MIPS32R2-NEXT: and $3, $5, $7238;239; MIPS32R6-LABEL: and_i64:240; MIPS32R6: # %bb.0: # %entry241; MIPS32R6-NEXT: and $2, $4, $6242; MIPS32R6-NEXT: jr $ra243; MIPS32R6-NEXT: and $3, $5, $7244;245; MIPS64-LABEL: and_i64:246; MIPS64: # %bb.0: # %entry247; MIPS64-NEXT: jr $ra248; MIPS64-NEXT: and $2, $4, $5249;250; MIPS64R2-LABEL: and_i64:251; MIPS64R2: # %bb.0: # %entry252; MIPS64R2-NEXT: jr $ra253; MIPS64R2-NEXT: and $2, $4, $5254;255; MIPS64R6-LABEL: and_i64:256; MIPS64R6: # %bb.0: # %entry257; MIPS64R6-NEXT: jr $ra258; MIPS64R6-NEXT: and $2, $4, $5259;260; MM32R3-LABEL: and_i64:261; MM32R3: # %bb.0: # %entry262; MM32R3-NEXT: and16 $4, $6263; MM32R3-NEXT: and16 $5, $7264; MM32R3-NEXT: move $2, $4265; MM32R3-NEXT: move $3, $5266; MM32R3-NEXT: jrc $ra267;268; MM32R6-LABEL: and_i64:269; MM32R6: # %bb.0: # %entry270; MM32R6-NEXT: and $2, $4, $6271; MM32R6-NEXT: and $3, $5, $7272; MM32R6-NEXT: jrc $ra273entry:274 %r = and i64 %a, %b275 ret i64 %r276}277 278define signext i128 @and_i128(i128 signext %a, i128 signext %b) {279; MIPS-LABEL: and_i128:280; MIPS: # %bb.0: # %entry281; MIPS-NEXT: lw $1, 20($sp)282; MIPS-NEXT: lw $2, 16($sp)283; MIPS-NEXT: and $2, $4, $2284; MIPS-NEXT: and $3, $5, $1285; MIPS-NEXT: lw $1, 24($sp)286; MIPS-NEXT: and $4, $6, $1287; MIPS-NEXT: lw $1, 28($sp)288; MIPS-NEXT: jr $ra289; MIPS-NEXT: and $5, $7, $1290;291; MIPS32R2-LABEL: and_i128:292; MIPS32R2: # %bb.0: # %entry293; MIPS32R2-NEXT: lw $1, 20($sp)294; MIPS32R2-NEXT: lw $2, 16($sp)295; MIPS32R2-NEXT: and $2, $4, $2296; MIPS32R2-NEXT: and $3, $5, $1297; MIPS32R2-NEXT: lw $1, 24($sp)298; MIPS32R2-NEXT: and $4, $6, $1299; MIPS32R2-NEXT: lw $1, 28($sp)300; MIPS32R2-NEXT: jr $ra301; MIPS32R2-NEXT: and $5, $7, $1302;303; MIPS32R6-LABEL: and_i128:304; MIPS32R6: # %bb.0: # %entry305; MIPS32R6-NEXT: lw $1, 20($sp)306; MIPS32R6-NEXT: lw $2, 16($sp)307; MIPS32R6-NEXT: and $2, $4, $2308; MIPS32R6-NEXT: and $3, $5, $1309; MIPS32R6-NEXT: lw $1, 24($sp)310; MIPS32R6-NEXT: and $4, $6, $1311; MIPS32R6-NEXT: lw $1, 28($sp)312; MIPS32R6-NEXT: jr $ra313; MIPS32R6-NEXT: and $5, $7, $1314;315; MIPS64-LABEL: and_i128:316; MIPS64: # %bb.0: # %entry317; MIPS64-NEXT: and $2, $4, $6318; MIPS64-NEXT: jr $ra319; MIPS64-NEXT: and $3, $5, $7320;321; MIPS64R2-LABEL: and_i128:322; MIPS64R2: # %bb.0: # %entry323; MIPS64R2-NEXT: and $2, $4, $6324; MIPS64R2-NEXT: jr $ra325; MIPS64R2-NEXT: and $3, $5, $7326;327; MIPS64R6-LABEL: and_i128:328; MIPS64R6: # %bb.0: # %entry329; MIPS64R6-NEXT: and $2, $4, $6330; MIPS64R6-NEXT: jr $ra331; MIPS64R6-NEXT: and $3, $5, $7332;333; MM32R3-LABEL: and_i128:334; MM32R3: # %bb.0: # %entry335; MM32R3-NEXT: lwp $2, 16($sp)336; MM32R3-NEXT: and16 $2, $4337; MM32R3-NEXT: and16 $3, $5338; MM32R3-NEXT: lw $4, 24($sp)339; MM32R3-NEXT: and16 $4, $6340; MM32R3-NEXT: lw $5, 28($sp)341; MM32R3-NEXT: and16 $5, $7342; MM32R3-NEXT: jrc $ra343;344; MM32R6-LABEL: and_i128:345; MM32R6: # %bb.0: # %entry346; MM32R6-NEXT: lw $1, 20($sp)347; MM32R6-NEXT: lw $2, 16($sp)348; MM32R6-NEXT: and $2, $4, $2349; MM32R6-NEXT: and $3, $5, $1350; MM32R6-NEXT: lw $1, 24($sp)351; MM32R6-NEXT: and $4, $6, $1352; MM32R6-NEXT: lw $1, 28($sp)353; MM32R6-NEXT: and $5, $7, $1354; MM32R6-NEXT: jrc $ra355entry:356 %r = and i128 %a, %b357 ret i128 %r358}359 360define signext i1 @and_i1_4(i1 signext %b) {361; MIPS-LABEL: and_i1_4:362; MIPS: # %bb.0: # %entry363; MIPS-NEXT: jr $ra364; MIPS-NEXT: addiu $2, $zero, 0365;366; MIPS32R2-LABEL: and_i1_4:367; MIPS32R2: # %bb.0: # %entry368; MIPS32R2-NEXT: jr $ra369; MIPS32R2-NEXT: addiu $2, $zero, 0370;371; MIPS32R6-LABEL: and_i1_4:372; MIPS32R6: # %bb.0: # %entry373; MIPS32R6-NEXT: jr $ra374; MIPS32R6-NEXT: addiu $2, $zero, 0375;376; MIPS64-LABEL: and_i1_4:377; MIPS64: # %bb.0: # %entry378; MIPS64-NEXT: jr $ra379; MIPS64-NEXT: addiu $2, $zero, 0380;381; MIPS64R2-LABEL: and_i1_4:382; MIPS64R2: # %bb.0: # %entry383; MIPS64R2-NEXT: jr $ra384; MIPS64R2-NEXT: addiu $2, $zero, 0385;386; MIPS64R6-LABEL: and_i1_4:387; MIPS64R6: # %bb.0: # %entry388; MIPS64R6-NEXT: jr $ra389; MIPS64R6-NEXT: addiu $2, $zero, 0390;391; MM32R3-LABEL: and_i1_4:392; MM32R3: # %bb.0: # %entry393; MM32R3-NEXT: li16 $2, 0394; MM32R3-NEXT: jrc $ra395;396; MM32R6-LABEL: and_i1_4:397; MM32R6: # %bb.0: # %entry398; MM32R6-NEXT: li16 $2, 0399; MM32R6-NEXT: jrc $ra400entry:401 %r = and i1 4, %b402 ret i1 %r403}404 405define signext i8 @and_i8_4(i8 signext %b) {406; MIPS-LABEL: and_i8_4:407; MIPS: # %bb.0: # %entry408; MIPS-NEXT: jr $ra409; MIPS-NEXT: andi $2, $4, 4410;411; MIPS32R2-LABEL: and_i8_4:412; MIPS32R2: # %bb.0: # %entry413; MIPS32R2-NEXT: jr $ra414; MIPS32R2-NEXT: andi $2, $4, 4415;416; MIPS32R6-LABEL: and_i8_4:417; MIPS32R6: # %bb.0: # %entry418; MIPS32R6-NEXT: jr $ra419; MIPS32R6-NEXT: andi $2, $4, 4420;421; MIPS64-LABEL: and_i8_4:422; MIPS64: # %bb.0: # %entry423; MIPS64-NEXT: jr $ra424; MIPS64-NEXT: andi $2, $4, 4425;426; MIPS64R2-LABEL: and_i8_4:427; MIPS64R2: # %bb.0: # %entry428; MIPS64R2-NEXT: jr $ra429; MIPS64R2-NEXT: andi $2, $4, 4430;431; MIPS64R6-LABEL: and_i8_4:432; MIPS64R6: # %bb.0: # %entry433; MIPS64R6-NEXT: jr $ra434; MIPS64R6-NEXT: andi $2, $4, 4435;436; MM32R3-LABEL: and_i8_4:437; MM32R3: # %bb.0: # %entry438; MM32R3-NEXT: andi16 $2, $4, 4439; MM32R3-NEXT: jrc $ra440;441; MM32R6-LABEL: and_i8_4:442; MM32R6: # %bb.0: # %entry443; MM32R6-NEXT: andi16 $2, $4, 4444; MM32R6-NEXT: jrc $ra445entry:446 %r = and i8 4, %b447 ret i8 %r448}449 450define signext i16 @and_i16_4(i16 signext %b) {451; MIPS-LABEL: and_i16_4:452; MIPS: # %bb.0: # %entry453; MIPS-NEXT: jr $ra454; MIPS-NEXT: andi $2, $4, 4455;456; MIPS32R2-LABEL: and_i16_4:457; MIPS32R2: # %bb.0: # %entry458; MIPS32R2-NEXT: jr $ra459; MIPS32R2-NEXT: andi $2, $4, 4460;461; MIPS32R6-LABEL: and_i16_4:462; MIPS32R6: # %bb.0: # %entry463; MIPS32R6-NEXT: jr $ra464; MIPS32R6-NEXT: andi $2, $4, 4465;466; MIPS64-LABEL: and_i16_4:467; MIPS64: # %bb.0: # %entry468; MIPS64-NEXT: jr $ra469; MIPS64-NEXT: andi $2, $4, 4470;471; MIPS64R2-LABEL: and_i16_4:472; MIPS64R2: # %bb.0: # %entry473; MIPS64R2-NEXT: jr $ra474; MIPS64R2-NEXT: andi $2, $4, 4475;476; MIPS64R6-LABEL: and_i16_4:477; MIPS64R6: # %bb.0: # %entry478; MIPS64R6-NEXT: jr $ra479; MIPS64R6-NEXT: andi $2, $4, 4480;481; MM32R3-LABEL: and_i16_4:482; MM32R3: # %bb.0: # %entry483; MM32R3-NEXT: andi16 $2, $4, 4484; MM32R3-NEXT: jrc $ra485;486; MM32R6-LABEL: and_i16_4:487; MM32R6: # %bb.0: # %entry488; MM32R6-NEXT: andi16 $2, $4, 4489; MM32R6-NEXT: jrc $ra490entry:491 %r = and i16 4, %b492 ret i16 %r493}494 495define signext i32 @and_i32_4(i32 signext %b) {496; MIPS-LABEL: and_i32_4:497; MIPS: # %bb.0: # %entry498; MIPS-NEXT: jr $ra499; MIPS-NEXT: andi $2, $4, 4500;501; MIPS32R2-LABEL: and_i32_4:502; MIPS32R2: # %bb.0: # %entry503; MIPS32R2-NEXT: jr $ra504; MIPS32R2-NEXT: andi $2, $4, 4505;506; MIPS32R6-LABEL: and_i32_4:507; MIPS32R6: # %bb.0: # %entry508; MIPS32R6-NEXT: jr $ra509; MIPS32R6-NEXT: andi $2, $4, 4510;511; MIPS64-LABEL: and_i32_4:512; MIPS64: # %bb.0: # %entry513; MIPS64-NEXT: jr $ra514; MIPS64-NEXT: andi $2, $4, 4515;516; MIPS64R2-LABEL: and_i32_4:517; MIPS64R2: # %bb.0: # %entry518; MIPS64R2-NEXT: jr $ra519; MIPS64R2-NEXT: andi $2, $4, 4520;521; MIPS64R6-LABEL: and_i32_4:522; MIPS64R6: # %bb.0: # %entry523; MIPS64R6-NEXT: jr $ra524; MIPS64R6-NEXT: andi $2, $4, 4525;526; MM32R3-LABEL: and_i32_4:527; MM32R3: # %bb.0: # %entry528; MM32R3-NEXT: andi16 $2, $4, 4529; MM32R3-NEXT: jrc $ra530;531; MM32R6-LABEL: and_i32_4:532; MM32R6: # %bb.0: # %entry533; MM32R6-NEXT: andi16 $2, $4, 4534; MM32R6-NEXT: jrc $ra535entry:536 %r = and i32 4, %b537 ret i32 %r538}539 540define signext i64 @and_i64_4(i64 signext %b) {541; MIPS-LABEL: and_i64_4:542; MIPS: # %bb.0: # %entry543; MIPS-NEXT: andi $3, $5, 4544; MIPS-NEXT: jr $ra545; MIPS-NEXT: addiu $2, $zero, 0546;547; MIPS32R2-LABEL: and_i64_4:548; MIPS32R2: # %bb.0: # %entry549; MIPS32R2-NEXT: andi $3, $5, 4550; MIPS32R2-NEXT: jr $ra551; MIPS32R2-NEXT: addiu $2, $zero, 0552;553; MIPS32R6-LABEL: and_i64_4:554; MIPS32R6: # %bb.0: # %entry555; MIPS32R6-NEXT: andi $3, $5, 4556; MIPS32R6-NEXT: jr $ra557; MIPS32R6-NEXT: addiu $2, $zero, 0558;559; MIPS64-LABEL: and_i64_4:560; MIPS64: # %bb.0: # %entry561; MIPS64-NEXT: jr $ra562; MIPS64-NEXT: andi $2, $4, 4563;564; MIPS64R2-LABEL: and_i64_4:565; MIPS64R2: # %bb.0: # %entry566; MIPS64R2-NEXT: jr $ra567; MIPS64R2-NEXT: andi $2, $4, 4568;569; MIPS64R6-LABEL: and_i64_4:570; MIPS64R6: # %bb.0: # %entry571; MIPS64R6-NEXT: jr $ra572; MIPS64R6-NEXT: andi $2, $4, 4573;574; MM32R3-LABEL: and_i64_4:575; MM32R3: # %bb.0: # %entry576; MM32R3-NEXT: andi16 $3, $5, 4577; MM32R3-NEXT: li16 $2, 0578; MM32R3-NEXT: jrc $ra579;580; MM32R6-LABEL: and_i64_4:581; MM32R6: # %bb.0: # %entry582; MM32R6-NEXT: andi16 $3, $5, 4583; MM32R6-NEXT: li16 $2, 0584; MM32R6-NEXT: jrc $ra585entry:586 %r = and i64 4, %b587 ret i64 %r588}589 590define signext i128 @and_i128_4(i128 signext %b) {591; MIPS-LABEL: and_i128_4:592; MIPS: # %bb.0: # %entry593; MIPS-NEXT: andi $5, $7, 4594; MIPS-NEXT: addiu $2, $zero, 0595; MIPS-NEXT: addiu $3, $zero, 0596; MIPS-NEXT: jr $ra597; MIPS-NEXT: addiu $4, $zero, 0598;599; MIPS32R2-LABEL: and_i128_4:600; MIPS32R2: # %bb.0: # %entry601; MIPS32R2-NEXT: andi $5, $7, 4602; MIPS32R2-NEXT: addiu $2, $zero, 0603; MIPS32R2-NEXT: addiu $3, $zero, 0604; MIPS32R2-NEXT: jr $ra605; MIPS32R2-NEXT: addiu $4, $zero, 0606;607; MIPS32R6-LABEL: and_i128_4:608; MIPS32R6: # %bb.0: # %entry609; MIPS32R6-NEXT: andi $5, $7, 4610; MIPS32R6-NEXT: addiu $2, $zero, 0611; MIPS32R6-NEXT: addiu $3, $zero, 0612; MIPS32R6-NEXT: jr $ra613; MIPS32R6-NEXT: addiu $4, $zero, 0614;615; MIPS64-LABEL: and_i128_4:616; MIPS64: # %bb.0: # %entry617; MIPS64-NEXT: andi $3, $5, 4618; MIPS64-NEXT: jr $ra619; MIPS64-NEXT: daddiu $2, $zero, 0620;621; MIPS64R2-LABEL: and_i128_4:622; MIPS64R2: # %bb.0: # %entry623; MIPS64R2-NEXT: andi $3, $5, 4624; MIPS64R2-NEXT: jr $ra625; MIPS64R2-NEXT: daddiu $2, $zero, 0626;627; MIPS64R6-LABEL: and_i128_4:628; MIPS64R6: # %bb.0: # %entry629; MIPS64R6-NEXT: andi $3, $5, 4630; MIPS64R6-NEXT: jr $ra631; MIPS64R6-NEXT: daddiu $2, $zero, 0632;633; MM32R3-LABEL: and_i128_4:634; MM32R3: # %bb.0: # %entry635; MM32R3-NEXT: andi16 $5, $7, 4636; MM32R3-NEXT: li16 $2, 0637; MM32R3-NEXT: li16 $3, 0638; MM32R3-NEXT: li16 $4, 0639; MM32R3-NEXT: jrc $ra640;641; MM32R6-LABEL: and_i128_4:642; MM32R6: # %bb.0: # %entry643; MM32R6-NEXT: andi16 $5, $7, 4644; MM32R6-NEXT: li16 $2, 0645; MM32R6-NEXT: li16 $3, 0646; MM32R6-NEXT: li16 $4, 0647; MM32R6-NEXT: jrc $ra648entry:649 %r = and i128 4, %b650 ret i128 %r651}652 653define signext i1 @and_i1_31(i1 signext %b) {654; MIPS-LABEL: and_i1_31:655; MIPS: # %bb.0: # %entry656; MIPS-NEXT: jr $ra657; MIPS-NEXT: move $2, $4658;659; MIPS32R2-LABEL: and_i1_31:660; MIPS32R2: # %bb.0: # %entry661; MIPS32R2-NEXT: jr $ra662; MIPS32R2-NEXT: move $2, $4663;664; MIPS32R6-LABEL: and_i1_31:665; MIPS32R6: # %bb.0: # %entry666; MIPS32R6-NEXT: jr $ra667; MIPS32R6-NEXT: move $2, $4668;669; MIPS64-LABEL: and_i1_31:670; MIPS64: # %bb.0: # %entry671; MIPS64-NEXT: jr $ra672; MIPS64-NEXT: move $2, $4673;674; MIPS64R2-LABEL: and_i1_31:675; MIPS64R2: # %bb.0: # %entry676; MIPS64R2-NEXT: jr $ra677; MIPS64R2-NEXT: move $2, $4678;679; MIPS64R6-LABEL: and_i1_31:680; MIPS64R6: # %bb.0: # %entry681; MIPS64R6-NEXT: jr $ra682; MIPS64R6-NEXT: move $2, $4683;684; MM32R3-LABEL: and_i1_31:685; MM32R3: # %bb.0: # %entry686; MM32R3-NEXT: move $2, $4687; MM32R3-NEXT: jrc $ra688;689; MM32R6-LABEL: and_i1_31:690; MM32R6: # %bb.0: # %entry691; MM32R6-NEXT: move $2, $4692; MM32R6-NEXT: jrc $ra693entry:694 %r = and i1 31, %b695 ret i1 %r696}697 698define signext i8 @and_i8_31(i8 signext %b) {699; MIPS-LABEL: and_i8_31:700; MIPS: # %bb.0: # %entry701; MIPS-NEXT: jr $ra702; MIPS-NEXT: andi $2, $4, 31703;704; MIPS32R2-LABEL: and_i8_31:705; MIPS32R2: # %bb.0: # %entry706; MIPS32R2-NEXT: jr $ra707; MIPS32R2-NEXT: andi $2, $4, 31708;709; MIPS32R6-LABEL: and_i8_31:710; MIPS32R6: # %bb.0: # %entry711; MIPS32R6-NEXT: jr $ra712; MIPS32R6-NEXT: andi $2, $4, 31713;714; MIPS64-LABEL: and_i8_31:715; MIPS64: # %bb.0: # %entry716; MIPS64-NEXT: jr $ra717; MIPS64-NEXT: andi $2, $4, 31718;719; MIPS64R2-LABEL: and_i8_31:720; MIPS64R2: # %bb.0: # %entry721; MIPS64R2-NEXT: jr $ra722; MIPS64R2-NEXT: andi $2, $4, 31723;724; MIPS64R6-LABEL: and_i8_31:725; MIPS64R6: # %bb.0: # %entry726; MIPS64R6-NEXT: jr $ra727; MIPS64R6-NEXT: andi $2, $4, 31728;729; MM32R3-LABEL: and_i8_31:730; MM32R3: # %bb.0: # %entry731; MM32R3-NEXT: andi16 $2, $4, 31732; MM32R3-NEXT: jrc $ra733;734; MM32R6-LABEL: and_i8_31:735; MM32R6: # %bb.0: # %entry736; MM32R6-NEXT: andi16 $2, $4, 31737; MM32R6-NEXT: jrc $ra738entry:739 %r = and i8 31, %b740 ret i8 %r741}742 743define signext i16 @and_i16_31(i16 signext %b) {744; MIPS-LABEL: and_i16_31:745; MIPS: # %bb.0: # %entry746; MIPS-NEXT: jr $ra747; MIPS-NEXT: andi $2, $4, 31748;749; MIPS32R2-LABEL: and_i16_31:750; MIPS32R2: # %bb.0: # %entry751; MIPS32R2-NEXT: jr $ra752; MIPS32R2-NEXT: andi $2, $4, 31753;754; MIPS32R6-LABEL: and_i16_31:755; MIPS32R6: # %bb.0: # %entry756; MIPS32R6-NEXT: jr $ra757; MIPS32R6-NEXT: andi $2, $4, 31758;759; MIPS64-LABEL: and_i16_31:760; MIPS64: # %bb.0: # %entry761; MIPS64-NEXT: jr $ra762; MIPS64-NEXT: andi $2, $4, 31763;764; MIPS64R2-LABEL: and_i16_31:765; MIPS64R2: # %bb.0: # %entry766; MIPS64R2-NEXT: jr $ra767; MIPS64R2-NEXT: andi $2, $4, 31768;769; MIPS64R6-LABEL: and_i16_31:770; MIPS64R6: # %bb.0: # %entry771; MIPS64R6-NEXT: jr $ra772; MIPS64R6-NEXT: andi $2, $4, 31773;774; MM32R3-LABEL: and_i16_31:775; MM32R3: # %bb.0: # %entry776; MM32R3-NEXT: andi16 $2, $4, 31777; MM32R3-NEXT: jrc $ra778;779; MM32R6-LABEL: and_i16_31:780; MM32R6: # %bb.0: # %entry781; MM32R6-NEXT: andi16 $2, $4, 31782; MM32R6-NEXT: jrc $ra783entry:784 %r = and i16 31, %b785 ret i16 %r786}787 788define signext i32 @and_i32_31(i32 signext %b) {789; MIPS-LABEL: and_i32_31:790; MIPS: # %bb.0: # %entry791; MIPS-NEXT: jr $ra792; MIPS-NEXT: andi $2, $4, 31793;794; MIPS32R2-LABEL: and_i32_31:795; MIPS32R2: # %bb.0: # %entry796; MIPS32R2-NEXT: jr $ra797; MIPS32R2-NEXT: andi $2, $4, 31798;799; MIPS32R6-LABEL: and_i32_31:800; MIPS32R6: # %bb.0: # %entry801; MIPS32R6-NEXT: jr $ra802; MIPS32R6-NEXT: andi $2, $4, 31803;804; MIPS64-LABEL: and_i32_31:805; MIPS64: # %bb.0: # %entry806; MIPS64-NEXT: jr $ra807; MIPS64-NEXT: andi $2, $4, 31808;809; MIPS64R2-LABEL: and_i32_31:810; MIPS64R2: # %bb.0: # %entry811; MIPS64R2-NEXT: jr $ra812; MIPS64R2-NEXT: andi $2, $4, 31813;814; MIPS64R6-LABEL: and_i32_31:815; MIPS64R6: # %bb.0: # %entry816; MIPS64R6-NEXT: jr $ra817; MIPS64R6-NEXT: andi $2, $4, 31818;819; MM32R3-LABEL: and_i32_31:820; MM32R3: # %bb.0: # %entry821; MM32R3-NEXT: andi16 $2, $4, 31822; MM32R3-NEXT: jrc $ra823;824; MM32R6-LABEL: and_i32_31:825; MM32R6: # %bb.0: # %entry826; MM32R6-NEXT: andi16 $2, $4, 31827; MM32R6-NEXT: jrc $ra828entry:829 %r = and i32 31, %b830 ret i32 %r831}832 833define signext i64 @and_i64_31(i64 signext %b) {834; MIPS-LABEL: and_i64_31:835; MIPS: # %bb.0: # %entry836; MIPS-NEXT: andi $3, $5, 31837; MIPS-NEXT: jr $ra838; MIPS-NEXT: addiu $2, $zero, 0839;840; MIPS32R2-LABEL: and_i64_31:841; MIPS32R2: # %bb.0: # %entry842; MIPS32R2-NEXT: andi $3, $5, 31843; MIPS32R2-NEXT: jr $ra844; MIPS32R2-NEXT: addiu $2, $zero, 0845;846; MIPS32R6-LABEL: and_i64_31:847; MIPS32R6: # %bb.0: # %entry848; MIPS32R6-NEXT: andi $3, $5, 31849; MIPS32R6-NEXT: jr $ra850; MIPS32R6-NEXT: addiu $2, $zero, 0851;852; MIPS64-LABEL: and_i64_31:853; MIPS64: # %bb.0: # %entry854; MIPS64-NEXT: jr $ra855; MIPS64-NEXT: andi $2, $4, 31856;857; MIPS64R2-LABEL: and_i64_31:858; MIPS64R2: # %bb.0: # %entry859; MIPS64R2-NEXT: jr $ra860; MIPS64R2-NEXT: andi $2, $4, 31861;862; MIPS64R6-LABEL: and_i64_31:863; MIPS64R6: # %bb.0: # %entry864; MIPS64R6-NEXT: jr $ra865; MIPS64R6-NEXT: andi $2, $4, 31866;867; MM32R3-LABEL: and_i64_31:868; MM32R3: # %bb.0: # %entry869; MM32R3-NEXT: andi16 $3, $5, 31870; MM32R3-NEXT: li16 $2, 0871; MM32R3-NEXT: jrc $ra872;873; MM32R6-LABEL: and_i64_31:874; MM32R6: # %bb.0: # %entry875; MM32R6-NEXT: andi16 $3, $5, 31876; MM32R6-NEXT: li16 $2, 0877; MM32R6-NEXT: jrc $ra878entry:879 %r = and i64 31, %b880 ret i64 %r881}882 883define signext i128 @and_i128_31(i128 signext %b) {884; MIPS-LABEL: and_i128_31:885; MIPS: # %bb.0: # %entry886; MIPS-NEXT: andi $5, $7, 31887; MIPS-NEXT: addiu $2, $zero, 0888; MIPS-NEXT: addiu $3, $zero, 0889; MIPS-NEXT: jr $ra890; MIPS-NEXT: addiu $4, $zero, 0891;892; MIPS32R2-LABEL: and_i128_31:893; MIPS32R2: # %bb.0: # %entry894; MIPS32R2-NEXT: andi $5, $7, 31895; MIPS32R2-NEXT: addiu $2, $zero, 0896; MIPS32R2-NEXT: addiu $3, $zero, 0897; MIPS32R2-NEXT: jr $ra898; MIPS32R2-NEXT: addiu $4, $zero, 0899;900; MIPS32R6-LABEL: and_i128_31:901; MIPS32R6: # %bb.0: # %entry902; MIPS32R6-NEXT: andi $5, $7, 31903; MIPS32R6-NEXT: addiu $2, $zero, 0904; MIPS32R6-NEXT: addiu $3, $zero, 0905; MIPS32R6-NEXT: jr $ra906; MIPS32R6-NEXT: addiu $4, $zero, 0907;908; MIPS64-LABEL: and_i128_31:909; MIPS64: # %bb.0: # %entry910; MIPS64-NEXT: andi $3, $5, 31911; MIPS64-NEXT: jr $ra912; MIPS64-NEXT: daddiu $2, $zero, 0913;914; MIPS64R2-LABEL: and_i128_31:915; MIPS64R2: # %bb.0: # %entry916; MIPS64R2-NEXT: andi $3, $5, 31917; MIPS64R2-NEXT: jr $ra918; MIPS64R2-NEXT: daddiu $2, $zero, 0919;920; MIPS64R6-LABEL: and_i128_31:921; MIPS64R6: # %bb.0: # %entry922; MIPS64R6-NEXT: andi $3, $5, 31923; MIPS64R6-NEXT: jr $ra924; MIPS64R6-NEXT: daddiu $2, $zero, 0925;926; MM32R3-LABEL: and_i128_31:927; MM32R3: # %bb.0: # %entry928; MM32R3-NEXT: andi16 $5, $7, 31929; MM32R3-NEXT: li16 $2, 0930; MM32R3-NEXT: li16 $3, 0931; MM32R3-NEXT: li16 $4, 0932; MM32R3-NEXT: jrc $ra933;934; MM32R6-LABEL: and_i128_31:935; MM32R6: # %bb.0: # %entry936; MM32R6-NEXT: andi16 $5, $7, 31937; MM32R6-NEXT: li16 $2, 0938; MM32R6-NEXT: li16 $3, 0939; MM32R6-NEXT: li16 $4, 0940; MM32R6-NEXT: jrc $ra941entry:942 %r = and i128 31, %b943 ret i128 %r944}945 946define signext i1 @and_i1_255(i1 signext %b) {947; MIPS-LABEL: and_i1_255:948; MIPS: # %bb.0: # %entry949; MIPS-NEXT: jr $ra950; MIPS-NEXT: move $2, $4951;952; MIPS32R2-LABEL: and_i1_255:953; MIPS32R2: # %bb.0: # %entry954; MIPS32R2-NEXT: jr $ra955; MIPS32R2-NEXT: move $2, $4956;957; MIPS32R6-LABEL: and_i1_255:958; MIPS32R6: # %bb.0: # %entry959; MIPS32R6-NEXT: jr $ra960; MIPS32R6-NEXT: move $2, $4961;962; MIPS64-LABEL: and_i1_255:963; MIPS64: # %bb.0: # %entry964; MIPS64-NEXT: jr $ra965; MIPS64-NEXT: move $2, $4966;967; MIPS64R2-LABEL: and_i1_255:968; MIPS64R2: # %bb.0: # %entry969; MIPS64R2-NEXT: jr $ra970; MIPS64R2-NEXT: move $2, $4971;972; MIPS64R6-LABEL: and_i1_255:973; MIPS64R6: # %bb.0: # %entry974; MIPS64R6-NEXT: jr $ra975; MIPS64R6-NEXT: move $2, $4976;977; MM32R3-LABEL: and_i1_255:978; MM32R3: # %bb.0: # %entry979; MM32R3-NEXT: move $2, $4980; MM32R3-NEXT: jrc $ra981;982; MM32R6-LABEL: and_i1_255:983; MM32R6: # %bb.0: # %entry984; MM32R6-NEXT: move $2, $4985; MM32R6-NEXT: jrc $ra986entry:987 %r = and i1 255, %b988 ret i1 %r989}990 991define signext i8 @and_i8_255(i8 signext %b) {992; MIPS-LABEL: and_i8_255:993; MIPS: # %bb.0: # %entry994; MIPS-NEXT: jr $ra995; MIPS-NEXT: move $2, $4996;997; MIPS32R2-LABEL: and_i8_255:998; MIPS32R2: # %bb.0: # %entry999; MIPS32R2-NEXT: jr $ra1000; MIPS32R2-NEXT: move $2, $41001;1002; MIPS32R6-LABEL: and_i8_255:1003; MIPS32R6: # %bb.0: # %entry1004; MIPS32R6-NEXT: jr $ra1005; MIPS32R6-NEXT: move $2, $41006;1007; MIPS64-LABEL: and_i8_255:1008; MIPS64: # %bb.0: # %entry1009; MIPS64-NEXT: jr $ra1010; MIPS64-NEXT: move $2, $41011;1012; MIPS64R2-LABEL: and_i8_255:1013; MIPS64R2: # %bb.0: # %entry1014; MIPS64R2-NEXT: jr $ra1015; MIPS64R2-NEXT: move $2, $41016;1017; MIPS64R6-LABEL: and_i8_255:1018; MIPS64R6: # %bb.0: # %entry1019; MIPS64R6-NEXT: jr $ra1020; MIPS64R6-NEXT: move $2, $41021;1022; MM32R3-LABEL: and_i8_255:1023; MM32R3: # %bb.0: # %entry1024; MM32R3-NEXT: move $2, $41025; MM32R3-NEXT: jrc $ra1026;1027; MM32R6-LABEL: and_i8_255:1028; MM32R6: # %bb.0: # %entry1029; MM32R6-NEXT: move $2, $41030; MM32R6-NEXT: jrc $ra1031entry:1032 %r = and i8 255, %b1033 ret i8 %r1034}1035 1036define signext i16 @and_i16_255(i16 signext %b) {1037; MIPS-LABEL: and_i16_255:1038; MIPS: # %bb.0: # %entry1039; MIPS-NEXT: jr $ra1040; MIPS-NEXT: andi $2, $4, 2551041;1042; MIPS32R2-LABEL: and_i16_255:1043; MIPS32R2: # %bb.0: # %entry1044; MIPS32R2-NEXT: jr $ra1045; MIPS32R2-NEXT: andi $2, $4, 2551046;1047; MIPS32R6-LABEL: and_i16_255:1048; MIPS32R6: # %bb.0: # %entry1049; MIPS32R6-NEXT: jr $ra1050; MIPS32R6-NEXT: andi $2, $4, 2551051;1052; MIPS64-LABEL: and_i16_255:1053; MIPS64: # %bb.0: # %entry1054; MIPS64-NEXT: jr $ra1055; MIPS64-NEXT: andi $2, $4, 2551056;1057; MIPS64R2-LABEL: and_i16_255:1058; MIPS64R2: # %bb.0: # %entry1059; MIPS64R2-NEXT: jr $ra1060; MIPS64R2-NEXT: andi $2, $4, 2551061;1062; MIPS64R6-LABEL: and_i16_255:1063; MIPS64R6: # %bb.0: # %entry1064; MIPS64R6-NEXT: jr $ra1065; MIPS64R6-NEXT: andi $2, $4, 2551066;1067; MM32R3-LABEL: and_i16_255:1068; MM32R3: # %bb.0: # %entry1069; MM32R3-NEXT: andi16 $2, $4, 2551070; MM32R3-NEXT: jrc $ra1071;1072; MM32R6-LABEL: and_i16_255:1073; MM32R6: # %bb.0: # %entry1074; MM32R6-NEXT: andi16 $2, $4, 2551075; MM32R6-NEXT: jrc $ra1076entry:1077 %r = and i16 255, %b1078 ret i16 %r1079}1080 1081define signext i32 @and_i32_255(i32 signext %b) {1082; MIPS-LABEL: and_i32_255:1083; MIPS: # %bb.0: # %entry1084; MIPS-NEXT: jr $ra1085; MIPS-NEXT: andi $2, $4, 2551086;1087; MIPS32R2-LABEL: and_i32_255:1088; MIPS32R2: # %bb.0: # %entry1089; MIPS32R2-NEXT: jr $ra1090; MIPS32R2-NEXT: andi $2, $4, 2551091;1092; MIPS32R6-LABEL: and_i32_255:1093; MIPS32R6: # %bb.0: # %entry1094; MIPS32R6-NEXT: jr $ra1095; MIPS32R6-NEXT: andi $2, $4, 2551096;1097; MIPS64-LABEL: and_i32_255:1098; MIPS64: # %bb.0: # %entry1099; MIPS64-NEXT: jr $ra1100; MIPS64-NEXT: andi $2, $4, 2551101;1102; MIPS64R2-LABEL: and_i32_255:1103; MIPS64R2: # %bb.0: # %entry1104; MIPS64R2-NEXT: jr $ra1105; MIPS64R2-NEXT: andi $2, $4, 2551106;1107; MIPS64R6-LABEL: and_i32_255:1108; MIPS64R6: # %bb.0: # %entry1109; MIPS64R6-NEXT: jr $ra1110; MIPS64R6-NEXT: andi $2, $4, 2551111;1112; MM32R3-LABEL: and_i32_255:1113; MM32R3: # %bb.0: # %entry1114; MM32R3-NEXT: andi16 $2, $4, 2551115; MM32R3-NEXT: jrc $ra1116;1117; MM32R6-LABEL: and_i32_255:1118; MM32R6: # %bb.0: # %entry1119; MM32R6-NEXT: andi16 $2, $4, 2551120; MM32R6-NEXT: jrc $ra1121entry:1122 %r = and i32 255, %b1123 ret i32 %r1124}1125 1126define signext i64 @and_i64_255(i64 signext %b) {1127; MIPS-LABEL: and_i64_255:1128; MIPS: # %bb.0: # %entry1129; MIPS-NEXT: andi $3, $5, 2551130; MIPS-NEXT: jr $ra1131; MIPS-NEXT: addiu $2, $zero, 01132;1133; MIPS32R2-LABEL: and_i64_255:1134; MIPS32R2: # %bb.0: # %entry1135; MIPS32R2-NEXT: andi $3, $5, 2551136; MIPS32R2-NEXT: jr $ra1137; MIPS32R2-NEXT: addiu $2, $zero, 01138;1139; MIPS32R6-LABEL: and_i64_255:1140; MIPS32R6: # %bb.0: # %entry1141; MIPS32R6-NEXT: andi $3, $5, 2551142; MIPS32R6-NEXT: jr $ra1143; MIPS32R6-NEXT: addiu $2, $zero, 01144;1145; MIPS64-LABEL: and_i64_255:1146; MIPS64: # %bb.0: # %entry1147; MIPS64-NEXT: jr $ra1148; MIPS64-NEXT: andi $2, $4, 2551149;1150; MIPS64R2-LABEL: and_i64_255:1151; MIPS64R2: # %bb.0: # %entry1152; MIPS64R2-NEXT: jr $ra1153; MIPS64R2-NEXT: andi $2, $4, 2551154;1155; MIPS64R6-LABEL: and_i64_255:1156; MIPS64R6: # %bb.0: # %entry1157; MIPS64R6-NEXT: jr $ra1158; MIPS64R6-NEXT: andi $2, $4, 2551159;1160; MM32R3-LABEL: and_i64_255:1161; MM32R3: # %bb.0: # %entry1162; MM32R3-NEXT: andi16 $3, $5, 2551163; MM32R3-NEXT: li16 $2, 01164; MM32R3-NEXT: jrc $ra1165;1166; MM32R6-LABEL: and_i64_255:1167; MM32R6: # %bb.0: # %entry1168; MM32R6-NEXT: andi16 $3, $5, 2551169; MM32R6-NEXT: li16 $2, 01170; MM32R6-NEXT: jrc $ra1171entry:1172 %r = and i64 255, %b1173 ret i64 %r1174}1175 1176define signext i128 @and_i128_255(i128 signext %b) {1177; MIPS-LABEL: and_i128_255:1178; MIPS: # %bb.0: # %entry1179; MIPS-NEXT: andi $5, $7, 2551180; MIPS-NEXT: addiu $2, $zero, 01181; MIPS-NEXT: addiu $3, $zero, 01182; MIPS-NEXT: jr $ra1183; MIPS-NEXT: addiu $4, $zero, 01184;1185; MIPS32R2-LABEL: and_i128_255:1186; MIPS32R2: # %bb.0: # %entry1187; MIPS32R2-NEXT: andi $5, $7, 2551188; MIPS32R2-NEXT: addiu $2, $zero, 01189; MIPS32R2-NEXT: addiu $3, $zero, 01190; MIPS32R2-NEXT: jr $ra1191; MIPS32R2-NEXT: addiu $4, $zero, 01192;1193; MIPS32R6-LABEL: and_i128_255:1194; MIPS32R6: # %bb.0: # %entry1195; MIPS32R6-NEXT: andi $5, $7, 2551196; MIPS32R6-NEXT: addiu $2, $zero, 01197; MIPS32R6-NEXT: addiu $3, $zero, 01198; MIPS32R6-NEXT: jr $ra1199; MIPS32R6-NEXT: addiu $4, $zero, 01200;1201; MIPS64-LABEL: and_i128_255:1202; MIPS64: # %bb.0: # %entry1203; MIPS64-NEXT: andi $3, $5, 2551204; MIPS64-NEXT: jr $ra1205; MIPS64-NEXT: daddiu $2, $zero, 01206;1207; MIPS64R2-LABEL: and_i128_255:1208; MIPS64R2: # %bb.0: # %entry1209; MIPS64R2-NEXT: andi $3, $5, 2551210; MIPS64R2-NEXT: jr $ra1211; MIPS64R2-NEXT: daddiu $2, $zero, 01212;1213; MIPS64R6-LABEL: and_i128_255:1214; MIPS64R6: # %bb.0: # %entry1215; MIPS64R6-NEXT: andi $3, $5, 2551216; MIPS64R6-NEXT: jr $ra1217; MIPS64R6-NEXT: daddiu $2, $zero, 01218;1219; MM32R3-LABEL: and_i128_255:1220; MM32R3: # %bb.0: # %entry1221; MM32R3-NEXT: andi16 $5, $7, 2551222; MM32R3-NEXT: li16 $2, 01223; MM32R3-NEXT: li16 $3, 01224; MM32R3-NEXT: li16 $4, 01225; MM32R3-NEXT: jrc $ra1226;1227; MM32R6-LABEL: and_i128_255:1228; MM32R6: # %bb.0: # %entry1229; MM32R6-NEXT: andi16 $5, $7, 2551230; MM32R6-NEXT: li16 $2, 01231; MM32R6-NEXT: li16 $3, 01232; MM32R6-NEXT: li16 $4, 01233; MM32R6-NEXT: jrc $ra1234entry:1235 %r = and i128 255, %b1236 ret i128 %r1237}1238 1239define signext i1 @and_i1_32768(i1 signext %b) {1240; MIPS-LABEL: and_i1_32768:1241; MIPS: # %bb.0: # %entry1242; MIPS-NEXT: jr $ra1243; MIPS-NEXT: addiu $2, $zero, 01244;1245; MIPS32R2-LABEL: and_i1_32768:1246; MIPS32R2: # %bb.0: # %entry1247; MIPS32R2-NEXT: jr $ra1248; MIPS32R2-NEXT: addiu $2, $zero, 01249;1250; MIPS32R6-LABEL: and_i1_32768:1251; MIPS32R6: # %bb.0: # %entry1252; MIPS32R6-NEXT: jr $ra1253; MIPS32R6-NEXT: addiu $2, $zero, 01254;1255; MIPS64-LABEL: and_i1_32768:1256; MIPS64: # %bb.0: # %entry1257; MIPS64-NEXT: jr $ra1258; MIPS64-NEXT: addiu $2, $zero, 01259;1260; MIPS64R2-LABEL: and_i1_32768:1261; MIPS64R2: # %bb.0: # %entry1262; MIPS64R2-NEXT: jr $ra1263; MIPS64R2-NEXT: addiu $2, $zero, 01264;1265; MIPS64R6-LABEL: and_i1_32768:1266; MIPS64R6: # %bb.0: # %entry1267; MIPS64R6-NEXT: jr $ra1268; MIPS64R6-NEXT: addiu $2, $zero, 01269;1270; MM32R3-LABEL: and_i1_32768:1271; MM32R3: # %bb.0: # %entry1272; MM32R3-NEXT: li16 $2, 01273; MM32R3-NEXT: jrc $ra1274;1275; MM32R6-LABEL: and_i1_32768:1276; MM32R6: # %bb.0: # %entry1277; MM32R6-NEXT: li16 $2, 01278; MM32R6-NEXT: jrc $ra1279entry:1280 %r = and i1 32768, %b1281 ret i1 %r1282}1283 1284define signext i8 @and_i8_32768(i8 signext %b) {1285; MIPS-LABEL: and_i8_32768:1286; MIPS: # %bb.0: # %entry1287; MIPS-NEXT: jr $ra1288; MIPS-NEXT: addiu $2, $zero, 01289;1290; MIPS32R2-LABEL: and_i8_32768:1291; MIPS32R2: # %bb.0: # %entry1292; MIPS32R2-NEXT: jr $ra1293; MIPS32R2-NEXT: addiu $2, $zero, 01294;1295; MIPS32R6-LABEL: and_i8_32768:1296; MIPS32R6: # %bb.0: # %entry1297; MIPS32R6-NEXT: jr $ra1298; MIPS32R6-NEXT: addiu $2, $zero, 01299;1300; MIPS64-LABEL: and_i8_32768:1301; MIPS64: # %bb.0: # %entry1302; MIPS64-NEXT: jr $ra1303; MIPS64-NEXT: addiu $2, $zero, 01304;1305; MIPS64R2-LABEL: and_i8_32768:1306; MIPS64R2: # %bb.0: # %entry1307; MIPS64R2-NEXT: jr $ra1308; MIPS64R2-NEXT: addiu $2, $zero, 01309;1310; MIPS64R6-LABEL: and_i8_32768:1311; MIPS64R6: # %bb.0: # %entry1312; MIPS64R6-NEXT: jr $ra1313; MIPS64R6-NEXT: addiu $2, $zero, 01314;1315; MM32R3-LABEL: and_i8_32768:1316; MM32R3: # %bb.0: # %entry1317; MM32R3-NEXT: li16 $2, 01318; MM32R3-NEXT: jrc $ra1319;1320; MM32R6-LABEL: and_i8_32768:1321; MM32R6: # %bb.0: # %entry1322; MM32R6-NEXT: li16 $2, 01323; MM32R6-NEXT: jrc $ra1324entry:1325 %r = and i8 32768, %b1326 ret i8 %r1327}1328 1329define signext i16 @and_i16_32768(i16 signext %b) {1330; MIPS-LABEL: and_i16_32768:1331; MIPS: # %bb.0: # %entry1332; MIPS-NEXT: addiu $1, $zero, -327681333; MIPS-NEXT: jr $ra1334; MIPS-NEXT: and $2, $4, $11335;1336; MIPS32R2-LABEL: and_i16_32768:1337; MIPS32R2: # %bb.0: # %entry1338; MIPS32R2-NEXT: addiu $1, $zero, -327681339; MIPS32R2-NEXT: jr $ra1340; MIPS32R2-NEXT: and $2, $4, $11341;1342; MIPS32R6-LABEL: and_i16_32768:1343; MIPS32R6: # %bb.0: # %entry1344; MIPS32R6-NEXT: addiu $1, $zero, -327681345; MIPS32R6-NEXT: jr $ra1346; MIPS32R6-NEXT: and $2, $4, $11347;1348; MIPS64-LABEL: and_i16_32768:1349; MIPS64: # %bb.0: # %entry1350; MIPS64-NEXT: addiu $1, $zero, -327681351; MIPS64-NEXT: jr $ra1352; MIPS64-NEXT: and $2, $4, $11353;1354; MIPS64R2-LABEL: and_i16_32768:1355; MIPS64R2: # %bb.0: # %entry1356; MIPS64R2-NEXT: addiu $1, $zero, -327681357; MIPS64R2-NEXT: jr $ra1358; MIPS64R2-NEXT: and $2, $4, $11359;1360; MIPS64R6-LABEL: and_i16_32768:1361; MIPS64R6: # %bb.0: # %entry1362; MIPS64R6-NEXT: addiu $1, $zero, -327681363; MIPS64R6-NEXT: jr $ra1364; MIPS64R6-NEXT: and $2, $4, $11365;1366; MM32R3-LABEL: and_i16_32768:1367; MM32R3: # %bb.0: # %entry1368; MM32R3-NEXT: addiu $2, $zero, -327681369; MM32R3-NEXT: and16 $2, $41370; MM32R3-NEXT: jrc $ra1371;1372; MM32R6-LABEL: and_i16_32768:1373; MM32R6: # %bb.0: # %entry1374; MM32R6-NEXT: addiu $1, $zero, -327681375; MM32R6-NEXT: and $2, $4, $11376; MM32R6-NEXT: jrc $ra1377entry:1378 1379 %r = and i16 32768, %b1380 ret i16 %r1381}1382 1383define signext i32 @and_i32_32768(i32 signext %b) {1384; MIPS-LABEL: and_i32_32768:1385; MIPS: # %bb.0: # %entry1386; MIPS-NEXT: jr $ra1387; MIPS-NEXT: andi $2, $4, 327681388;1389; MIPS32R2-LABEL: and_i32_32768:1390; MIPS32R2: # %bb.0: # %entry1391; MIPS32R2-NEXT: jr $ra1392; MIPS32R2-NEXT: andi $2, $4, 327681393;1394; MIPS32R6-LABEL: and_i32_32768:1395; MIPS32R6: # %bb.0: # %entry1396; MIPS32R6-NEXT: jr $ra1397; MIPS32R6-NEXT: andi $2, $4, 327681398;1399; MIPS64-LABEL: and_i32_32768:1400; MIPS64: # %bb.0: # %entry1401; MIPS64-NEXT: jr $ra1402; MIPS64-NEXT: andi $2, $4, 327681403;1404; MIPS64R2-LABEL: and_i32_32768:1405; MIPS64R2: # %bb.0: # %entry1406; MIPS64R2-NEXT: jr $ra1407; MIPS64R2-NEXT: andi $2, $4, 327681408;1409; MIPS64R6-LABEL: and_i32_32768:1410; MIPS64R6: # %bb.0: # %entry1411; MIPS64R6-NEXT: jr $ra1412; MIPS64R6-NEXT: andi $2, $4, 327681413;1414; MM32R3-LABEL: and_i32_32768:1415; MM32R3: # %bb.0: # %entry1416; MM32R3-NEXT: andi16 $2, $4, 327681417; MM32R3-NEXT: jrc $ra1418;1419; MM32R6-LABEL: and_i32_32768:1420; MM32R6: # %bb.0: # %entry1421; MM32R6-NEXT: andi16 $2, $4, 327681422; MM32R6-NEXT: jrc $ra1423entry:1424 %r = and i32 32768, %b1425 ret i32 %r1426}1427 1428define signext i64 @and_i64_32768(i64 signext %b) {1429; MIPS-LABEL: and_i64_32768:1430; MIPS: # %bb.0: # %entry1431; MIPS-NEXT: andi $3, $5, 327681432; MIPS-NEXT: jr $ra1433; MIPS-NEXT: addiu $2, $zero, 01434;1435; MIPS32R2-LABEL: and_i64_32768:1436; MIPS32R2: # %bb.0: # %entry1437; MIPS32R2-NEXT: andi $3, $5, 327681438; MIPS32R2-NEXT: jr $ra1439; MIPS32R2-NEXT: addiu $2, $zero, 01440;1441; MIPS32R6-LABEL: and_i64_32768:1442; MIPS32R6: # %bb.0: # %entry1443; MIPS32R6-NEXT: andi $3, $5, 327681444; MIPS32R6-NEXT: jr $ra1445; MIPS32R6-NEXT: addiu $2, $zero, 01446;1447; MIPS64-LABEL: and_i64_32768:1448; MIPS64: # %bb.0: # %entry1449; MIPS64-NEXT: jr $ra1450; MIPS64-NEXT: andi $2, $4, 327681451;1452; MIPS64R2-LABEL: and_i64_32768:1453; MIPS64R2: # %bb.0: # %entry1454; MIPS64R2-NEXT: jr $ra1455; MIPS64R2-NEXT: andi $2, $4, 327681456;1457; MIPS64R6-LABEL: and_i64_32768:1458; MIPS64R6: # %bb.0: # %entry1459; MIPS64R6-NEXT: jr $ra1460; MIPS64R6-NEXT: andi $2, $4, 327681461;1462; MM32R3-LABEL: and_i64_32768:1463; MM32R3: # %bb.0: # %entry1464; MM32R3-NEXT: andi16 $3, $5, 327681465; MM32R3-NEXT: li16 $2, 01466; MM32R3-NEXT: jrc $ra1467;1468; MM32R6-LABEL: and_i64_32768:1469; MM32R6: # %bb.0: # %entry1470; MM32R6-NEXT: andi16 $3, $5, 327681471; MM32R6-NEXT: li16 $2, 01472; MM32R6-NEXT: jrc $ra1473entry:1474 %r = and i64 32768, %b1475 ret i64 %r1476}1477 1478define signext i128 @and_i128_32768(i128 signext %b) {1479; MIPS-LABEL: and_i128_32768:1480; MIPS: # %bb.0: # %entry1481; MIPS-NEXT: andi $5, $7, 327681482; MIPS-NEXT: addiu $2, $zero, 01483; MIPS-NEXT: addiu $3, $zero, 01484; MIPS-NEXT: jr $ra1485; MIPS-NEXT: addiu $4, $zero, 01486;1487; MIPS32R2-LABEL: and_i128_32768:1488; MIPS32R2: # %bb.0: # %entry1489; MIPS32R2-NEXT: andi $5, $7, 327681490; MIPS32R2-NEXT: addiu $2, $zero, 01491; MIPS32R2-NEXT: addiu $3, $zero, 01492; MIPS32R2-NEXT: jr $ra1493; MIPS32R2-NEXT: addiu $4, $zero, 01494;1495; MIPS32R6-LABEL: and_i128_32768:1496; MIPS32R6: # %bb.0: # %entry1497; MIPS32R6-NEXT: andi $5, $7, 327681498; MIPS32R6-NEXT: addiu $2, $zero, 01499; MIPS32R6-NEXT: addiu $3, $zero, 01500; MIPS32R6-NEXT: jr $ra1501; MIPS32R6-NEXT: addiu $4, $zero, 01502;1503; MIPS64-LABEL: and_i128_32768:1504; MIPS64: # %bb.0: # %entry1505; MIPS64-NEXT: andi $3, $5, 327681506; MIPS64-NEXT: jr $ra1507; MIPS64-NEXT: daddiu $2, $zero, 01508;1509; MIPS64R2-LABEL: and_i128_32768:1510; MIPS64R2: # %bb.0: # %entry1511; MIPS64R2-NEXT: andi $3, $5, 327681512; MIPS64R2-NEXT: jr $ra1513; MIPS64R2-NEXT: daddiu $2, $zero, 01514;1515; MIPS64R6-LABEL: and_i128_32768:1516; MIPS64R6: # %bb.0: # %entry1517; MIPS64R6-NEXT: andi $3, $5, 327681518; MIPS64R6-NEXT: jr $ra1519; MIPS64R6-NEXT: daddiu $2, $zero, 01520;1521; MM32R3-LABEL: and_i128_32768:1522; MM32R3: # %bb.0: # %entry1523; MM32R3-NEXT: andi16 $5, $7, 327681524; MM32R3-NEXT: li16 $2, 01525; MM32R3-NEXT: li16 $3, 01526; MM32R3-NEXT: li16 $4, 01527; MM32R3-NEXT: jrc $ra1528;1529; MM32R6-LABEL: and_i128_32768:1530; MM32R6: # %bb.0: # %entry1531; MM32R6-NEXT: andi16 $5, $7, 327681532; MM32R6-NEXT: li16 $2, 01533; MM32R6-NEXT: li16 $3, 01534; MM32R6-NEXT: li16 $4, 01535; MM32R6-NEXT: jrc $ra1536entry:1537 %r = and i128 32768, %b1538 ret i128 %r1539}1540 1541define signext i1 @and_i1_65(i1 signext %b) {1542; MIPS-LABEL: and_i1_65:1543; MIPS: # %bb.0: # %entry1544; MIPS-NEXT: jr $ra1545; MIPS-NEXT: move $2, $41546;1547; MIPS32R2-LABEL: and_i1_65:1548; MIPS32R2: # %bb.0: # %entry1549; MIPS32R2-NEXT: jr $ra1550; MIPS32R2-NEXT: move $2, $41551;1552; MIPS32R6-LABEL: and_i1_65:1553; MIPS32R6: # %bb.0: # %entry1554; MIPS32R6-NEXT: jr $ra1555; MIPS32R6-NEXT: move $2, $41556;1557; MIPS64-LABEL: and_i1_65:1558; MIPS64: # %bb.0: # %entry1559; MIPS64-NEXT: jr $ra1560; MIPS64-NEXT: move $2, $41561;1562; MIPS64R2-LABEL: and_i1_65:1563; MIPS64R2: # %bb.0: # %entry1564; MIPS64R2-NEXT: jr $ra1565; MIPS64R2-NEXT: move $2, $41566;1567; MIPS64R6-LABEL: and_i1_65:1568; MIPS64R6: # %bb.0: # %entry1569; MIPS64R6-NEXT: jr $ra1570; MIPS64R6-NEXT: move $2, $41571;1572; MM32R3-LABEL: and_i1_65:1573; MM32R3: # %bb.0: # %entry1574; MM32R3-NEXT: move $2, $41575; MM32R3-NEXT: jrc $ra1576;1577; MM32R6-LABEL: and_i1_65:1578; MM32R6: # %bb.0: # %entry1579; MM32R6-NEXT: move $2, $41580; MM32R6-NEXT: jrc $ra1581entry:1582 %r = and i1 65, %b1583 ret i1 %r1584}1585 1586define signext i8 @and_i8_65(i8 signext %b) {1587; MIPS-LABEL: and_i8_65:1588; MIPS: # %bb.0: # %entry1589; MIPS-NEXT: jr $ra1590; MIPS-NEXT: andi $2, $4, 651591;1592; MIPS32R2-LABEL: and_i8_65:1593; MIPS32R2: # %bb.0: # %entry1594; MIPS32R2-NEXT: jr $ra1595; MIPS32R2-NEXT: andi $2, $4, 651596;1597; MIPS32R6-LABEL: and_i8_65:1598; MIPS32R6: # %bb.0: # %entry1599; MIPS32R6-NEXT: jr $ra1600; MIPS32R6-NEXT: andi $2, $4, 651601;1602; MIPS64-LABEL: and_i8_65:1603; MIPS64: # %bb.0: # %entry1604; MIPS64-NEXT: jr $ra1605; MIPS64-NEXT: andi $2, $4, 651606;1607; MIPS64R2-LABEL: and_i8_65:1608; MIPS64R2: # %bb.0: # %entry1609; MIPS64R2-NEXT: jr $ra1610; MIPS64R2-NEXT: andi $2, $4, 651611;1612; MIPS64R6-LABEL: and_i8_65:1613; MIPS64R6: # %bb.0: # %entry1614; MIPS64R6-NEXT: jr $ra1615; MIPS64R6-NEXT: andi $2, $4, 651616;1617; MM32R3-LABEL: and_i8_65:1618; MM32R3: # %bb.0: # %entry1619; MM32R3-NEXT: jr $ra1620; MM32R3-NEXT: andi $2, $4, 651621;1622; MM32R6-LABEL: and_i8_65:1623; MM32R6: # %bb.0: # %entry1624; MM32R6-NEXT: andi $2, $4, 651625; MM32R6-NEXT: jrc $ra1626entry:1627 %r = and i8 65, %b1628 ret i8 %r1629}1630 1631define signext i16 @and_i16_65(i16 signext %b) {1632; MIPS-LABEL: and_i16_65:1633; MIPS: # %bb.0: # %entry1634; MIPS-NEXT: jr $ra1635; MIPS-NEXT: andi $2, $4, 651636;1637; MIPS32R2-LABEL: and_i16_65:1638; MIPS32R2: # %bb.0: # %entry1639; MIPS32R2-NEXT: jr $ra1640; MIPS32R2-NEXT: andi $2, $4, 651641;1642; MIPS32R6-LABEL: and_i16_65:1643; MIPS32R6: # %bb.0: # %entry1644; MIPS32R6-NEXT: jr $ra1645; MIPS32R6-NEXT: andi $2, $4, 651646;1647; MIPS64-LABEL: and_i16_65:1648; MIPS64: # %bb.0: # %entry1649; MIPS64-NEXT: jr $ra1650; MIPS64-NEXT: andi $2, $4, 651651;1652; MIPS64R2-LABEL: and_i16_65:1653; MIPS64R2: # %bb.0: # %entry1654; MIPS64R2-NEXT: jr $ra1655; MIPS64R2-NEXT: andi $2, $4, 651656;1657; MIPS64R6-LABEL: and_i16_65:1658; MIPS64R6: # %bb.0: # %entry1659; MIPS64R6-NEXT: jr $ra1660; MIPS64R6-NEXT: andi $2, $4, 651661;1662; MM32R3-LABEL: and_i16_65:1663; MM32R3: # %bb.0: # %entry1664; MM32R3-NEXT: jr $ra1665; MM32R3-NEXT: andi $2, $4, 651666;1667; MM32R6-LABEL: and_i16_65:1668; MM32R6: # %bb.0: # %entry1669; MM32R6-NEXT: andi $2, $4, 651670; MM32R6-NEXT: jrc $ra1671entry:1672 %r = and i16 65, %b1673 ret i16 %r1674}1675 1676define signext i32 @and_i32_65(i32 signext %b) {1677; MIPS-LABEL: and_i32_65:1678; MIPS: # %bb.0: # %entry1679; MIPS-NEXT: jr $ra1680; MIPS-NEXT: andi $2, $4, 651681;1682; MIPS32R2-LABEL: and_i32_65:1683; MIPS32R2: # %bb.0: # %entry1684; MIPS32R2-NEXT: jr $ra1685; MIPS32R2-NEXT: andi $2, $4, 651686;1687; MIPS32R6-LABEL: and_i32_65:1688; MIPS32R6: # %bb.0: # %entry1689; MIPS32R6-NEXT: jr $ra1690; MIPS32R6-NEXT: andi $2, $4, 651691;1692; MIPS64-LABEL: and_i32_65:1693; MIPS64: # %bb.0: # %entry1694; MIPS64-NEXT: jr $ra1695; MIPS64-NEXT: andi $2, $4, 651696;1697; MIPS64R2-LABEL: and_i32_65:1698; MIPS64R2: # %bb.0: # %entry1699; MIPS64R2-NEXT: jr $ra1700; MIPS64R2-NEXT: andi $2, $4, 651701;1702; MIPS64R6-LABEL: and_i32_65:1703; MIPS64R6: # %bb.0: # %entry1704; MIPS64R6-NEXT: jr $ra1705; MIPS64R6-NEXT: andi $2, $4, 651706;1707; MM32R3-LABEL: and_i32_65:1708; MM32R3: # %bb.0: # %entry1709; MM32R3-NEXT: jr $ra1710; MM32R3-NEXT: andi $2, $4, 651711;1712; MM32R6-LABEL: and_i32_65:1713; MM32R6: # %bb.0: # %entry1714; MM32R6-NEXT: andi $2, $4, 651715; MM32R6-NEXT: jrc $ra1716entry:1717 %r = and i32 65, %b1718 ret i32 %r1719}1720 1721define signext i64 @and_i64_65(i64 signext %b) {1722; MIPS-LABEL: and_i64_65:1723; MIPS: # %bb.0: # %entry1724; MIPS-NEXT: andi $3, $5, 651725; MIPS-NEXT: jr $ra1726; MIPS-NEXT: addiu $2, $zero, 01727;1728; MIPS32R2-LABEL: and_i64_65:1729; MIPS32R2: # %bb.0: # %entry1730; MIPS32R2-NEXT: andi $3, $5, 651731; MIPS32R2-NEXT: jr $ra1732; MIPS32R2-NEXT: addiu $2, $zero, 01733;1734; MIPS32R6-LABEL: and_i64_65:1735; MIPS32R6: # %bb.0: # %entry1736; MIPS32R6-NEXT: andi $3, $5, 651737; MIPS32R6-NEXT: jr $ra1738; MIPS32R6-NEXT: addiu $2, $zero, 01739;1740; MIPS64-LABEL: and_i64_65:1741; MIPS64: # %bb.0: # %entry1742; MIPS64-NEXT: jr $ra1743; MIPS64-NEXT: andi $2, $4, 651744;1745; MIPS64R2-LABEL: and_i64_65:1746; MIPS64R2: # %bb.0: # %entry1747; MIPS64R2-NEXT: jr $ra1748; MIPS64R2-NEXT: andi $2, $4, 651749;1750; MIPS64R6-LABEL: and_i64_65:1751; MIPS64R6: # %bb.0: # %entry1752; MIPS64R6-NEXT: jr $ra1753; MIPS64R6-NEXT: andi $2, $4, 651754;1755; MM32R3-LABEL: and_i64_65:1756; MM32R3: # %bb.0: # %entry1757; MM32R3-NEXT: li16 $2, 01758; MM32R3-NEXT: jr $ra1759; MM32R3-NEXT: andi $3, $5, 651760;1761; MM32R6-LABEL: and_i64_65:1762; MM32R6: # %bb.0: # %entry1763; MM32R6-NEXT: andi $3, $5, 651764; MM32R6-NEXT: li16 $2, 01765; MM32R6-NEXT: jrc $ra1766entry:1767 %r = and i64 65, %b1768 ret i64 %r1769}1770 1771define signext i128 @and_i128_65(i128 signext %b) {1772; MIPS-LABEL: and_i128_65:1773; MIPS: # %bb.0: # %entry1774; MIPS-NEXT: andi $5, $7, 651775; MIPS-NEXT: addiu $2, $zero, 01776; MIPS-NEXT: addiu $3, $zero, 01777; MIPS-NEXT: jr $ra1778; MIPS-NEXT: addiu $4, $zero, 01779;1780; MIPS32R2-LABEL: and_i128_65:1781; MIPS32R2: # %bb.0: # %entry1782; MIPS32R2-NEXT: andi $5, $7, 651783; MIPS32R2-NEXT: addiu $2, $zero, 01784; MIPS32R2-NEXT: addiu $3, $zero, 01785; MIPS32R2-NEXT: jr $ra1786; MIPS32R2-NEXT: addiu $4, $zero, 01787;1788; MIPS32R6-LABEL: and_i128_65:1789; MIPS32R6: # %bb.0: # %entry1790; MIPS32R6-NEXT: andi $5, $7, 651791; MIPS32R6-NEXT: addiu $2, $zero, 01792; MIPS32R6-NEXT: addiu $3, $zero, 01793; MIPS32R6-NEXT: jr $ra1794; MIPS32R6-NEXT: addiu $4, $zero, 01795;1796; MIPS64-LABEL: and_i128_65:1797; MIPS64: # %bb.0: # %entry1798; MIPS64-NEXT: andi $3, $5, 651799; MIPS64-NEXT: jr $ra1800; MIPS64-NEXT: daddiu $2, $zero, 01801;1802; MIPS64R2-LABEL: and_i128_65:1803; MIPS64R2: # %bb.0: # %entry1804; MIPS64R2-NEXT: andi $3, $5, 651805; MIPS64R2-NEXT: jr $ra1806; MIPS64R2-NEXT: daddiu $2, $zero, 01807;1808; MIPS64R6-LABEL: and_i128_65:1809; MIPS64R6: # %bb.0: # %entry1810; MIPS64R6-NEXT: andi $3, $5, 651811; MIPS64R6-NEXT: jr $ra1812; MIPS64R6-NEXT: daddiu $2, $zero, 01813;1814; MM32R3-LABEL: and_i128_65:1815; MM32R3: # %bb.0: # %entry1816; MM32R3-NEXT: li16 $2, 01817; MM32R3-NEXT: li16 $3, 01818; MM32R3-NEXT: li16 $4, 01819; MM32R3-NEXT: jr $ra1820; MM32R3-NEXT: andi $5, $7, 651821;1822; MM32R6-LABEL: and_i128_65:1823; MM32R6: # %bb.0: # %entry1824; MM32R6-NEXT: andi $5, $7, 651825; MM32R6-NEXT: li16 $2, 01826; MM32R6-NEXT: li16 $3, 01827; MM32R6-NEXT: li16 $4, 01828; MM32R6-NEXT: jrc $ra1829entry:1830 %r = and i128 65, %b1831 ret i128 %r1832}1833 1834define signext i1 @and_i1_256(i1 signext %b) {1835; MIPS-LABEL: and_i1_256:1836; MIPS: # %bb.0: # %entry1837; MIPS-NEXT: jr $ra1838; MIPS-NEXT: addiu $2, $zero, 01839;1840; MIPS32R2-LABEL: and_i1_256:1841; MIPS32R2: # %bb.0: # %entry1842; MIPS32R2-NEXT: jr $ra1843; MIPS32R2-NEXT: addiu $2, $zero, 01844;1845; MIPS32R6-LABEL: and_i1_256:1846; MIPS32R6: # %bb.0: # %entry1847; MIPS32R6-NEXT: jr $ra1848; MIPS32R6-NEXT: addiu $2, $zero, 01849;1850; MIPS64-LABEL: and_i1_256:1851; MIPS64: # %bb.0: # %entry1852; MIPS64-NEXT: jr $ra1853; MIPS64-NEXT: addiu $2, $zero, 01854;1855; MIPS64R2-LABEL: and_i1_256:1856; MIPS64R2: # %bb.0: # %entry1857; MIPS64R2-NEXT: jr $ra1858; MIPS64R2-NEXT: addiu $2, $zero, 01859;1860; MIPS64R6-LABEL: and_i1_256:1861; MIPS64R6: # %bb.0: # %entry1862; MIPS64R6-NEXT: jr $ra1863; MIPS64R6-NEXT: addiu $2, $zero, 01864;1865; MM32R3-LABEL: and_i1_256:1866; MM32R3: # %bb.0: # %entry1867; MM32R3-NEXT: li16 $2, 01868; MM32R3-NEXT: jrc $ra1869;1870; MM32R6-LABEL: and_i1_256:1871; MM32R6: # %bb.0: # %entry1872; MM32R6-NEXT: li16 $2, 01873; MM32R6-NEXT: jrc $ra1874entry:1875 %r = and i1 256, %b1876 ret i1 %r1877}1878 1879define signext i8 @and_i8_256(i8 signext %b) {1880; MIPS-LABEL: and_i8_256:1881; MIPS: # %bb.0: # %entry1882; MIPS-NEXT: jr $ra1883; MIPS-NEXT: addiu $2, $zero, 01884;1885; MIPS32R2-LABEL: and_i8_256:1886; MIPS32R2: # %bb.0: # %entry1887; MIPS32R2-NEXT: jr $ra1888; MIPS32R2-NEXT: addiu $2, $zero, 01889;1890; MIPS32R6-LABEL: and_i8_256:1891; MIPS32R6: # %bb.0: # %entry1892; MIPS32R6-NEXT: jr $ra1893; MIPS32R6-NEXT: addiu $2, $zero, 01894;1895; MIPS64-LABEL: and_i8_256:1896; MIPS64: # %bb.0: # %entry1897; MIPS64-NEXT: jr $ra1898; MIPS64-NEXT: addiu $2, $zero, 01899;1900; MIPS64R2-LABEL: and_i8_256:1901; MIPS64R2: # %bb.0: # %entry1902; MIPS64R2-NEXT: jr $ra1903; MIPS64R2-NEXT: addiu $2, $zero, 01904;1905; MIPS64R6-LABEL: and_i8_256:1906; MIPS64R6: # %bb.0: # %entry1907; MIPS64R6-NEXT: jr $ra1908; MIPS64R6-NEXT: addiu $2, $zero, 01909;1910; MM32R3-LABEL: and_i8_256:1911; MM32R3: # %bb.0: # %entry1912; MM32R3-NEXT: li16 $2, 01913; MM32R3-NEXT: jrc $ra1914;1915; MM32R6-LABEL: and_i8_256:1916; MM32R6: # %bb.0: # %entry1917; MM32R6-NEXT: li16 $2, 01918; MM32R6-NEXT: jrc $ra1919entry:1920 %r = and i8 256, %b1921 ret i8 %r1922}1923 1924define signext i16 @and_i16_256(i16 signext %b) {1925; MIPS-LABEL: and_i16_256:1926; MIPS: # %bb.0: # %entry1927; MIPS-NEXT: jr $ra1928; MIPS-NEXT: andi $2, $4, 2561929;1930; MIPS32R2-LABEL: and_i16_256:1931; MIPS32R2: # %bb.0: # %entry1932; MIPS32R2-NEXT: jr $ra1933; MIPS32R2-NEXT: andi $2, $4, 2561934;1935; MIPS32R6-LABEL: and_i16_256:1936; MIPS32R6: # %bb.0: # %entry1937; MIPS32R6-NEXT: jr $ra1938; MIPS32R6-NEXT: andi $2, $4, 2561939;1940; MIPS64-LABEL: and_i16_256:1941; MIPS64: # %bb.0: # %entry1942; MIPS64-NEXT: jr $ra1943; MIPS64-NEXT: andi $2, $4, 2561944;1945; MIPS64R2-LABEL: and_i16_256:1946; MIPS64R2: # %bb.0: # %entry1947; MIPS64R2-NEXT: jr $ra1948; MIPS64R2-NEXT: andi $2, $4, 2561949;1950; MIPS64R6-LABEL: and_i16_256:1951; MIPS64R6: # %bb.0: # %entry1952; MIPS64R6-NEXT: jr $ra1953; MIPS64R6-NEXT: andi $2, $4, 2561954;1955; MM32R3-LABEL: and_i16_256:1956; MM32R3: # %bb.0: # %entry1957; MM32R3-NEXT: jr $ra1958; MM32R3-NEXT: andi $2, $4, 2561959;1960; MM32R6-LABEL: and_i16_256:1961; MM32R6: # %bb.0: # %entry1962; MM32R6-NEXT: andi $2, $4, 2561963; MM32R6-NEXT: jrc $ra1964entry:1965 %r = and i16 256, %b1966 ret i16 %r1967}1968 1969define signext i32 @and_i32_256(i32 signext %b) {1970; MIPS-LABEL: and_i32_256:1971; MIPS: # %bb.0: # %entry1972; MIPS-NEXT: jr $ra1973; MIPS-NEXT: andi $2, $4, 2561974;1975; MIPS32R2-LABEL: and_i32_256:1976; MIPS32R2: # %bb.0: # %entry1977; MIPS32R2-NEXT: jr $ra1978; MIPS32R2-NEXT: andi $2, $4, 2561979;1980; MIPS32R6-LABEL: and_i32_256:1981; MIPS32R6: # %bb.0: # %entry1982; MIPS32R6-NEXT: jr $ra1983; MIPS32R6-NEXT: andi $2, $4, 2561984;1985; MIPS64-LABEL: and_i32_256:1986; MIPS64: # %bb.0: # %entry1987; MIPS64-NEXT: jr $ra1988; MIPS64-NEXT: andi $2, $4, 2561989;1990; MIPS64R2-LABEL: and_i32_256:1991; MIPS64R2: # %bb.0: # %entry1992; MIPS64R2-NEXT: jr $ra1993; MIPS64R2-NEXT: andi $2, $4, 2561994;1995; MIPS64R6-LABEL: and_i32_256:1996; MIPS64R6: # %bb.0: # %entry1997; MIPS64R6-NEXT: jr $ra1998; MIPS64R6-NEXT: andi $2, $4, 2561999;2000; MM32R3-LABEL: and_i32_256:2001; MM32R3: # %bb.0: # %entry2002; MM32R3-NEXT: jr $ra2003; MM32R3-NEXT: andi $2, $4, 2562004;2005; MM32R6-LABEL: and_i32_256:2006; MM32R6: # %bb.0: # %entry2007; MM32R6-NEXT: andi $2, $4, 2562008; MM32R6-NEXT: jrc $ra2009entry:2010 %r = and i32 256, %b2011 ret i32 %r2012}2013 2014define signext i64 @and_i64_256(i64 signext %b) {2015; MIPS-LABEL: and_i64_256:2016; MIPS: # %bb.0: # %entry2017; MIPS-NEXT: andi $3, $5, 2562018; MIPS-NEXT: jr $ra2019; MIPS-NEXT: addiu $2, $zero, 02020;2021; MIPS32R2-LABEL: and_i64_256:2022; MIPS32R2: # %bb.0: # %entry2023; MIPS32R2-NEXT: andi $3, $5, 2562024; MIPS32R2-NEXT: jr $ra2025; MIPS32R2-NEXT: addiu $2, $zero, 02026;2027; MIPS32R6-LABEL: and_i64_256:2028; MIPS32R6: # %bb.0: # %entry2029; MIPS32R6-NEXT: andi $3, $5, 2562030; MIPS32R6-NEXT: jr $ra2031; MIPS32R6-NEXT: addiu $2, $zero, 02032;2033; MIPS64-LABEL: and_i64_256:2034; MIPS64: # %bb.0: # %entry2035; MIPS64-NEXT: jr $ra2036; MIPS64-NEXT: andi $2, $4, 2562037;2038; MIPS64R2-LABEL: and_i64_256:2039; MIPS64R2: # %bb.0: # %entry2040; MIPS64R2-NEXT: jr $ra2041; MIPS64R2-NEXT: andi $2, $4, 2562042;2043; MIPS64R6-LABEL: and_i64_256:2044; MIPS64R6: # %bb.0: # %entry2045; MIPS64R6-NEXT: jr $ra2046; MIPS64R6-NEXT: andi $2, $4, 2562047;2048; MM32R3-LABEL: and_i64_256:2049; MM32R3: # %bb.0: # %entry2050; MM32R3-NEXT: li16 $2, 02051; MM32R3-NEXT: jr $ra2052; MM32R3-NEXT: andi $3, $5, 2562053;2054; MM32R6-LABEL: and_i64_256:2055; MM32R6: # %bb.0: # %entry2056; MM32R6-NEXT: andi $3, $5, 2562057; MM32R6-NEXT: li16 $2, 02058; MM32R6-NEXT: jrc $ra2059entry:2060 %r = and i64 256, %b2061 ret i64 %r2062}2063 2064define signext i128 @and_i128_256(i128 signext %b) {2065; MIPS-LABEL: and_i128_256:2066; MIPS: # %bb.0: # %entry2067; MIPS-NEXT: andi $5, $7, 2562068; MIPS-NEXT: addiu $2, $zero, 02069; MIPS-NEXT: addiu $3, $zero, 02070; MIPS-NEXT: jr $ra2071; MIPS-NEXT: addiu $4, $zero, 02072;2073; MIPS32R2-LABEL: and_i128_256:2074; MIPS32R2: # %bb.0: # %entry2075; MIPS32R2-NEXT: andi $5, $7, 2562076; MIPS32R2-NEXT: addiu $2, $zero, 02077; MIPS32R2-NEXT: addiu $3, $zero, 02078; MIPS32R2-NEXT: jr $ra2079; MIPS32R2-NEXT: addiu $4, $zero, 02080;2081; MIPS32R6-LABEL: and_i128_256:2082; MIPS32R6: # %bb.0: # %entry2083; MIPS32R6-NEXT: andi $5, $7, 2562084; MIPS32R6-NEXT: addiu $2, $zero, 02085; MIPS32R6-NEXT: addiu $3, $zero, 02086; MIPS32R6-NEXT: jr $ra2087; MIPS32R6-NEXT: addiu $4, $zero, 02088;2089; MIPS64-LABEL: and_i128_256:2090; MIPS64: # %bb.0: # %entry2091; MIPS64-NEXT: andi $3, $5, 2562092; MIPS64-NEXT: jr $ra2093; MIPS64-NEXT: daddiu $2, $zero, 02094;2095; MIPS64R2-LABEL: and_i128_256:2096; MIPS64R2: # %bb.0: # %entry2097; MIPS64R2-NEXT: andi $3, $5, 2562098; MIPS64R2-NEXT: jr $ra2099; MIPS64R2-NEXT: daddiu $2, $zero, 02100;2101; MIPS64R6-LABEL: and_i128_256:2102; MIPS64R6: # %bb.0: # %entry2103; MIPS64R6-NEXT: andi $3, $5, 2562104; MIPS64R6-NEXT: jr $ra2105; MIPS64R6-NEXT: daddiu $2, $zero, 02106;2107; MM32R3-LABEL: and_i128_256:2108; MM32R3: # %bb.0: # %entry2109; MM32R3-NEXT: li16 $2, 02110; MM32R3-NEXT: li16 $3, 02111; MM32R3-NEXT: li16 $4, 02112; MM32R3-NEXT: jr $ra2113; MM32R3-NEXT: andi $5, $7, 2562114;2115; MM32R6-LABEL: and_i128_256:2116; MM32R6: # %bb.0: # %entry2117; MM32R6-NEXT: andi $5, $7, 2562118; MM32R6-NEXT: li16 $2, 02119; MM32R6-NEXT: li16 $3, 02120; MM32R6-NEXT: li16 $4, 02121; MM32R6-NEXT: jrc $ra2122entry:2123 %r = and i128 256, %b2124 ret i128 %r2125}2126