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1; RUN: llc -mtriple=mips -mcpu=mips32r2 -asm-show-inst \2; RUN: < %s | FileCheck %s --check-prefix=MIPS32R23; RUN: llc -mtriple=mips -mcpu=mips32r2 -mattr=+fp64 -asm-show-inst \4; RUN: < %s | FileCheck %s --check-prefix=MIPS32FP645; RUN: llc -mtriple=mips -mcpu=mips32r3 -mattr=+micromips -asm-show-inst \6; RUN: < %s | FileCheck %s --check-prefix=MM7; RUN: llc -mtriple=mips -mcpu=mips32r3 -mattr=+micromips,+fp64 -asm-show-inst \8; RUN: < %s | FileCheck %s --check-prefix=MMFP649; RUN: llc -mtriple=mips -mcpu=mips32r6 -mattr=+micromips -asm-show-inst \10; RUN: < %s | FileCheck %s --check-prefix=MMR611 12define double @mthc1(i64 %a) {13; MIPS32R2: mthc1 {{.*}} # <MCInst #{{[0-9]+}} MTHC1_D3214; MIPS32FP64: mthc1 {{.*}} # <MCInst #{{[0-9]+}} MTHC1_D6415; MM: mthc1 {{.*}} # <MCInst #{{[0-9]+}} MTHC1_D32_MM16; MMFP64: mthc1 {{.*}} # <MCInst #{{[0-9]+}} MTHC1_D64_MM17; MMR6: mthc1 {{.*}} # <MCInst #{{[0-9]+}} MTHC1_D64_MM18 %1 = bitcast i64 %a to double19 ret double %120}21 22define i64 @mfhc1(double %a) {23; MIPS32R2: mfhc1 {{.*}} # <MCInst #{{[0-9]+}} MFHC1_D3224; MIPS32FP64: mfhc1 {{.*}} # <MCInst #{{[0-9]+}} MFHC1_D6425; MM: mfhc1 {{.*}} # <MCInst #{{[0-9]+}} MFHC1_D32_MM26; MMFP64: mfhc1 {{.*}} # <MCInst #{{[0-9]+}} MFHC1_D64_MM27; MMR6: mfhc1 {{.*}} # <MCInst #{{[0-9]+}} MFHC1_D64_MM28 %1 = bitcast double %a to i6429 ret i64 %130}31