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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=mips -mcpu=mips2 -relocation-model=pic \3; RUN: -mips-jalr-reloc=false | FileCheck %s -check-prefixes=MIPS24; RUN: llc < %s -mtriple=mips -mcpu=mips32 -relocation-model=pic \5; RUN: -mips-jalr-reloc=false | FileCheck %s -check-prefixes=GP32,GP32R0R26; RUN: llc < %s -mtriple=mips -mcpu=mips32r2 -relocation-model=pic \7; RUN: -mips-jalr-reloc=false | FileCheck %s -check-prefixes=GP32,GP32R2R58; RUN: llc < %s -mtriple=mips -mcpu=mips32r3 -relocation-model=pic \9; RUN: -mips-jalr-reloc=false | FileCheck %s -check-prefixes=GP32,GP32R2R510; RUN: llc < %s -mtriple=mips -mcpu=mips32r5 -relocation-model=pic \11; RUN: -mips-jalr-reloc=false | FileCheck %s -check-prefixes=GP32,GP32R2R512; RUN: llc < %s -mtriple=mips -mcpu=mips32r6 -relocation-model=pic \13; RUN: -mips-jalr-reloc=false | FileCheck %s -check-prefix=GP32R614 15; RUN: llc < %s -mtriple=mips64 -mcpu=mips3 -relocation-model=pic \16; RUN: -mips-jalr-reloc=false | FileCheck %s -check-prefixes=MIPS317; RUN: llc < %s -mtriple=mips64 -mcpu=mips4 -relocation-model=pic \18; RUN: -mips-jalr-reloc=false | FileCheck %s -check-prefixes=MIPS319; RUN: llc < %s -mtriple=mips64 -mcpu=mips64 -relocation-model=pic \20; RUN: -mips-jalr-reloc=false | FileCheck %s -check-prefixes=GP64,GP64R0R121; RUN: llc < %s -mtriple=mips64 -mcpu=mips64r2 -relocation-model=pic \22; RUN: -mips-jalr-reloc=false | FileCheck %s -check-prefixes=GP64,GP64R2R523; RUN: llc < %s -mtriple=mips64 -mcpu=mips64r3 -relocation-model=pic \24; RUN: -mips-jalr-reloc=false | FileCheck %s -check-prefixes=GP64,GP64R2R525; RUN: llc < %s -mtriple=mips64 -mcpu=mips64r5 -relocation-model=pic \26; RUN: -mips-jalr-reloc=false | FileCheck %s -check-prefixes=GP64,GP64R2R527; RUN: llc < %s -mtriple=mips64 -mcpu=mips64r6 -relocation-model=pic \28; RUN: -mips-jalr-reloc=false | FileCheck %s -check-prefix=GP64R629 30; RUN: llc < %s -mtriple=mips -mcpu=mips32r3 -mattr=+micromips \31; RUN: -relocation-model=pic -mips-jalr-reloc=false | \32; RUN: FileCheck %s -check-prefix=MMR333; RUN: llc < %s -mtriple=mips -mcpu=mips32r6 -mattr=+micromips \34; RUN: -relocation-model=pic -mips-jalr-reloc=false | \35; RUN: FileCheck %s -check-prefix=MMR636 37define signext i1 @sdiv_i1(i1 signext %a, i1 signext %b) {38; MIPS2-LABEL: sdiv_i1:39; MIPS2: # %bb.0: # %entry40; MIPS2-NEXT: jr $ra41; MIPS2-NEXT: move $2, $442;43; GP32-LABEL: sdiv_i1:44; GP32: # %bb.0: # %entry45; GP32-NEXT: jr $ra46; GP32-NEXT: move $2, $447;48; GP32R6-LABEL: sdiv_i1:49; GP32R6: # %bb.0: # %entry50; GP32R6-NEXT: jr $ra51; GP32R6-NEXT: move $2, $452;53; MIPS3-LABEL: sdiv_i1:54; MIPS3: # %bb.0: # %entry55; MIPS3-NEXT: jr $ra56; MIPS3-NEXT: move $2, $457;58; GP64-LABEL: sdiv_i1:59; GP64: # %bb.0: # %entry60; GP64-NEXT: jr $ra61; GP64-NEXT: move $2, $462;63; GP64R6-LABEL: sdiv_i1:64; GP64R6: # %bb.0: # %entry65; GP64R6-NEXT: jr $ra66; GP64R6-NEXT: move $2, $467;68; MMR3-LABEL: sdiv_i1:69; MMR3: # %bb.0: # %entry70; MMR3-NEXT: move $2, $471; MMR3-NEXT: jrc $ra72;73; MMR6-LABEL: sdiv_i1:74; MMR6: # %bb.0: # %entry75; MMR6-NEXT: move $2, $476; MMR6-NEXT: jrc $ra77entry:78 %r = sdiv i1 %a, %b79 ret i1 %r80}81 82define signext i8 @sdiv_i8(i8 signext %a, i8 signext %b) {83; MIPS2-LABEL: sdiv_i8:84; MIPS2: # %bb.0: # %entry85; MIPS2-NEXT: div $zero, $4, $586; MIPS2-NEXT: teq $5, $zero, 787; MIPS2-NEXT: mflo $188; MIPS2-NEXT: sll $1, $1, 2489; MIPS2-NEXT: jr $ra90; MIPS2-NEXT: sra $2, $1, 2491;92; GP32R0R2-LABEL: sdiv_i8:93; GP32R0R2: # %bb.0: # %entry94; GP32R0R2-NEXT: div $zero, $4, $595; GP32R0R2-NEXT: teq $5, $zero, 796; GP32R0R2-NEXT: mflo $197; GP32R0R2-NEXT: sll $1, $1, 2498; GP32R0R2-NEXT: jr $ra99; GP32R0R2-NEXT: sra $2, $1, 24100;101; GP32R2R5-LABEL: sdiv_i8:102; GP32R2R5: # %bb.0: # %entry103; GP32R2R5-NEXT: div $zero, $4, $5104; GP32R2R5-NEXT: teq $5, $zero, 7105; GP32R2R5-NEXT: mflo $1106; GP32R2R5-NEXT: jr $ra107; GP32R2R5-NEXT: seb $2, $1108;109; GP32R6-LABEL: sdiv_i8:110; GP32R6: # %bb.0: # %entry111; GP32R6-NEXT: div $1, $4, $5112; GP32R6-NEXT: teq $5, $zero, 7113; GP32R6-NEXT: jr $ra114; GP32R6-NEXT: seb $2, $1115;116; MIPS3-LABEL: sdiv_i8:117; MIPS3: # %bb.0: # %entry118; MIPS3-NEXT: div $zero, $4, $5119; MIPS3-NEXT: teq $5, $zero, 7120; MIPS3-NEXT: mflo $1121; MIPS3-NEXT: sll $1, $1, 24122; MIPS3-NEXT: jr $ra123; MIPS3-NEXT: sra $2, $1, 24124;125; GP64R0R1-LABEL: sdiv_i8:126; GP64R0R1: # %bb.0: # %entry127; GP64R0R1-NEXT: div $zero, $4, $5128; GP64R0R1-NEXT: teq $5, $zero, 7129; GP64R0R1-NEXT: mflo $1130; GP64R0R1-NEXT: sll $1, $1, 24131; GP64R0R1-NEXT: jr $ra132; GP64R0R1-NEXT: sra $2, $1, 24133;134; GP64R2R5-LABEL: sdiv_i8:135; GP64R2R5: # %bb.0: # %entry136; GP64R2R5-NEXT: div $zero, $4, $5137; GP64R2R5-NEXT: teq $5, $zero, 7138; GP64R2R5-NEXT: mflo $1139; GP64R2R5-NEXT: jr $ra140; GP64R2R5-NEXT: seb $2, $1141;142; GP64R6-LABEL: sdiv_i8:143; GP64R6: # %bb.0: # %entry144; GP64R6-NEXT: div $1, $4, $5145; GP64R6-NEXT: teq $5, $zero, 7146; GP64R6-NEXT: jr $ra147; GP64R6-NEXT: seb $2, $1148;149; MMR3-LABEL: sdiv_i8:150; MMR3: # %bb.0: # %entry151; MMR3-NEXT: div $zero, $4, $5152; MMR3-NEXT: teq $5, $zero, 7153; MMR3-NEXT: mflo16 $1154; MMR3-NEXT: jr $ra155; MMR3-NEXT: seb $2, $1156;157; MMR6-LABEL: sdiv_i8:158; MMR6: # %bb.0: # %entry159; MMR6-NEXT: div $1, $4, $5160; MMR6-NEXT: teq $5, $zero, 7161; MMR6-NEXT: seb $2, $1162; MMR6-NEXT: jrc $ra163entry:164 %r = sdiv i8 %a, %b165 ret i8 %r166}167 168define signext i16 @sdiv_i16(i16 signext %a, i16 signext %b) {169; MIPS2-LABEL: sdiv_i16:170; MIPS2: # %bb.0: # %entry171; MIPS2-NEXT: div $zero, $4, $5172; MIPS2-NEXT: teq $5, $zero, 7173; MIPS2-NEXT: mflo $1174; MIPS2-NEXT: sll $1, $1, 16175; MIPS2-NEXT: jr $ra176; MIPS2-NEXT: sra $2, $1, 16177;178; GP32R0R2-LABEL: sdiv_i16:179; GP32R0R2: # %bb.0: # %entry180; GP32R0R2-NEXT: div $zero, $4, $5181; GP32R0R2-NEXT: teq $5, $zero, 7182; GP32R0R2-NEXT: mflo $1183; GP32R0R2-NEXT: sll $1, $1, 16184; GP32R0R2-NEXT: jr $ra185; GP32R0R2-NEXT: sra $2, $1, 16186;187; GP32R2R5-LABEL: sdiv_i16:188; GP32R2R5: # %bb.0: # %entry189; GP32R2R5-NEXT: div $zero, $4, $5190; GP32R2R5-NEXT: teq $5, $zero, 7191; GP32R2R5-NEXT: mflo $1192; GP32R2R5-NEXT: jr $ra193; GP32R2R5-NEXT: seh $2, $1194;195; GP32R6-LABEL: sdiv_i16:196; GP32R6: # %bb.0: # %entry197; GP32R6-NEXT: div $1, $4, $5198; GP32R6-NEXT: teq $5, $zero, 7199; GP32R6-NEXT: jr $ra200; GP32R6-NEXT: seh $2, $1201;202; MIPS3-LABEL: sdiv_i16:203; MIPS3: # %bb.0: # %entry204; MIPS3-NEXT: div $zero, $4, $5205; MIPS3-NEXT: teq $5, $zero, 7206; MIPS3-NEXT: mflo $1207; MIPS3-NEXT: sll $1, $1, 16208; MIPS3-NEXT: jr $ra209; MIPS3-NEXT: sra $2, $1, 16210;211; GP64R0R1-LABEL: sdiv_i16:212; GP64R0R1: # %bb.0: # %entry213; GP64R0R1-NEXT: div $zero, $4, $5214; GP64R0R1-NEXT: teq $5, $zero, 7215; GP64R0R1-NEXT: mflo $1216; GP64R0R1-NEXT: sll $1, $1, 16217; GP64R0R1-NEXT: jr $ra218; GP64R0R1-NEXT: sra $2, $1, 16219;220; GP64R2R5-LABEL: sdiv_i16:221; GP64R2R5: # %bb.0: # %entry222; GP64R2R5-NEXT: div $zero, $4, $5223; GP64R2R5-NEXT: teq $5, $zero, 7224; GP64R2R5-NEXT: mflo $1225; GP64R2R5-NEXT: jr $ra226; GP64R2R5-NEXT: seh $2, $1227;228; GP64R6-LABEL: sdiv_i16:229; GP64R6: # %bb.0: # %entry230; GP64R6-NEXT: div $1, $4, $5231; GP64R6-NEXT: teq $5, $zero, 7232; GP64R6-NEXT: jr $ra233; GP64R6-NEXT: seh $2, $1234;235; MMR3-LABEL: sdiv_i16:236; MMR3: # %bb.0: # %entry237; MMR3-NEXT: div $zero, $4, $5238; MMR3-NEXT: teq $5, $zero, 7239; MMR3-NEXT: mflo16 $1240; MMR3-NEXT: jr $ra241; MMR3-NEXT: seh $2, $1242;243; MMR6-LABEL: sdiv_i16:244; MMR6: # %bb.0: # %entry245; MMR6-NEXT: div $1, $4, $5246; MMR6-NEXT: teq $5, $zero, 7247; MMR6-NEXT: seh $2, $1248; MMR6-NEXT: jrc $ra249entry:250 %r = sdiv i16 %a, %b251 ret i16 %r252}253 254define signext i32 @sdiv_i32(i32 signext %a, i32 signext %b) {255; MIPS2-LABEL: sdiv_i32:256; MIPS2: # %bb.0: # %entry257; MIPS2-NEXT: div $zero, $4, $5258; MIPS2-NEXT: teq $5, $zero, 7259; MIPS2-NEXT: mflo $2260; MIPS2-NEXT: jr $ra261; MIPS2-NEXT: nop262;263; GP32-LABEL: sdiv_i32:264; GP32: # %bb.0: # %entry265; GP32-NEXT: div $zero, $4, $5266; GP32-NEXT: teq $5, $zero, 7267; GP32-NEXT: jr $ra268; GP32-NEXT: mflo $2269;270; GP32R6-LABEL: sdiv_i32:271; GP32R6: # %bb.0: # %entry272; GP32R6-NEXT: div $2, $4, $5273; GP32R6-NEXT: teq $5, $zero, 7274; GP32R6-NEXT: jrc $ra275;276; MIPS3-LABEL: sdiv_i32:277; MIPS3: # %bb.0: # %entry278; MIPS3-NEXT: div $zero, $4, $5279; MIPS3-NEXT: teq $5, $zero, 7280; MIPS3-NEXT: mflo $2281; MIPS3-NEXT: jr $ra282; MIPS3-NEXT: nop283;284; GP64-LABEL: sdiv_i32:285; GP64: # %bb.0: # %entry286; GP64-NEXT: div $zero, $4, $5287; GP64-NEXT: teq $5, $zero, 7288; GP64-NEXT: jr $ra289; GP64-NEXT: mflo $2290;291; GP64R6-LABEL: sdiv_i32:292; GP64R6: # %bb.0: # %entry293; GP64R6-NEXT: div $2, $4, $5294; GP64R6-NEXT: teq $5, $zero, 7295; GP64R6-NEXT: jrc $ra296;297; MMR3-LABEL: sdiv_i32:298; MMR3: # %bb.0: # %entry299; MMR3-NEXT: div $zero, $4, $5300; MMR3-NEXT: teq $5, $zero, 7301; MMR3-NEXT: mflo16 $2302; MMR3-NEXT: jrc $ra303;304; MMR6-LABEL: sdiv_i32:305; MMR6: # %bb.0: # %entry306; MMR6-NEXT: div $2, $4, $5307; MMR6-NEXT: teq $5, $zero, 7308; MMR6-NEXT: jrc $ra309entry:310 %r = sdiv i32 %a, %b311 ret i32 %r312}313 314define signext i64 @sdiv_i64(i64 signext %a, i64 signext %b) {315; MIPS2-LABEL: sdiv_i64:316; MIPS2: # %bb.0: # %entry317; MIPS2-NEXT: lui $2, %hi(_gp_disp)318; MIPS2-NEXT: addiu $2, $2, %lo(_gp_disp)319; MIPS2-NEXT: addiu $sp, $sp, -24320; MIPS2-NEXT: .cfi_def_cfa_offset 24321; MIPS2-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill322; MIPS2-NEXT: .cfi_offset 31, -4323; MIPS2-NEXT: addu $gp, $2, $25324; MIPS2-NEXT: lw $25, %call16(__divdi3)($gp)325; MIPS2-NEXT: jalr $25326; MIPS2-NEXT: nop327; MIPS2-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload328; MIPS2-NEXT: jr $ra329; MIPS2-NEXT: addiu $sp, $sp, 24330;331; GP32-LABEL: sdiv_i64:332; GP32: # %bb.0: # %entry333; GP32-NEXT: lui $2, %hi(_gp_disp)334; GP32-NEXT: addiu $2, $2, %lo(_gp_disp)335; GP32-NEXT: addiu $sp, $sp, -24336; GP32-NEXT: .cfi_def_cfa_offset 24337; GP32-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill338; GP32-NEXT: .cfi_offset 31, -4339; GP32-NEXT: addu $gp, $2, $25340; GP32-NEXT: lw $25, %call16(__divdi3)($gp)341; GP32-NEXT: jalr $25342; GP32-NEXT: nop343; GP32-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload344; GP32-NEXT: jr $ra345; GP32-NEXT: addiu $sp, $sp, 24346;347; GP32R6-LABEL: sdiv_i64:348; GP32R6: # %bb.0: # %entry349; GP32R6-NEXT: lui $2, %hi(_gp_disp)350; GP32R6-NEXT: addiu $2, $2, %lo(_gp_disp)351; GP32R6-NEXT: addiu $sp, $sp, -24352; GP32R6-NEXT: .cfi_def_cfa_offset 24353; GP32R6-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill354; GP32R6-NEXT: .cfi_offset 31, -4355; GP32R6-NEXT: addu $gp, $2, $25356; GP32R6-NEXT: lw $25, %call16(__divdi3)($gp)357; GP32R6-NEXT: jalrc $25358; GP32R6-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload359; GP32R6-NEXT: jr $ra360; GP32R6-NEXT: addiu $sp, $sp, 24361;362; MIPS3-LABEL: sdiv_i64:363; MIPS3: # %bb.0: # %entry364; MIPS3-NEXT: ddiv $zero, $4, $5365; MIPS3-NEXT: teq $5, $zero, 7366; MIPS3-NEXT: mflo $2367; MIPS3-NEXT: jr $ra368; MIPS3-NEXT: nop369;370; GP64-LABEL: sdiv_i64:371; GP64: # %bb.0: # %entry372; GP64-NEXT: ddiv $zero, $4, $5373; GP64-NEXT: teq $5, $zero, 7374; GP64-NEXT: jr $ra375; GP64-NEXT: mflo $2376;377; GP64R6-LABEL: sdiv_i64:378; GP64R6: # %bb.0: # %entry379; GP64R6-NEXT: ddiv $2, $4, $5380; GP64R6-NEXT: teq $5, $zero, 7381; GP64R6-NEXT: jrc $ra382;383; MMR3-LABEL: sdiv_i64:384; MMR3: # %bb.0: # %entry385; MMR3-NEXT: lui $2, %hi(_gp_disp)386; MMR3-NEXT: addiu $2, $2, %lo(_gp_disp)387; MMR3-NEXT: addiusp -24388; MMR3-NEXT: .cfi_def_cfa_offset 24389; MMR3-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill390; MMR3-NEXT: .cfi_offset 31, -4391; MMR3-NEXT: addu $gp, $2, $25392; MMR3-NEXT: lw $25, %call16(__divdi3)($gp)393; MMR3-NEXT: jalr $25394; MMR3-NEXT: nop395; MMR3-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload396; MMR3-NEXT: addiusp 24397; MMR3-NEXT: jrc $ra398;399; MMR6-LABEL: sdiv_i64:400; MMR6: # %bb.0: # %entry401; MMR6-NEXT: lui $2, %hi(_gp_disp)402; MMR6-NEXT: addiu $2, $2, %lo(_gp_disp)403; MMR6-NEXT: addiu $sp, $sp, -24404; MMR6-NEXT: .cfi_def_cfa_offset 24405; MMR6-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill406; MMR6-NEXT: .cfi_offset 31, -4407; MMR6-NEXT: addu $gp, $2, $25408; MMR6-NEXT: lw $25, %call16(__divdi3)($gp)409; MMR6-NEXT: jalr $25410; MMR6-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload411; MMR6-NEXT: addiu $sp, $sp, 24412; MMR6-NEXT: jrc $ra413entry:414 %r = sdiv i64 %a, %b415 ret i64 %r416}417 418define signext i128 @sdiv_i128(i128 signext %a, i128 signext %b) {419; MIPS2-LABEL: sdiv_i128:420; MIPS2: # %bb.0: # %entry421; MIPS2-NEXT: lui $2, %hi(_gp_disp)422; MIPS2-NEXT: addiu $2, $2, %lo(_gp_disp)423; MIPS2-NEXT: addiu $sp, $sp, -40424; MIPS2-NEXT: .cfi_def_cfa_offset 40425; MIPS2-NEXT: sw $ra, 36($sp) # 4-byte Folded Spill426; MIPS2-NEXT: .cfi_offset 31, -4427; MIPS2-NEXT: addu $gp, $2, $25428; MIPS2-NEXT: lw $1, 60($sp)429; MIPS2-NEXT: lw $2, 64($sp)430; MIPS2-NEXT: lw $3, 68($sp)431; MIPS2-NEXT: sw $3, 28($sp)432; MIPS2-NEXT: sw $2, 24($sp)433; MIPS2-NEXT: sw $1, 20($sp)434; MIPS2-NEXT: lw $1, 56($sp)435; MIPS2-NEXT: sw $1, 16($sp)436; MIPS2-NEXT: lw $25, %call16(__divti3)($gp)437; MIPS2-NEXT: jalr $25438; MIPS2-NEXT: nop439; MIPS2-NEXT: lw $ra, 36($sp) # 4-byte Folded Reload440; MIPS2-NEXT: jr $ra441; MIPS2-NEXT: addiu $sp, $sp, 40442;443; GP32-LABEL: sdiv_i128:444; GP32: # %bb.0: # %entry445; GP32-NEXT: lui $2, %hi(_gp_disp)446; GP32-NEXT: addiu $2, $2, %lo(_gp_disp)447; GP32-NEXT: addiu $sp, $sp, -40448; GP32-NEXT: .cfi_def_cfa_offset 40449; GP32-NEXT: sw $ra, 36($sp) # 4-byte Folded Spill450; GP32-NEXT: .cfi_offset 31, -4451; GP32-NEXT: addu $gp, $2, $25452; GP32-NEXT: lw $1, 60($sp)453; GP32-NEXT: lw $2, 64($sp)454; GP32-NEXT: lw $3, 68($sp)455; GP32-NEXT: sw $3, 28($sp)456; GP32-NEXT: sw $2, 24($sp)457; GP32-NEXT: sw $1, 20($sp)458; GP32-NEXT: lw $1, 56($sp)459; GP32-NEXT: sw $1, 16($sp)460; GP32-NEXT: lw $25, %call16(__divti3)($gp)461; GP32-NEXT: jalr $25462; GP32-NEXT: nop463; GP32-NEXT: lw $ra, 36($sp) # 4-byte Folded Reload464; GP32-NEXT: jr $ra465; GP32-NEXT: addiu $sp, $sp, 40466;467; GP32R6-LABEL: sdiv_i128:468; GP32R6: # %bb.0: # %entry469; GP32R6-NEXT: lui $2, %hi(_gp_disp)470; GP32R6-NEXT: addiu $2, $2, %lo(_gp_disp)471; GP32R6-NEXT: addiu $sp, $sp, -40472; GP32R6-NEXT: .cfi_def_cfa_offset 40473; GP32R6-NEXT: sw $ra, 36($sp) # 4-byte Folded Spill474; GP32R6-NEXT: .cfi_offset 31, -4475; GP32R6-NEXT: addu $gp, $2, $25476; GP32R6-NEXT: lw $1, 60($sp)477; GP32R6-NEXT: lw $2, 64($sp)478; GP32R6-NEXT: lw $3, 68($sp)479; GP32R6-NEXT: sw $3, 28($sp)480; GP32R6-NEXT: sw $2, 24($sp)481; GP32R6-NEXT: sw $1, 20($sp)482; GP32R6-NEXT: lw $1, 56($sp)483; GP32R6-NEXT: sw $1, 16($sp)484; GP32R6-NEXT: lw $25, %call16(__divti3)($gp)485; GP32R6-NEXT: jalrc $25486; GP32R6-NEXT: lw $ra, 36($sp) # 4-byte Folded Reload487; GP32R6-NEXT: jr $ra488; GP32R6-NEXT: addiu $sp, $sp, 40489;490; MIPS3-LABEL: sdiv_i128:491; MIPS3: # %bb.0: # %entry492; MIPS3-NEXT: daddiu $sp, $sp, -16493; MIPS3-NEXT: .cfi_def_cfa_offset 16494; MIPS3-NEXT: sd $ra, 8($sp) # 8-byte Folded Spill495; MIPS3-NEXT: sd $gp, 0($sp) # 8-byte Folded Spill496; MIPS3-NEXT: .cfi_offset 31, -8497; MIPS3-NEXT: .cfi_offset 28, -16498; MIPS3-NEXT: lui $1, %hi(%neg(%gp_rel(sdiv_i128)))499; MIPS3-NEXT: daddu $1, $1, $25500; MIPS3-NEXT: daddiu $gp, $1, %lo(%neg(%gp_rel(sdiv_i128)))501; MIPS3-NEXT: ld $25, %call16(__divti3)($gp)502; MIPS3-NEXT: jalr $25503; MIPS3-NEXT: nop504; MIPS3-NEXT: ld $gp, 0($sp) # 8-byte Folded Reload505; MIPS3-NEXT: ld $ra, 8($sp) # 8-byte Folded Reload506; MIPS3-NEXT: jr $ra507; MIPS3-NEXT: daddiu $sp, $sp, 16508;509; GP64-LABEL: sdiv_i128:510; GP64: # %bb.0: # %entry511; GP64-NEXT: daddiu $sp, $sp, -16512; GP64-NEXT: .cfi_def_cfa_offset 16513; GP64-NEXT: sd $ra, 8($sp) # 8-byte Folded Spill514; GP64-NEXT: sd $gp, 0($sp) # 8-byte Folded Spill515; GP64-NEXT: .cfi_offset 31, -8516; GP64-NEXT: .cfi_offset 28, -16517; GP64-NEXT: lui $1, %hi(%neg(%gp_rel(sdiv_i128)))518; GP64-NEXT: daddu $1, $1, $25519; GP64-NEXT: daddiu $gp, $1, %lo(%neg(%gp_rel(sdiv_i128)))520; GP64-NEXT: ld $25, %call16(__divti3)($gp)521; GP64-NEXT: jalr $25522; GP64-NEXT: nop523; GP64-NEXT: ld $gp, 0($sp) # 8-byte Folded Reload524; GP64-NEXT: ld $ra, 8($sp) # 8-byte Folded Reload525; GP64-NEXT: jr $ra526; GP64-NEXT: daddiu $sp, $sp, 16527;528; GP64R6-LABEL: sdiv_i128:529; GP64R6: # %bb.0: # %entry530; GP64R6-NEXT: daddiu $sp, $sp, -16531; GP64R6-NEXT: .cfi_def_cfa_offset 16532; GP64R6-NEXT: sd $ra, 8($sp) # 8-byte Folded Spill533; GP64R6-NEXT: sd $gp, 0($sp) # 8-byte Folded Spill534; GP64R6-NEXT: .cfi_offset 31, -8535; GP64R6-NEXT: .cfi_offset 28, -16536; GP64R6-NEXT: lui $1, %hi(%neg(%gp_rel(sdiv_i128)))537; GP64R6-NEXT: daddu $1, $1, $25538; GP64R6-NEXT: daddiu $gp, $1, %lo(%neg(%gp_rel(sdiv_i128)))539; GP64R6-NEXT: ld $25, %call16(__divti3)($gp)540; GP64R6-NEXT: jalrc $25541; GP64R6-NEXT: ld $gp, 0($sp) # 8-byte Folded Reload542; GP64R6-NEXT: ld $ra, 8($sp) # 8-byte Folded Reload543; GP64R6-NEXT: jr $ra544; GP64R6-NEXT: daddiu $sp, $sp, 16545;546; MMR3-LABEL: sdiv_i128:547; MMR3: # %bb.0: # %entry548; MMR3-NEXT: lui $2, %hi(_gp_disp)549; MMR3-NEXT: addiu $2, $2, %lo(_gp_disp)550; MMR3-NEXT: addiusp -40551; MMR3-NEXT: .cfi_def_cfa_offset 40552; MMR3-NEXT: sw $ra, 36($sp) # 4-byte Folded Spill553; MMR3-NEXT: sw $17, 32($sp) # 4-byte Folded Spill554; MMR3-NEXT: .cfi_offset 31, -4555; MMR3-NEXT: .cfi_offset 17, -8556; MMR3-NEXT: addu $gp, $2, $25557; MMR3-NEXT: move $1, $7558; MMR3-NEXT: lw $7, 60($sp)559; MMR3-NEXT: lw $17, 64($sp)560; MMR3-NEXT: lw $3, 68($sp)561; MMR3-NEXT: move $2, $sp562; MMR3-NEXT: sw16 $3, 28($2)563; MMR3-NEXT: sw16 $17, 24($2)564; MMR3-NEXT: sw16 $7, 20($2)565; MMR3-NEXT: lw $3, 56($sp)566; MMR3-NEXT: sw16 $3, 16($2)567; MMR3-NEXT: lw $25, %call16(__divti3)($gp)568; MMR3-NEXT: move $7, $1569; MMR3-NEXT: jalr $25570; MMR3-NEXT: nop571; MMR3-NEXT: lw $17, 32($sp) # 4-byte Folded Reload572; MMR3-NEXT: lw $ra, 36($sp) # 4-byte Folded Reload573; MMR3-NEXT: addiusp 40574; MMR3-NEXT: jrc $ra575;576; MMR6-LABEL: sdiv_i128:577; MMR6: # %bb.0: # %entry578; MMR6-NEXT: lui $2, %hi(_gp_disp)579; MMR6-NEXT: addiu $2, $2, %lo(_gp_disp)580; MMR6-NEXT: addiu $sp, $sp, -40581; MMR6-NEXT: .cfi_def_cfa_offset 40582; MMR6-NEXT: sw $ra, 36($sp) # 4-byte Folded Spill583; MMR6-NEXT: sw $17, 32($sp) # 4-byte Folded Spill584; MMR6-NEXT: .cfi_offset 31, -4585; MMR6-NEXT: .cfi_offset 17, -8586; MMR6-NEXT: addu $gp, $2, $25587; MMR6-NEXT: move $1, $7588; MMR6-NEXT: lw $7, 60($sp)589; MMR6-NEXT: lw $17, 64($sp)590; MMR6-NEXT: lw $3, 68($sp)591; MMR6-NEXT: move $2, $sp592; MMR6-NEXT: sw16 $3, 28($2)593; MMR6-NEXT: sw16 $17, 24($2)594; MMR6-NEXT: sw16 $7, 20($2)595; MMR6-NEXT: lw $3, 56($sp)596; MMR6-NEXT: sw16 $3, 16($2)597; MMR6-NEXT: lw $25, %call16(__divti3)($gp)598; MMR6-NEXT: move $7, $1599; MMR6-NEXT: jalr $25600; MMR6-NEXT: lw $17, 32($sp) # 4-byte Folded Reload601; MMR6-NEXT: lw $ra, 36($sp) # 4-byte Folded Reload602; MMR6-NEXT: addiu $sp, $sp, 40603; MMR6-NEXT: jrc $ra604entry:605 %r = sdiv i128 %a, %b606 ret i128 %r607}608