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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips2 -verify-machineinstrs | FileCheck %s \3; RUN: -check-prefixes=M24; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32 -verify-machineinstrs | FileCheck %s \5; RUN: -check-prefixes=CMOV32R16; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r2 -verify-machineinstrs | FileCheck %s \7; RUN: -check-prefixes=CMOV32R28; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r3 -verify-machineinstrs | FileCheck %s \9; RUN: -check-prefixes=CMOV32R210; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r5 -verify-machineinstrs | FileCheck %s \11; RUN: -check-prefixes=CMOV32R212; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r6 -verify-machineinstrs | FileCheck %s \13; RUN: -check-prefixes=32R614; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips3 -verify-machineinstrs | FileCheck %s \15; RUN: -check-prefixes=M316; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips4 -verify-machineinstrs | FileCheck %s \17; RUN: -check-prefixes=CMOV6418; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips64 -verify-machineinstrs | FileCheck %s \19; RUN: -check-prefixes=CMOV6420; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips64r2 -verify-machineinstrs | FileCheck %s \21; RUN: -check-prefixes=CMOV6422; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips64r3 -verify-machineinstrs | FileCheck %s \23; RUN: -check-prefixes=CMOV6424; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips64r5 -verify-machineinstrs | FileCheck %s \25; RUN: -check-prefixes=CMOV6426; RUN: llc < %s -mtriple=mips64-unknown-linux-gnu -mcpu=mips64r6 -verify-machineinstrs | FileCheck %s \27; RUN: -check-prefixes=64R628; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r3 -mattr=+micromips -verify-machineinstrs -asm-show-inst | FileCheck %s \29; RUN: -check-prefixes=MM32R330; RUN: llc < %s -mtriple=mips-unknown-linux-gnu -mcpu=mips32r6 -mattr=+micromips -verify-machineinstrs | FileCheck %s \31; RUN: -check-prefixes=MM32R632 33define float @tst_select_i1_float(i1 signext %s, float %x, float %y) {34; M2-LABEL: tst_select_i1_float:35; M2: # %bb.0: # %entry36; M2-NEXT: andi $1, $4, 137; M2-NEXT: bnez $1, $BB0_238; M2-NEXT: nop39; M2-NEXT: # %bb.1: # %entry40; M2-NEXT: jr $ra41; M2-NEXT: mtc1 $6, $f042; M2-NEXT: $BB0_2:43; M2-NEXT: jr $ra44; M2-NEXT: mtc1 $5, $f045;46; CMOV32R1-LABEL: tst_select_i1_float:47; CMOV32R1: # %bb.0: # %entry48; CMOV32R1-NEXT: mtc1 $6, $f049; CMOV32R1-NEXT: andi $1, $4, 150; CMOV32R1-NEXT: mtc1 $5, $f151; CMOV32R1-NEXT: jr $ra52; CMOV32R1-NEXT: movn.s $f0, $f1, $153;54; CMOV32R2-LABEL: tst_select_i1_float:55; CMOV32R2: # %bb.0: # %entry56; CMOV32R2-NEXT: mtc1 $6, $f057; CMOV32R2-NEXT: andi $1, $4, 158; CMOV32R2-NEXT: mtc1 $5, $f159; CMOV32R2-NEXT: jr $ra60; CMOV32R2-NEXT: movn.s $f0, $f1, $161;62; 32R6-LABEL: tst_select_i1_float:63; 32R6: # %bb.0: # %entry64; 32R6-NEXT: mtc1 $5, $f165; 32R6-NEXT: mtc1 $6, $f266; 32R6-NEXT: mtc1 $4, $f067; 32R6-NEXT: jr $ra68; 32R6-NEXT: sel.s $f0, $f2, $f169;70; M3-LABEL: tst_select_i1_float:71; M3: # %bb.0: # %entry72; M3-NEXT: andi $1, $4, 173; M3-NEXT: bnez $1, .LBB0_274; M3-NEXT: mov.s $f0, $f1375; M3-NEXT: # %bb.1: # %entry76; M3-NEXT: mov.s $f0, $f1477; M3-NEXT: .LBB0_2: # %entry78; M3-NEXT: jr $ra79; M3-NEXT: nop80;81; CMOV64-LABEL: tst_select_i1_float:82; CMOV64: # %bb.0: # %entry83; CMOV64-NEXT: mov.s $f0, $f1484; CMOV64-NEXT: andi $1, $4, 185; CMOV64-NEXT: jr $ra86; CMOV64-NEXT: movn.s $f0, $f13, $187;88; 64R6-LABEL: tst_select_i1_float:89; 64R6: # %bb.0: # %entry90; 64R6-NEXT: mtc1 $4, $f091; 64R6-NEXT: jr $ra92; 64R6-NEXT: sel.s $f0, $f14, $f1393;94; MM32R3-LABEL: tst_select_i1_float:95; MM32R3: # %bb.0: # %entry96; MM32R3: mtc1 $6, $f0 # <MCInst #{{.*}} MTC1_MM97; MM32R3: andi16 $2, $4, 1 # <MCInst #{{.*}} ANDI16_MM98; MM32R3: mtc1 $5, $f1 # <MCInst #{{.*}} MTC1_MM99; MM32R3: jr $ra # <MCInst #{{.*}} JR_MM100; MM32R3: movn.s $f0, $f1, $2 # <MCInst #{{.*}} MOVN_I_S_MM101;102; MM32R6-LABEL: tst_select_i1_float:103; MM32R6: # %bb.0: # %entry104; MM32R6-NEXT: mtc1 $5, $f1105; MM32R6-NEXT: mtc1 $6, $f2106; MM32R6-NEXT: mtc1 $4, $f0107; MM32R6-NEXT: sel.s $f0, $f2, $f1108; MM32R6-NEXT: jrc $ra109entry:110 %r = select i1 %s, float %x, float %y111 ret float %r112}113 114define float @tst_select_i1_float_reordered(float %x, float %y,115; M2-LABEL: tst_select_i1_float_reordered:116; M2: # %bb.0: # %entry117; M2-NEXT: andi $1, $6, 1118; M2-NEXT: bnez $1, $BB1_2119; M2-NEXT: mov.s $f0, $f12120; M2-NEXT: # %bb.1: # %entry121; M2-NEXT: mov.s $f0, $f14122; M2-NEXT: $BB1_2: # %entry123; M2-NEXT: jr $ra124; M2-NEXT: nop125;126; CMOV32R1-LABEL: tst_select_i1_float_reordered:127; CMOV32R1: # %bb.0: # %entry128; CMOV32R1-NEXT: mov.s $f0, $f14129; CMOV32R1-NEXT: andi $1, $6, 1130; CMOV32R1-NEXT: jr $ra131; CMOV32R1-NEXT: movn.s $f0, $f12, $1132;133; CMOV32R2-LABEL: tst_select_i1_float_reordered:134; CMOV32R2: # %bb.0: # %entry135; CMOV32R2-NEXT: mov.s $f0, $f14136; CMOV32R2-NEXT: andi $1, $6, 1137; CMOV32R2-NEXT: jr $ra138; CMOV32R2-NEXT: movn.s $f0, $f12, $1139;140; 32R6-LABEL: tst_select_i1_float_reordered:141; 32R6: # %bb.0: # %entry142; 32R6-NEXT: mtc1 $6, $f0143; 32R6-NEXT: jr $ra144; 32R6-NEXT: sel.s $f0, $f14, $f12145;146; M3-LABEL: tst_select_i1_float_reordered:147; M3: # %bb.0: # %entry148; M3-NEXT: andi $1, $6, 1149; M3-NEXT: bnez $1, .LBB1_2150; M3-NEXT: mov.s $f0, $f12151; M3-NEXT: # %bb.1: # %entry152; M3-NEXT: mov.s $f0, $f13153; M3-NEXT: .LBB1_2: # %entry154; M3-NEXT: jr $ra155; M3-NEXT: nop156;157; CMOV64-LABEL: tst_select_i1_float_reordered:158; CMOV64: # %bb.0: # %entry159; CMOV64-NEXT: mov.s $f0, $f13160; CMOV64-NEXT: andi $1, $6, 1161; CMOV64-NEXT: jr $ra162; CMOV64-NEXT: movn.s $f0, $f12, $1163;164; 64R6-LABEL: tst_select_i1_float_reordered:165; 64R6: # %bb.0: # %entry166; 64R6-NEXT: mtc1 $6, $f0167; 64R6-NEXT: jr $ra168; 64R6-NEXT: sel.s $f0, $f13, $f12169;170; MM32R3-LABEL: tst_select_i1_float_reordered:171; MM32R3: # %bb.0: # %entry172; MM32R3: mov.s $f0, $f14 # <MCInst #{{.*}} FMOV_S173; MM32R3: andi16 $2, $6, 1 # <MCInst #{{.*}} ANDI16_MM174; MM32R3: jr $ra # <MCInst #{{.*}} JR_MM175; MM32R3: movn.s $f0, $f12, $2 # <MCInst #{{.*}} MOVN_I_S_MM176;177; MM32R6-LABEL: tst_select_i1_float_reordered:178; MM32R6: # %bb.0: # %entry179; MM32R6-NEXT: mtc1 $6, $f0180; MM32R6-NEXT: sel.s $f0, $f14, $f12181; MM32R6-NEXT: jrc $ra182 i1 signext %s) {183entry:184 %r = select i1 %s, float %x, float %y185 ret float %r186}187 188define float @tst_select_fcmp_olt_float(float %x, float %y) {189; M2-LABEL: tst_select_fcmp_olt_float:190; M2: # %bb.0: # %entry191; M2-NEXT: c.olt.s $f12, $f14192; M2-NEXT: nop193; M2-NEXT: bc1t $BB2_2194; M2-NEXT: mov.s $f0, $f12195; M2-NEXT: # %bb.1: # %entry196; M2-NEXT: mov.s $f0, $f14197; M2-NEXT: $BB2_2: # %entry198; M2-NEXT: jr $ra199; M2-NEXT: nop200;201; CMOV32R1-LABEL: tst_select_fcmp_olt_float:202; CMOV32R1: # %bb.0: # %entry203; CMOV32R1-NEXT: mov.s $f0, $f14204; CMOV32R1-NEXT: c.olt.s $f12, $f14205; CMOV32R1-NEXT: jr $ra206; CMOV32R1-NEXT: movt.s $f0, $f12, $fcc0207;208; CMOV32R2-LABEL: tst_select_fcmp_olt_float:209; CMOV32R2: # %bb.0: # %entry210; CMOV32R2-NEXT: mov.s $f0, $f14211; CMOV32R2-NEXT: c.olt.s $f12, $f14212; CMOV32R2-NEXT: jr $ra213; CMOV32R2-NEXT: movt.s $f0, $f12, $fcc0214;215; 32R6-LABEL: tst_select_fcmp_olt_float:216; 32R6: # %bb.0: # %entry217; 32R6-NEXT: cmp.lt.s $f0, $f12, $f14218; 32R6-NEXT: jr $ra219; 32R6-NEXT: sel.s $f0, $f14, $f12220;221; M3-LABEL: tst_select_fcmp_olt_float:222; M3: # %bb.0: # %entry223; M3-NEXT: c.olt.s $f12, $f13224; M3-NEXT: nop225; M3-NEXT: bc1t .LBB2_2226; M3-NEXT: mov.s $f0, $f12227; M3-NEXT: # %bb.1: # %entry228; M3-NEXT: mov.s $f0, $f13229; M3-NEXT: .LBB2_2: # %entry230; M3-NEXT: jr $ra231; M3-NEXT: nop232;233; CMOV64-LABEL: tst_select_fcmp_olt_float:234; CMOV64: # %bb.0: # %entry235; CMOV64-NEXT: mov.s $f0, $f13236; CMOV64-NEXT: c.olt.s $f12, $f13237; CMOV64-NEXT: jr $ra238; CMOV64-NEXT: movt.s $f0, $f12, $fcc0239;240; 64R6-LABEL: tst_select_fcmp_olt_float:241; 64R6: # %bb.0: # %entry242; 64R6-NEXT: cmp.lt.s $f0, $f12, $f13243; 64R6-NEXT: jr $ra244; 64R6-NEXT: sel.s $f0, $f13, $f12245;246; MM32R3-LABEL: tst_select_fcmp_olt_float:247; MM32R3: # %bb.0: # %entry248; MM32R3: mov.s $f0, $f14 # <MCInst #{{.*}} FMOV_S249; MM32R3: c.olt.s $f12, $f14 # <MCInst #{{.*}} FCMP_S32_MM250; MM32R3: jr $ra # <MCInst #{{.*}} JR_MM251; MM32R3: movt.s $f0, $f12, $fcc0 # <MCInst #{{.*}} MOVT_S_MM252;253; MM32R6-LABEL: tst_select_fcmp_olt_float:254; MM32R6: # %bb.0: # %entry255; MM32R6-NEXT: cmp.lt.s $f0, $f12, $f14256; MM32R6-NEXT: sel.s $f0, $f14, $f12257; MM32R6-NEXT: jrc $ra258entry:259 %s = fcmp olt float %x, %y260 %r = select i1 %s, float %x, float %y261 ret float %r262}263 264define float @tst_select_fcmp_ole_float(float %x, float %y) {265; M2-LABEL: tst_select_fcmp_ole_float:266; M2: # %bb.0: # %entry267; M2-NEXT: c.ole.s $f12, $f14268; M2-NEXT: nop269; M2-NEXT: bc1t $BB3_2270; M2-NEXT: mov.s $f0, $f12271; M2-NEXT: # %bb.1: # %entry272; M2-NEXT: mov.s $f0, $f14273; M2-NEXT: $BB3_2: # %entry274; M2-NEXT: jr $ra275; M2-NEXT: nop276;277; CMOV32R1-LABEL: tst_select_fcmp_ole_float:278; CMOV32R1: # %bb.0: # %entry279; CMOV32R1-NEXT: mov.s $f0, $f14280; CMOV32R1-NEXT: c.ole.s $f12, $f14281; CMOV32R1-NEXT: jr $ra282; CMOV32R1-NEXT: movt.s $f0, $f12, $fcc0283;284; CMOV32R2-LABEL: tst_select_fcmp_ole_float:285; CMOV32R2: # %bb.0: # %entry286; CMOV32R2-NEXT: mov.s $f0, $f14287; CMOV32R2-NEXT: c.ole.s $f12, $f14288; CMOV32R2-NEXT: jr $ra289; CMOV32R2-NEXT: movt.s $f0, $f12, $fcc0290;291; 32R6-LABEL: tst_select_fcmp_ole_float:292; 32R6: # %bb.0: # %entry293; 32R6-NEXT: cmp.le.s $f0, $f12, $f14294; 32R6-NEXT: jr $ra295; 32R6-NEXT: sel.s $f0, $f14, $f12296;297; M3-LABEL: tst_select_fcmp_ole_float:298; M3: # %bb.0: # %entry299; M3-NEXT: c.ole.s $f12, $f13300; M3-NEXT: nop301; M3-NEXT: bc1t .LBB3_2302; M3-NEXT: mov.s $f0, $f12303; M3-NEXT: # %bb.1: # %entry304; M3-NEXT: mov.s $f0, $f13305; M3-NEXT: .LBB3_2: # %entry306; M3-NEXT: jr $ra307; M3-NEXT: nop308;309; CMOV64-LABEL: tst_select_fcmp_ole_float:310; CMOV64: # %bb.0: # %entry311; CMOV64-NEXT: mov.s $f0, $f13312; CMOV64-NEXT: c.ole.s $f12, $f13313; CMOV64-NEXT: jr $ra314; CMOV64-NEXT: movt.s $f0, $f12, $fcc0315;316; 64R6-LABEL: tst_select_fcmp_ole_float:317; 64R6: # %bb.0: # %entry318; 64R6-NEXT: cmp.le.s $f0, $f12, $f13319; 64R6-NEXT: jr $ra320; 64R6-NEXT: sel.s $f0, $f13, $f12321;322; MM32R3-LABEL: tst_select_fcmp_ole_float:323; MM32R3: # %bb.0: # %entry324; MM32R3: mov.s $f0, $f14 # <MCInst #{{.*}} FMOV_S325; MM32R3: c.ole.s $f12, $f14 # <MCInst #{{.*}} FCMP_S32_MM326; MM32R3: jr $ra # <MCInst #{{.*}} JR_MM327; MM32R3: movt.s $f0, $f12, $fcc0 # <MCInst #{{.*}} MOVT_S_MM328;329; MM32R6-LABEL: tst_select_fcmp_ole_float:330; MM32R6: # %bb.0: # %entry331; MM32R6-NEXT: cmp.le.s $f0, $f12, $f14332; MM32R6-NEXT: sel.s $f0, $f14, $f12333; MM32R6-NEXT: jrc $ra334entry:335 %s = fcmp ole float %x, %y336 %r = select i1 %s, float %x, float %y337 ret float %r338}339 340define float @tst_select_fcmp_ogt_float(float %x, float %y) {341; M2-LABEL: tst_select_fcmp_ogt_float:342; M2: # %bb.0: # %entry343; M2-NEXT: c.ule.s $f12, $f14344; M2-NEXT: nop345; M2-NEXT: bc1f $BB4_2346; M2-NEXT: mov.s $f0, $f12347; M2-NEXT: # %bb.1: # %entry348; M2-NEXT: mov.s $f0, $f14349; M2-NEXT: $BB4_2: # %entry350; M2-NEXT: jr $ra351; M2-NEXT: nop352;353; CMOV32R1-LABEL: tst_select_fcmp_ogt_float:354; CMOV32R1: # %bb.0: # %entry355; CMOV32R1-NEXT: mov.s $f0, $f14356; CMOV32R1-NEXT: c.ule.s $f12, $f14357; CMOV32R1-NEXT: jr $ra358; CMOV32R1-NEXT: movf.s $f0, $f12, $fcc0359;360; CMOV32R2-LABEL: tst_select_fcmp_ogt_float:361; CMOV32R2: # %bb.0: # %entry362; CMOV32R2-NEXT: mov.s $f0, $f14363; CMOV32R2-NEXT: c.ule.s $f12, $f14364; CMOV32R2-NEXT: jr $ra365; CMOV32R2-NEXT: movf.s $f0, $f12, $fcc0366;367; 32R6-LABEL: tst_select_fcmp_ogt_float:368; 32R6: # %bb.0: # %entry369; 32R6-NEXT: cmp.lt.s $f0, $f14, $f12370; 32R6-NEXT: jr $ra371; 32R6-NEXT: sel.s $f0, $f14, $f12372;373; M3-LABEL: tst_select_fcmp_ogt_float:374; M3: # %bb.0: # %entry375; M3-NEXT: c.ule.s $f12, $f13376; M3-NEXT: nop377; M3-NEXT: bc1f .LBB4_2378; M3-NEXT: mov.s $f0, $f12379; M3-NEXT: # %bb.1: # %entry380; M3-NEXT: mov.s $f0, $f13381; M3-NEXT: .LBB4_2: # %entry382; M3-NEXT: jr $ra383; M3-NEXT: nop384;385; CMOV64-LABEL: tst_select_fcmp_ogt_float:386; CMOV64: # %bb.0: # %entry387; CMOV64-NEXT: mov.s $f0, $f13388; CMOV64-NEXT: c.ule.s $f12, $f13389; CMOV64-NEXT: jr $ra390; CMOV64-NEXT: movf.s $f0, $f12, $fcc0391;392; 64R6-LABEL: tst_select_fcmp_ogt_float:393; 64R6: # %bb.0: # %entry394; 64R6-NEXT: cmp.lt.s $f0, $f13, $f12395; 64R6-NEXT: jr $ra396; 64R6-NEXT: sel.s $f0, $f13, $f12397;398; MM32R3-LABEL: tst_select_fcmp_ogt_float:399; MM32R3: # %bb.0: # %entry400; MM32R3: mov.s $f0, $f14 # <MCInst #{{.*}} FMOV_S401; MM32R3: c.ule.s $f12, $f14 # <MCInst #{{.*}} FCMP_S32_MM402; MM32R3: jr $ra # <MCInst #{{.*}} JR_MM403; MM32R3: movf.s $f0, $f12, $fcc0 # <MCInst #{{.*}} MOVF_S_MM404;405; MM32R6-LABEL: tst_select_fcmp_ogt_float:406; MM32R6: # %bb.0: # %entry407; MM32R6-NEXT: cmp.lt.s $f0, $f14, $f12408; MM32R6-NEXT: sel.s $f0, $f14, $f12409; MM32R6-NEXT: jrc $ra410entry:411 %s = fcmp ogt float %x, %y412 %r = select i1 %s, float %x, float %y413 ret float %r414}415 416define float @tst_select_fcmp_oge_float(float %x, float %y) {417; M2-LABEL: tst_select_fcmp_oge_float:418; M2: # %bb.0: # %entry419; M2-NEXT: c.ult.s $f12, $f14420; M2-NEXT: nop421; M2-NEXT: bc1f $BB5_2422; M2-NEXT: mov.s $f0, $f12423; M2-NEXT: # %bb.1: # %entry424; M2-NEXT: mov.s $f0, $f14425; M2-NEXT: $BB5_2: # %entry426; M2-NEXT: jr $ra427; M2-NEXT: nop428;429; CMOV32R1-LABEL: tst_select_fcmp_oge_float:430; CMOV32R1: # %bb.0: # %entry431; CMOV32R1-NEXT: mov.s $f0, $f14432; CMOV32R1-NEXT: c.ult.s $f12, $f14433; CMOV32R1-NEXT: jr $ra434; CMOV32R1-NEXT: movf.s $f0, $f12, $fcc0435;436; CMOV32R2-LABEL: tst_select_fcmp_oge_float:437; CMOV32R2: # %bb.0: # %entry438; CMOV32R2-NEXT: mov.s $f0, $f14439; CMOV32R2-NEXT: c.ult.s $f12, $f14440; CMOV32R2-NEXT: jr $ra441; CMOV32R2-NEXT: movf.s $f0, $f12, $fcc0442;443; 32R6-LABEL: tst_select_fcmp_oge_float:444; 32R6: # %bb.0: # %entry445; 32R6-NEXT: cmp.le.s $f0, $f14, $f12446; 32R6-NEXT: jr $ra447; 32R6-NEXT: sel.s $f0, $f14, $f12448;449; M3-LABEL: tst_select_fcmp_oge_float:450; M3: # %bb.0: # %entry451; M3-NEXT: c.ult.s $f12, $f13452; M3-NEXT: nop453; M3-NEXT: bc1f .LBB5_2454; M3-NEXT: mov.s $f0, $f12455; M3-NEXT: # %bb.1: # %entry456; M3-NEXT: mov.s $f0, $f13457; M3-NEXT: .LBB5_2: # %entry458; M3-NEXT: jr $ra459; M3-NEXT: nop460;461; CMOV64-LABEL: tst_select_fcmp_oge_float:462; CMOV64: # %bb.0: # %entry463; CMOV64-NEXT: mov.s $f0, $f13464; CMOV64-NEXT: c.ult.s $f12, $f13465; CMOV64-NEXT: jr $ra466; CMOV64-NEXT: movf.s $f0, $f12, $fcc0467;468; 64R6-LABEL: tst_select_fcmp_oge_float:469; 64R6: # %bb.0: # %entry470; 64R6-NEXT: cmp.le.s $f0, $f13, $f12471; 64R6-NEXT: jr $ra472; 64R6-NEXT: sel.s $f0, $f13, $f12473;474; MM32R3-LABEL: tst_select_fcmp_oge_float:475; MM32R3: # %bb.0: # %entry476; MM32R3: mov.s $f0, $f14 # <MCInst #{{.*}} FMOV_S477; MM32R3: c.ult.s $f12, $f14 # <MCInst #{{.*}} FCMP_S32_MM478; MM32R3: jr $ra # <MCInst #{{.*}} JR_MM479; MM32R3: movf.s $f0, $f12, $fcc0 # <MCInst #{{.*}} MOVF_S_MM480;481; MM32R6-LABEL: tst_select_fcmp_oge_float:482; MM32R6: # %bb.0: # %entry483; MM32R6-NEXT: cmp.le.s $f0, $f14, $f12484; MM32R6-NEXT: sel.s $f0, $f14, $f12485; MM32R6-NEXT: jrc $ra486entry:487 %s = fcmp oge float %x, %y488 %r = select i1 %s, float %x, float %y489 ret float %r490}491 492define float @tst_select_fcmp_oeq_float(float %x, float %y) {493; M2-LABEL: tst_select_fcmp_oeq_float:494; M2: # %bb.0: # %entry495; M2-NEXT: c.eq.s $f12, $f14496; M2-NEXT: nop497; M2-NEXT: bc1t $BB6_2498; M2-NEXT: mov.s $f0, $f12499; M2-NEXT: # %bb.1: # %entry500; M2-NEXT: mov.s $f0, $f14501; M2-NEXT: $BB6_2: # %entry502; M2-NEXT: jr $ra503; M2-NEXT: nop504;505; CMOV32R1-LABEL: tst_select_fcmp_oeq_float:506; CMOV32R1: # %bb.0: # %entry507; CMOV32R1-NEXT: mov.s $f0, $f14508; CMOV32R1-NEXT: c.eq.s $f12, $f14509; CMOV32R1-NEXT: jr $ra510; CMOV32R1-NEXT: movt.s $f0, $f12, $fcc0511;512; CMOV32R2-LABEL: tst_select_fcmp_oeq_float:513; CMOV32R2: # %bb.0: # %entry514; CMOV32R2-NEXT: mov.s $f0, $f14515; CMOV32R2-NEXT: c.eq.s $f12, $f14516; CMOV32R2-NEXT: jr $ra517; CMOV32R2-NEXT: movt.s $f0, $f12, $fcc0518;519; 32R6-LABEL: tst_select_fcmp_oeq_float:520; 32R6: # %bb.0: # %entry521; 32R6-NEXT: cmp.eq.s $f0, $f12, $f14522; 32R6-NEXT: jr $ra523; 32R6-NEXT: sel.s $f0, $f14, $f12524;525; M3-LABEL: tst_select_fcmp_oeq_float:526; M3: # %bb.0: # %entry527; M3-NEXT: c.eq.s $f12, $f13528; M3-NEXT: nop529; M3-NEXT: bc1t .LBB6_2530; M3-NEXT: mov.s $f0, $f12531; M3-NEXT: # %bb.1: # %entry532; M3-NEXT: mov.s $f0, $f13533; M3-NEXT: .LBB6_2: # %entry534; M3-NEXT: jr $ra535; M3-NEXT: nop536;537; CMOV64-LABEL: tst_select_fcmp_oeq_float:538; CMOV64: # %bb.0: # %entry539; CMOV64-NEXT: mov.s $f0, $f13540; CMOV64-NEXT: c.eq.s $f12, $f13541; CMOV64-NEXT: jr $ra542; CMOV64-NEXT: movt.s $f0, $f12, $fcc0543;544; 64R6-LABEL: tst_select_fcmp_oeq_float:545; 64R6: # %bb.0: # %entry546; 64R6-NEXT: cmp.eq.s $f0, $f12, $f13547; 64R6-NEXT: jr $ra548; 64R6-NEXT: sel.s $f0, $f13, $f12549;550; MM32R3-LABEL: tst_select_fcmp_oeq_float:551; MM32R3: # %bb.0: # %entry552; MM32R3: mov.s $f0, $f14 # <MCInst #{{.*}} FMOV_S553; MM32R3: c.eq.s $f12, $f14 # <MCInst #{{.*}} FCMP_S32_MM554; MM32R3: jr $ra # <MCInst #{{.*}} JR_MM555; MM32R3: movt.s $f0, $f12, $fcc0 # <MCInst #{{.*}} MOVT_S_MM556;557; MM32R6-LABEL: tst_select_fcmp_oeq_float:558; MM32R6: # %bb.0: # %entry559; MM32R6-NEXT: cmp.eq.s $f0, $f12, $f14560; MM32R6-NEXT: sel.s $f0, $f14, $f12561; MM32R6-NEXT: jrc $ra562entry:563 %s = fcmp oeq float %x, %y564 %r = select i1 %s, float %x, float %y565 ret float %r566}567 568define float @tst_select_fcmp_one_float(float %x, float %y) {569; M2-LABEL: tst_select_fcmp_one_float:570; M2: # %bb.0: # %entry571; M2-NEXT: c.ueq.s $f12, $f14572; M2-NEXT: nop573; M2-NEXT: bc1f $BB7_2574; M2-NEXT: mov.s $f0, $f12575; M2-NEXT: # %bb.1: # %entry576; M2-NEXT: mov.s $f0, $f14577; M2-NEXT: $BB7_2: # %entry578; M2-NEXT: jr $ra579; M2-NEXT: nop580;581; CMOV32R1-LABEL: tst_select_fcmp_one_float:582; CMOV32R1: # %bb.0: # %entry583; CMOV32R1-NEXT: mov.s $f0, $f14584; CMOV32R1-NEXT: c.ueq.s $f12, $f14585; CMOV32R1-NEXT: jr $ra586; CMOV32R1-NEXT: movf.s $f0, $f12, $fcc0587;588; CMOV32R2-LABEL: tst_select_fcmp_one_float:589; CMOV32R2: # %bb.0: # %entry590; CMOV32R2-NEXT: mov.s $f0, $f14591; CMOV32R2-NEXT: c.ueq.s $f12, $f14592; CMOV32R2-NEXT: jr $ra593; CMOV32R2-NEXT: movf.s $f0, $f12, $fcc0594;595; 32R6-LABEL: tst_select_fcmp_one_float:596; 32R6: # %bb.0: # %entry597; 32R6-NEXT: cmp.ueq.s $f0, $f12, $f14598; 32R6-NEXT: mfc1 $1, $f0599; 32R6-NEXT: not $1, $1600; 32R6-NEXT: mtc1 $1, $f0601; 32R6-NEXT: jr $ra602; 32R6-NEXT: sel.s $f0, $f14, $f12603;604; M3-LABEL: tst_select_fcmp_one_float:605; M3: # %bb.0: # %entry606; M3-NEXT: c.ueq.s $f12, $f13607; M3-NEXT: nop608; M3-NEXT: bc1f .LBB7_2609; M3-NEXT: mov.s $f0, $f12610; M3-NEXT: # %bb.1: # %entry611; M3-NEXT: mov.s $f0, $f13612; M3-NEXT: .LBB7_2: # %entry613; M3-NEXT: jr $ra614; M3-NEXT: nop615;616; CMOV64-LABEL: tst_select_fcmp_one_float:617; CMOV64: # %bb.0: # %entry618; CMOV64-NEXT: mov.s $f0, $f13619; CMOV64-NEXT: c.ueq.s $f12, $f13620; CMOV64-NEXT: jr $ra621; CMOV64-NEXT: movf.s $f0, $f12, $fcc0622;623; 64R6-LABEL: tst_select_fcmp_one_float:624; 64R6: # %bb.0: # %entry625; 64R6-NEXT: cmp.ueq.s $f0, $f12, $f13626; 64R6-NEXT: mfc1 $1, $f0627; 64R6-NEXT: not $1, $1628; 64R6-NEXT: mtc1 $1, $f0629; 64R6-NEXT: jr $ra630; 64R6-NEXT: sel.s $f0, $f13, $f12631;632; MM32R3-LABEL: tst_select_fcmp_one_float:633; MM32R3: # %bb.0: # %entry634; MM32R3: mov.s $f0, $f14 # <MCInst #{{.*}} FMOV_S635; MM32R3: c.ueq.s $f12, $f14 # <MCInst #{{.*}} FCMP_S32_MM636; MM32R3: jr $ra # <MCInst #{{.*}} JR_MM637; MM32R3: movf.s $f0, $f12, $fcc0 # <MCInst #{{.*}} MOVF_S_MM638;639; MM32R6-LABEL: tst_select_fcmp_one_float:640; MM32R6: # %bb.0: # %entry641; MM32R6-NEXT: cmp.ueq.s $f0, $f12, $f14642; MM32R6-NEXT: mfc1 $1, $f0643; MM32R6-NEXT: not $1, $1644; MM32R6-NEXT: mtc1 $1, $f0645; MM32R6-NEXT: sel.s $f0, $f14, $f12646; MM32R6-NEXT: jrc $ra647entry:648 %s = fcmp one float %x, %y649 %r = select i1 %s, float %x, float %y650 ret float %r651}652