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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=mips -mcpu=mips2 -relocation-model=pic \3; RUN: -mips-jalr-reloc=false | FileCheck %s -check-prefixes=MIPS24; RUN: llc < %s -mtriple=mips -mcpu=mips32 -relocation-model=pic \5; RUN: -mips-jalr-reloc=false | FileCheck %s -check-prefixes=GP326; RUN: llc < %s -mtriple=mips -mcpu=mips32r2 -relocation-model=pic \7; RUN: -mips-jalr-reloc=false | FileCheck %s -check-prefixes=GP328; RUN: llc < %s -mtriple=mips -mcpu=mips32r3 -relocation-model=pic \9; RUN: -mips-jalr-reloc=false | FileCheck %s -check-prefixes=GP3210; RUN: llc < %s -mtriple=mips -mcpu=mips32r5 -relocation-model=pic \11; RUN: -mips-jalr-reloc=false | FileCheck %s -check-prefixes=GP3212; RUN: llc < %s -mtriple=mips -mcpu=mips32r6 -relocation-model=pic \13; RUN: -mips-jalr-reloc=false | FileCheck %s -check-prefix=GP32R614 15; RUN: llc < %s -mtriple=mips64 -mcpu=mips3 -relocation-model=pic \16; RUN: -mips-jalr-reloc=false | FileCheck %s -check-prefixes=MIPS317; RUN: llc < %s -mtriple=mips64 -mcpu=mips4 -relocation-model=pic \18; RUN: -mips-jalr-reloc=false | FileCheck %s -check-prefixes=MIPS319; RUN: llc < %s -mtriple=mips64 -mcpu=mips64 -relocation-model=pic \20; RUN: -mips-jalr-reloc=false | FileCheck %s -check-prefixes=GP6421; RUN: llc < %s -mtriple=mips64 -mcpu=mips64r2 -relocation-model=pic \22; RUN: -mips-jalr-reloc=false | FileCheck %s -check-prefixes=GP6423; RUN: llc < %s -mtriple=mips64 -mcpu=mips64r3 -relocation-model=pic \24; RUN: -mips-jalr-reloc=false | FileCheck %s -check-prefixes=GP6425; RUN: llc < %s -mtriple=mips64 -mcpu=mips64r5 -relocation-model=pic \26; RUN: -mips-jalr-reloc=false | FileCheck %s -check-prefixes=GP6427; RUN: llc < %s -mtriple=mips64 -mcpu=mips64r6 -relocation-model=pic \28; RUN: -mips-jalr-reloc=false | FileCheck %s -check-prefix=GP64R629 30; RUN: llc < %s -mtriple=mips -mcpu=mips32r3 -mattr=+micromips \31; RUN: -relocation-model=pic -mips-jalr-reloc=false | \32; RUN: FileCheck %s -check-prefix=MMR333; RUN: llc < %s -mtriple=mips -mcpu=mips32r6 -mattr=+micromips \34; RUN: -relocation-model=pic -mips-jalr-reloc=false | \35; RUN: FileCheck %s -check-prefix=MMR636 37define signext i1 @srem_i1(i1 signext %a, i1 signext %b) {38; MIPS2-LABEL: srem_i1:39; MIPS2: # %bb.0: # %entry40; MIPS2-NEXT: jr $ra41; MIPS2-NEXT: addiu $2, $zero, 042;43; GP32-LABEL: srem_i1:44; GP32: # %bb.0: # %entry45; GP32-NEXT: jr $ra46; GP32-NEXT: addiu $2, $zero, 047;48; GP32R6-LABEL: srem_i1:49; GP32R6: # %bb.0: # %entry50; GP32R6-NEXT: jr $ra51; GP32R6-NEXT: addiu $2, $zero, 052;53; MIPS3-LABEL: srem_i1:54; MIPS3: # %bb.0: # %entry55; MIPS3-NEXT: jr $ra56; MIPS3-NEXT: addiu $2, $zero, 057;58; GP64-LABEL: srem_i1:59; GP64: # %bb.0: # %entry60; GP64-NEXT: jr $ra61; GP64-NEXT: addiu $2, $zero, 062;63; GP64R6-LABEL: srem_i1:64; GP64R6: # %bb.0: # %entry65; GP64R6-NEXT: jr $ra66; GP64R6-NEXT: addiu $2, $zero, 067;68; MMR3-LABEL: srem_i1:69; MMR3: # %bb.0: # %entry70; MMR3-NEXT: li16 $2, 071; MMR3-NEXT: jrc $ra72;73; MMR6-LABEL: srem_i1:74; MMR6: # %bb.0: # %entry75; MMR6-NEXT: li16 $2, 076; MMR6-NEXT: jrc $ra77entry:78 %r = srem i1 %a, %b79 ret i1 %r80}81 82define signext i8 @srem_i8(i8 signext %a, i8 signext %b) {83; MIPS2-LABEL: srem_i8:84; MIPS2: # %bb.0: # %entry85; MIPS2-NEXT: div $zero, $4, $586; MIPS2-NEXT: teq $5, $zero, 787; MIPS2-NEXT: mfhi $288; MIPS2-NEXT: jr $ra89; MIPS2-NEXT: nop90;91; GP32-LABEL: srem_i8:92; GP32: # %bb.0: # %entry93; GP32-NEXT: div $zero, $4, $594; GP32-NEXT: teq $5, $zero, 795; GP32-NEXT: jr $ra96; GP32-NEXT: mfhi $297;98; GP32R6-LABEL: srem_i8:99; GP32R6: # %bb.0: # %entry100; GP32R6-NEXT: mod $2, $4, $5101; GP32R6-NEXT: teq $5, $zero, 7102; GP32R6-NEXT: jrc $ra103;104; MIPS3-LABEL: srem_i8:105; MIPS3: # %bb.0: # %entry106; MIPS3-NEXT: div $zero, $4, $5107; MIPS3-NEXT: teq $5, $zero, 7108; MIPS3-NEXT: mfhi $2109; MIPS3-NEXT: jr $ra110; MIPS3-NEXT: nop111;112; GP64-LABEL: srem_i8:113; GP64: # %bb.0: # %entry114; GP64-NEXT: div $zero, $4, $5115; GP64-NEXT: teq $5, $zero, 7116; GP64-NEXT: jr $ra117; GP64-NEXT: mfhi $2118;119; GP64R6-LABEL: srem_i8:120; GP64R6: # %bb.0: # %entry121; GP64R6-NEXT: mod $2, $4, $5122; GP64R6-NEXT: teq $5, $zero, 7123; GP64R6-NEXT: jrc $ra124;125; MMR3-LABEL: srem_i8:126; MMR3: # %bb.0: # %entry127; MMR3-NEXT: div $zero, $4, $5128; MMR3-NEXT: teq $5, $zero, 7129; MMR3-NEXT: mfhi16 $2130; MMR3-NEXT: jrc $ra131;132; MMR6-LABEL: srem_i8:133; MMR6: # %bb.0: # %entry134; MMR6-NEXT: mod $2, $4, $5135; MMR6-NEXT: teq $5, $zero, 7136; MMR6-NEXT: jrc $ra137entry:138 %r = srem i8 %a, %b139 ret i8 %r140}141 142define signext i16 @srem_i16(i16 signext %a, i16 signext %b) {143; MIPS2-LABEL: srem_i16:144; MIPS2: # %bb.0: # %entry145; MIPS2-NEXT: div $zero, $4, $5146; MIPS2-NEXT: teq $5, $zero, 7147; MIPS2-NEXT: mfhi $2148; MIPS2-NEXT: jr $ra149; MIPS2-NEXT: nop150;151; GP32-LABEL: srem_i16:152; GP32: # %bb.0: # %entry153; GP32-NEXT: div $zero, $4, $5154; GP32-NEXT: teq $5, $zero, 7155; GP32-NEXT: jr $ra156; GP32-NEXT: mfhi $2157;158; GP32R6-LABEL: srem_i16:159; GP32R6: # %bb.0: # %entry160; GP32R6-NEXT: mod $2, $4, $5161; GP32R6-NEXT: teq $5, $zero, 7162; GP32R6-NEXT: jrc $ra163;164; MIPS3-LABEL: srem_i16:165; MIPS3: # %bb.0: # %entry166; MIPS3-NEXT: div $zero, $4, $5167; MIPS3-NEXT: teq $5, $zero, 7168; MIPS3-NEXT: mfhi $2169; MIPS3-NEXT: jr $ra170; MIPS3-NEXT: nop171;172; GP64-LABEL: srem_i16:173; GP64: # %bb.0: # %entry174; GP64-NEXT: div $zero, $4, $5175; GP64-NEXT: teq $5, $zero, 7176; GP64-NEXT: jr $ra177; GP64-NEXT: mfhi $2178;179; GP64R6-LABEL: srem_i16:180; GP64R6: # %bb.0: # %entry181; GP64R6-NEXT: mod $2, $4, $5182; GP64R6-NEXT: teq $5, $zero, 7183; GP64R6-NEXT: jrc $ra184;185; MMR3-LABEL: srem_i16:186; MMR3: # %bb.0: # %entry187; MMR3-NEXT: div $zero, $4, $5188; MMR3-NEXT: teq $5, $zero, 7189; MMR3-NEXT: mfhi16 $2190; MMR3-NEXT: jrc $ra191;192; MMR6-LABEL: srem_i16:193; MMR6: # %bb.0: # %entry194; MMR6-NEXT: mod $2, $4, $5195; MMR6-NEXT: teq $5, $zero, 7196; MMR6-NEXT: jrc $ra197entry:198 %r = srem i16 %a, %b199 ret i16 %r200}201 202define signext i32 @srem_i32(i32 signext %a, i32 signext %b) {203; MIPS2-LABEL: srem_i32:204; MIPS2: # %bb.0: # %entry205; MIPS2-NEXT: div $zero, $4, $5206; MIPS2-NEXT: teq $5, $zero, 7207; MIPS2-NEXT: mfhi $2208; MIPS2-NEXT: jr $ra209; MIPS2-NEXT: nop210;211; GP32-LABEL: srem_i32:212; GP32: # %bb.0: # %entry213; GP32-NEXT: div $zero, $4, $5214; GP32-NEXT: teq $5, $zero, 7215; GP32-NEXT: jr $ra216; GP32-NEXT: mfhi $2217;218; GP32R6-LABEL: srem_i32:219; GP32R6: # %bb.0: # %entry220; GP32R6-NEXT: mod $2, $4, $5221; GP32R6-NEXT: teq $5, $zero, 7222; GP32R6-NEXT: jrc $ra223;224; MIPS3-LABEL: srem_i32:225; MIPS3: # %bb.0: # %entry226; MIPS3-NEXT: div $zero, $4, $5227; MIPS3-NEXT: teq $5, $zero, 7228; MIPS3-NEXT: mfhi $2229; MIPS3-NEXT: jr $ra230; MIPS3-NEXT: nop231;232; GP64-LABEL: srem_i32:233; GP64: # %bb.0: # %entry234; GP64-NEXT: div $zero, $4, $5235; GP64-NEXT: teq $5, $zero, 7236; GP64-NEXT: jr $ra237; GP64-NEXT: mfhi $2238;239; GP64R6-LABEL: srem_i32:240; GP64R6: # %bb.0: # %entry241; GP64R6-NEXT: mod $2, $4, $5242; GP64R6-NEXT: teq $5, $zero, 7243; GP64R6-NEXT: jrc $ra244;245; MMR3-LABEL: srem_i32:246; MMR3: # %bb.0: # %entry247; MMR3-NEXT: div $zero, $4, $5248; MMR3-NEXT: teq $5, $zero, 7249; MMR3-NEXT: mfhi16 $2250; MMR3-NEXT: jrc $ra251;252; MMR6-LABEL: srem_i32:253; MMR6: # %bb.0: # %entry254; MMR6-NEXT: mod $2, $4, $5255; MMR6-NEXT: teq $5, $zero, 7256; MMR6-NEXT: jrc $ra257entry:258 %r = srem i32 %a, %b259 ret i32 %r260}261 262define signext i64 @srem_i64(i64 signext %a, i64 signext %b) {263; MIPS2-LABEL: srem_i64:264; MIPS2: # %bb.0: # %entry265; MIPS2-NEXT: lui $2, %hi(_gp_disp)266; MIPS2-NEXT: addiu $2, $2, %lo(_gp_disp)267; MIPS2-NEXT: addiu $sp, $sp, -24268; MIPS2-NEXT: .cfi_def_cfa_offset 24269; MIPS2-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill270; MIPS2-NEXT: .cfi_offset 31, -4271; MIPS2-NEXT: addu $gp, $2, $25272; MIPS2-NEXT: lw $25, %call16(__moddi3)($gp)273; MIPS2-NEXT: jalr $25274; MIPS2-NEXT: nop275; MIPS2-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload276; MIPS2-NEXT: jr $ra277; MIPS2-NEXT: addiu $sp, $sp, 24278;279; GP32-LABEL: srem_i64:280; GP32: # %bb.0: # %entry281; GP32-NEXT: lui $2, %hi(_gp_disp)282; GP32-NEXT: addiu $2, $2, %lo(_gp_disp)283; GP32-NEXT: addiu $sp, $sp, -24284; GP32-NEXT: .cfi_def_cfa_offset 24285; GP32-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill286; GP32-NEXT: .cfi_offset 31, -4287; GP32-NEXT: addu $gp, $2, $25288; GP32-NEXT: lw $25, %call16(__moddi3)($gp)289; GP32-NEXT: jalr $25290; GP32-NEXT: nop291; GP32-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload292; GP32-NEXT: jr $ra293; GP32-NEXT: addiu $sp, $sp, 24294;295; GP32R6-LABEL: srem_i64:296; GP32R6: # %bb.0: # %entry297; GP32R6-NEXT: lui $2, %hi(_gp_disp)298; GP32R6-NEXT: addiu $2, $2, %lo(_gp_disp)299; GP32R6-NEXT: addiu $sp, $sp, -24300; GP32R6-NEXT: .cfi_def_cfa_offset 24301; GP32R6-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill302; GP32R6-NEXT: .cfi_offset 31, -4303; GP32R6-NEXT: addu $gp, $2, $25304; GP32R6-NEXT: lw $25, %call16(__moddi3)($gp)305; GP32R6-NEXT: jalrc $25306; GP32R6-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload307; GP32R6-NEXT: jr $ra308; GP32R6-NEXT: addiu $sp, $sp, 24309;310; MIPS3-LABEL: srem_i64:311; MIPS3: # %bb.0: # %entry312; MIPS3-NEXT: ddiv $zero, $4, $5313; MIPS3-NEXT: teq $5, $zero, 7314; MIPS3-NEXT: mfhi $2315; MIPS3-NEXT: jr $ra316; MIPS3-NEXT: nop317;318; GP64-LABEL: srem_i64:319; GP64: # %bb.0: # %entry320; GP64-NEXT: ddiv $zero, $4, $5321; GP64-NEXT: teq $5, $zero, 7322; GP64-NEXT: jr $ra323; GP64-NEXT: mfhi $2324;325; GP64R6-LABEL: srem_i64:326; GP64R6: # %bb.0: # %entry327; GP64R6-NEXT: dmod $2, $4, $5328; GP64R6-NEXT: teq $5, $zero, 7329; GP64R6-NEXT: jrc $ra330;331; MMR3-LABEL: srem_i64:332; MMR3: # %bb.0: # %entry333; MMR3-NEXT: lui $2, %hi(_gp_disp)334; MMR3-NEXT: addiu $2, $2, %lo(_gp_disp)335; MMR3-NEXT: addiusp -24336; MMR3-NEXT: .cfi_def_cfa_offset 24337; MMR3-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill338; MMR3-NEXT: .cfi_offset 31, -4339; MMR3-NEXT: addu $gp, $2, $25340; MMR3-NEXT: lw $25, %call16(__moddi3)($gp)341; MMR3-NEXT: jalr $25342; MMR3-NEXT: nop343; MMR3-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload344; MMR3-NEXT: addiusp 24345; MMR3-NEXT: jrc $ra346;347; MMR6-LABEL: srem_i64:348; MMR6: # %bb.0: # %entry349; MMR6-NEXT: lui $2, %hi(_gp_disp)350; MMR6-NEXT: addiu $2, $2, %lo(_gp_disp)351; MMR6-NEXT: addiu $sp, $sp, -24352; MMR6-NEXT: .cfi_def_cfa_offset 24353; MMR6-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill354; MMR6-NEXT: .cfi_offset 31, -4355; MMR6-NEXT: addu $gp, $2, $25356; MMR6-NEXT: lw $25, %call16(__moddi3)($gp)357; MMR6-NEXT: jalr $25358; MMR6-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload359; MMR6-NEXT: addiu $sp, $sp, 24360; MMR6-NEXT: jrc $ra361entry:362 %r = srem i64 %a, %b363 ret i64 %r364}365 366define signext i128 @srem_i128(i128 signext %a, i128 signext %b) {367; MIPS2-LABEL: srem_i128:368; MIPS2: # %bb.0: # %entry369; MIPS2-NEXT: lui $2, %hi(_gp_disp)370; MIPS2-NEXT: addiu $2, $2, %lo(_gp_disp)371; MIPS2-NEXT: addiu $sp, $sp, -40372; MIPS2-NEXT: .cfi_def_cfa_offset 40373; MIPS2-NEXT: sw $ra, 36($sp) # 4-byte Folded Spill374; MIPS2-NEXT: .cfi_offset 31, -4375; MIPS2-NEXT: addu $gp, $2, $25376; MIPS2-NEXT: lw $1, 60($sp)377; MIPS2-NEXT: lw $2, 64($sp)378; MIPS2-NEXT: lw $3, 68($sp)379; MIPS2-NEXT: sw $3, 28($sp)380; MIPS2-NEXT: sw $2, 24($sp)381; MIPS2-NEXT: sw $1, 20($sp)382; MIPS2-NEXT: lw $1, 56($sp)383; MIPS2-NEXT: sw $1, 16($sp)384; MIPS2-NEXT: lw $25, %call16(__modti3)($gp)385; MIPS2-NEXT: jalr $25386; MIPS2-NEXT: nop387; MIPS2-NEXT: lw $ra, 36($sp) # 4-byte Folded Reload388; MIPS2-NEXT: jr $ra389; MIPS2-NEXT: addiu $sp, $sp, 40390;391; GP32-LABEL: srem_i128:392; GP32: # %bb.0: # %entry393; GP32-NEXT: lui $2, %hi(_gp_disp)394; GP32-NEXT: addiu $2, $2, %lo(_gp_disp)395; GP32-NEXT: addiu $sp, $sp, -40396; GP32-NEXT: .cfi_def_cfa_offset 40397; GP32-NEXT: sw $ra, 36($sp) # 4-byte Folded Spill398; GP32-NEXT: .cfi_offset 31, -4399; GP32-NEXT: addu $gp, $2, $25400; GP32-NEXT: lw $1, 60($sp)401; GP32-NEXT: lw $2, 64($sp)402; GP32-NEXT: lw $3, 68($sp)403; GP32-NEXT: sw $3, 28($sp)404; GP32-NEXT: sw $2, 24($sp)405; GP32-NEXT: sw $1, 20($sp)406; GP32-NEXT: lw $1, 56($sp)407; GP32-NEXT: sw $1, 16($sp)408; GP32-NEXT: lw $25, %call16(__modti3)($gp)409; GP32-NEXT: jalr $25410; GP32-NEXT: nop411; GP32-NEXT: lw $ra, 36($sp) # 4-byte Folded Reload412; GP32-NEXT: jr $ra413; GP32-NEXT: addiu $sp, $sp, 40414;415; GP32R6-LABEL: srem_i128:416; GP32R6: # %bb.0: # %entry417; GP32R6-NEXT: lui $2, %hi(_gp_disp)418; GP32R6-NEXT: addiu $2, $2, %lo(_gp_disp)419; GP32R6-NEXT: addiu $sp, $sp, -40420; GP32R6-NEXT: .cfi_def_cfa_offset 40421; GP32R6-NEXT: sw $ra, 36($sp) # 4-byte Folded Spill422; GP32R6-NEXT: .cfi_offset 31, -4423; GP32R6-NEXT: addu $gp, $2, $25424; GP32R6-NEXT: lw $1, 60($sp)425; GP32R6-NEXT: lw $2, 64($sp)426; GP32R6-NEXT: lw $3, 68($sp)427; GP32R6-NEXT: sw $3, 28($sp)428; GP32R6-NEXT: sw $2, 24($sp)429; GP32R6-NEXT: sw $1, 20($sp)430; GP32R6-NEXT: lw $1, 56($sp)431; GP32R6-NEXT: sw $1, 16($sp)432; GP32R6-NEXT: lw $25, %call16(__modti3)($gp)433; GP32R6-NEXT: jalrc $25434; GP32R6-NEXT: lw $ra, 36($sp) # 4-byte Folded Reload435; GP32R6-NEXT: jr $ra436; GP32R6-NEXT: addiu $sp, $sp, 40437;438; MIPS3-LABEL: srem_i128:439; MIPS3: # %bb.0: # %entry440; MIPS3-NEXT: daddiu $sp, $sp, -16441; MIPS3-NEXT: .cfi_def_cfa_offset 16442; MIPS3-NEXT: sd $ra, 8($sp) # 8-byte Folded Spill443; MIPS3-NEXT: sd $gp, 0($sp) # 8-byte Folded Spill444; MIPS3-NEXT: .cfi_offset 31, -8445; MIPS3-NEXT: .cfi_offset 28, -16446; MIPS3-NEXT: lui $1, %hi(%neg(%gp_rel(srem_i128)))447; MIPS3-NEXT: daddu $1, $1, $25448; MIPS3-NEXT: daddiu $gp, $1, %lo(%neg(%gp_rel(srem_i128)))449; MIPS3-NEXT: ld $25, %call16(__modti3)($gp)450; MIPS3-NEXT: jalr $25451; MIPS3-NEXT: nop452; MIPS3-NEXT: ld $gp, 0($sp) # 8-byte Folded Reload453; MIPS3-NEXT: ld $ra, 8($sp) # 8-byte Folded Reload454; MIPS3-NEXT: jr $ra455; MIPS3-NEXT: daddiu $sp, $sp, 16456;457; GP64-LABEL: srem_i128:458; GP64: # %bb.0: # %entry459; GP64-NEXT: daddiu $sp, $sp, -16460; GP64-NEXT: .cfi_def_cfa_offset 16461; GP64-NEXT: sd $ra, 8($sp) # 8-byte Folded Spill462; GP64-NEXT: sd $gp, 0($sp) # 8-byte Folded Spill463; GP64-NEXT: .cfi_offset 31, -8464; GP64-NEXT: .cfi_offset 28, -16465; GP64-NEXT: lui $1, %hi(%neg(%gp_rel(srem_i128)))466; GP64-NEXT: daddu $1, $1, $25467; GP64-NEXT: daddiu $gp, $1, %lo(%neg(%gp_rel(srem_i128)))468; GP64-NEXT: ld $25, %call16(__modti3)($gp)469; GP64-NEXT: jalr $25470; GP64-NEXT: nop471; GP64-NEXT: ld $gp, 0($sp) # 8-byte Folded Reload472; GP64-NEXT: ld $ra, 8($sp) # 8-byte Folded Reload473; GP64-NEXT: jr $ra474; GP64-NEXT: daddiu $sp, $sp, 16475;476; GP64R6-LABEL: srem_i128:477; GP64R6: # %bb.0: # %entry478; GP64R6-NEXT: daddiu $sp, $sp, -16479; GP64R6-NEXT: .cfi_def_cfa_offset 16480; GP64R6-NEXT: sd $ra, 8($sp) # 8-byte Folded Spill481; GP64R6-NEXT: sd $gp, 0($sp) # 8-byte Folded Spill482; GP64R6-NEXT: .cfi_offset 31, -8483; GP64R6-NEXT: .cfi_offset 28, -16484; GP64R6-NEXT: lui $1, %hi(%neg(%gp_rel(srem_i128)))485; GP64R6-NEXT: daddu $1, $1, $25486; GP64R6-NEXT: daddiu $gp, $1, %lo(%neg(%gp_rel(srem_i128)))487; GP64R6-NEXT: ld $25, %call16(__modti3)($gp)488; GP64R6-NEXT: jalrc $25489; GP64R6-NEXT: ld $gp, 0($sp) # 8-byte Folded Reload490; GP64R6-NEXT: ld $ra, 8($sp) # 8-byte Folded Reload491; GP64R6-NEXT: jr $ra492; GP64R6-NEXT: daddiu $sp, $sp, 16493;494; MMR3-LABEL: srem_i128:495; MMR3: # %bb.0: # %entry496; MMR3-NEXT: lui $2, %hi(_gp_disp)497; MMR3-NEXT: addiu $2, $2, %lo(_gp_disp)498; MMR3-NEXT: addiusp -40499; MMR3-NEXT: .cfi_def_cfa_offset 40500; MMR3-NEXT: sw $ra, 36($sp) # 4-byte Folded Spill501; MMR3-NEXT: sw $17, 32($sp) # 4-byte Folded Spill502; MMR3-NEXT: .cfi_offset 31, -4503; MMR3-NEXT: .cfi_offset 17, -8504; MMR3-NEXT: addu $gp, $2, $25505; MMR3-NEXT: move $1, $7506; MMR3-NEXT: lw $7, 60($sp)507; MMR3-NEXT: lw $17, 64($sp)508; MMR3-NEXT: lw $3, 68($sp)509; MMR3-NEXT: move $2, $sp510; MMR3-NEXT: sw16 $3, 28($2)511; MMR3-NEXT: sw16 $17, 24($2)512; MMR3-NEXT: sw16 $7, 20($2)513; MMR3-NEXT: lw $3, 56($sp)514; MMR3-NEXT: sw16 $3, 16($2)515; MMR3-NEXT: lw $25, %call16(__modti3)($gp)516; MMR3-NEXT: move $7, $1517; MMR3-NEXT: jalr $25518; MMR3-NEXT: nop519; MMR3-NEXT: lw $17, 32($sp) # 4-byte Folded Reload520; MMR3-NEXT: lw $ra, 36($sp) # 4-byte Folded Reload521; MMR3-NEXT: addiusp 40522; MMR3-NEXT: jrc $ra523;524; MMR6-LABEL: srem_i128:525; MMR6: # %bb.0: # %entry526; MMR6-NEXT: lui $2, %hi(_gp_disp)527; MMR6-NEXT: addiu $2, $2, %lo(_gp_disp)528; MMR6-NEXT: addiu $sp, $sp, -40529; MMR6-NEXT: .cfi_def_cfa_offset 40530; MMR6-NEXT: sw $ra, 36($sp) # 4-byte Folded Spill531; MMR6-NEXT: sw $17, 32($sp) # 4-byte Folded Spill532; MMR6-NEXT: .cfi_offset 31, -4533; MMR6-NEXT: .cfi_offset 17, -8534; MMR6-NEXT: addu $gp, $2, $25535; MMR6-NEXT: move $1, $7536; MMR6-NEXT: lw $7, 60($sp)537; MMR6-NEXT: lw $17, 64($sp)538; MMR6-NEXT: lw $3, 68($sp)539; MMR6-NEXT: move $2, $sp540; MMR6-NEXT: sw16 $3, 28($2)541; MMR6-NEXT: sw16 $17, 24($2)542; MMR6-NEXT: sw16 $7, 20($2)543; MMR6-NEXT: lw $3, 56($sp)544; MMR6-NEXT: sw16 $3, 16($2)545; MMR6-NEXT: lw $25, %call16(__modti3)($gp)546; MMR6-NEXT: move $7, $1547; MMR6-NEXT: jalr $25548; MMR6-NEXT: lw $17, 32($sp) # 4-byte Folded Reload549; MMR6-NEXT: lw $ra, 36($sp) # 4-byte Folded Reload550; MMR6-NEXT: addiu $sp, $sp, 40551; MMR6-NEXT: jrc $ra552entry:553 %r = srem i128 %a, %b554 ret i128 %r555}556