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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=mips -mcpu=mips2 -relocation-model=pic \3; RUN: -mips-jalr-reloc=false | FileCheck %s -check-prefixes=MIPS24; RUN: llc < %s -mtriple=mips -mcpu=mips32 -relocation-model=pic \5; RUN: -mips-jalr-reloc=false | FileCheck %s -check-prefixes=GP32,GP32R0R26; RUN: llc < %s -mtriple=mips -mcpu=mips32r2 -relocation-model=pic \7; RUN: -mips-jalr-reloc=false | FileCheck %s -check-prefixes=GP32,GP32R2R58; RUN: llc < %s -mtriple=mips -mcpu=mips32r3 -relocation-model=pic \9; RUN: -mips-jalr-reloc=false | FileCheck %s -check-prefixes=GP32,GP32R2R510; RUN: llc < %s -mtriple=mips -mcpu=mips32r5 -relocation-model=pic \11; RUN: -mips-jalr-reloc=false | FileCheck %s -check-prefixes=GP32,GP32R2R512; RUN: llc < %s -mtriple=mips -mcpu=mips32r6 -relocation-model=pic \13; RUN: -mips-jalr-reloc=false | FileCheck %s -check-prefix=GP32R614 15; RUN: llc < %s -mtriple=mips64 -mcpu=mips3 -relocation-model=pic \16; RUN: -mips-jalr-reloc=false | FileCheck %s -check-prefixes=MIPS317; RUN: llc < %s -mtriple=mips64 -mcpu=mips4 -relocation-model=pic \18; RUN: -mips-jalr-reloc=false | FileCheck %s -check-prefixes=MIPS319; RUN: llc < %s -mtriple=mips64 -mcpu=mips64 -relocation-model=pic \20; RUN: -mips-jalr-reloc=false | FileCheck %s -check-prefixes=GP64,GP64R0R121; RUN: llc < %s -mtriple=mips64 -mcpu=mips64r2 -relocation-model=pic \22; RUN: -mips-jalr-reloc=false | FileCheck %s -check-prefixes=GP64,GP64R2R523; RUN: llc < %s -mtriple=mips64 -mcpu=mips64r3 -relocation-model=pic \24; RUN: -mips-jalr-reloc=false | FileCheck %s -check-prefixes=GP64,GP64R2R525; RUN: llc < %s -mtriple=mips64 -mcpu=mips64r5 -relocation-model=pic \26; RUN: -mips-jalr-reloc=false | FileCheck %s -check-prefixes=GP64,GP64R2R527; RUN: llc < %s -mtriple=mips64 -mcpu=mips64r6 -relocation-model=pic \28; RUN: -mips-jalr-reloc=false | FileCheck %s -check-prefix=GP64R629 30; RUN: llc < %s -mtriple=mips -mcpu=mips32r3 -mattr=+micromips \31; RUN: -relocation-model=pic -mips-jalr-reloc=false | \32; RUN: FileCheck %s -check-prefix=MMR333; RUN: llc < %s -mtriple=mips -mcpu=mips32r6 -mattr=+micromips \34; RUN: -relocation-model=pic -mips-jalr-reloc=false | \35; RUN: FileCheck %s -check-prefix=MMR636 37define signext i1 @urem_i1(i1 signext %a, i1 signext %b) {38; MIPS2-LABEL: urem_i1:39; MIPS2: # %bb.0: # %entry40; MIPS2-NEXT: jr $ra41; MIPS2-NEXT: addiu $2, $zero, 042;43; GP32-LABEL: urem_i1:44; GP32: # %bb.0: # %entry45; GP32-NEXT: jr $ra46; GP32-NEXT: addiu $2, $zero, 047;48; GP32R6-LABEL: urem_i1:49; GP32R6: # %bb.0: # %entry50; GP32R6-NEXT: jr $ra51; GP32R6-NEXT: addiu $2, $zero, 052;53; MIPS3-LABEL: urem_i1:54; MIPS3: # %bb.0: # %entry55; MIPS3-NEXT: jr $ra56; MIPS3-NEXT: addiu $2, $zero, 057;58; GP64-LABEL: urem_i1:59; GP64: # %bb.0: # %entry60; GP64-NEXT: jr $ra61; GP64-NEXT: addiu $2, $zero, 062;63; GP64R6-LABEL: urem_i1:64; GP64R6: # %bb.0: # %entry65; GP64R6-NEXT: jr $ra66; GP64R6-NEXT: addiu $2, $zero, 067;68; MMR3-LABEL: urem_i1:69; MMR3: # %bb.0: # %entry70; MMR3-NEXT: li16 $2, 071; MMR3-NEXT: jrc $ra72;73; MMR6-LABEL: urem_i1:74; MMR6: # %bb.0: # %entry75; MMR6-NEXT: li16 $2, 076; MMR6-NEXT: jrc $ra77entry:78 %r = urem i1 %a, %b79 ret i1 %r80}81 82define signext i8 @urem_i8(i8 signext %a, i8 signext %b) {83; MIPS2-LABEL: urem_i8:84; MIPS2: # %bb.0: # %entry85; MIPS2-NEXT: andi $1, $5, 25586; MIPS2-NEXT: andi $2, $4, 25587; MIPS2-NEXT: divu $zero, $2, $188; MIPS2-NEXT: teq $1, $zero, 789; MIPS2-NEXT: mfhi $190; MIPS2-NEXT: sll $1, $1, 2491; MIPS2-NEXT: jr $ra92; MIPS2-NEXT: sra $2, $1, 2493;94; GP32R0R2-LABEL: urem_i8:95; GP32R0R2: # %bb.0: # %entry96; GP32R0R2-NEXT: andi $1, $5, 25597; GP32R0R2-NEXT: andi $2, $4, 25598; GP32R0R2-NEXT: divu $zero, $2, $199; GP32R0R2-NEXT: teq $1, $zero, 7100; GP32R0R2-NEXT: mfhi $1101; GP32R0R2-NEXT: sll $1, $1, 24102; GP32R0R2-NEXT: jr $ra103; GP32R0R2-NEXT: sra $2, $1, 24104;105; GP32R2R5-LABEL: urem_i8:106; GP32R2R5: # %bb.0: # %entry107; GP32R2R5-NEXT: andi $1, $5, 255108; GP32R2R5-NEXT: andi $2, $4, 255109; GP32R2R5-NEXT: divu $zero, $2, $1110; GP32R2R5-NEXT: teq $1, $zero, 7111; GP32R2R5-NEXT: mfhi $1112; GP32R2R5-NEXT: jr $ra113; GP32R2R5-NEXT: seb $2, $1114;115; GP32R6-LABEL: urem_i8:116; GP32R6: # %bb.0: # %entry117; GP32R6-NEXT: andi $1, $5, 255118; GP32R6-NEXT: andi $2, $4, 255119; GP32R6-NEXT: modu $2, $2, $1120; GP32R6-NEXT: teq $1, $zero, 7121; GP32R6-NEXT: jr $ra122; GP32R6-NEXT: seb $2, $2123;124; MIPS3-LABEL: urem_i8:125; MIPS3: # %bb.0: # %entry126; MIPS3-NEXT: andi $1, $5, 255127; MIPS3-NEXT: andi $2, $4, 255128; MIPS3-NEXT: divu $zero, $2, $1129; MIPS3-NEXT: teq $1, $zero, 7130; MIPS3-NEXT: mfhi $1131; MIPS3-NEXT: sll $1, $1, 24132; MIPS3-NEXT: jr $ra133; MIPS3-NEXT: sra $2, $1, 24134;135; GP64R0R1-LABEL: urem_i8:136; GP64R0R1: # %bb.0: # %entry137; GP64R0R1-NEXT: andi $1, $5, 255138; GP64R0R1-NEXT: andi $2, $4, 255139; GP64R0R1-NEXT: divu $zero, $2, $1140; GP64R0R1-NEXT: teq $1, $zero, 7141; GP64R0R1-NEXT: mfhi $1142; GP64R0R1-NEXT: sll $1, $1, 24143; GP64R0R1-NEXT: jr $ra144; GP64R0R1-NEXT: sra $2, $1, 24145;146; GP64R2R5-LABEL: urem_i8:147; GP64R2R5: # %bb.0: # %entry148; GP64R2R5-NEXT: andi $1, $5, 255149; GP64R2R5-NEXT: andi $2, $4, 255150; GP64R2R5-NEXT: divu $zero, $2, $1151; GP64R2R5-NEXT: teq $1, $zero, 7152; GP64R2R5-NEXT: mfhi $1153; GP64R2R5-NEXT: jr $ra154; GP64R2R5-NEXT: seb $2, $1155;156; GP64R6-LABEL: urem_i8:157; GP64R6: # %bb.0: # %entry158; GP64R6-NEXT: andi $1, $5, 255159; GP64R6-NEXT: andi $2, $4, 255160; GP64R6-NEXT: modu $2, $2, $1161; GP64R6-NEXT: teq $1, $zero, 7162; GP64R6-NEXT: jr $ra163; GP64R6-NEXT: seb $2, $2164;165; MMR3-LABEL: urem_i8:166; MMR3: # %bb.0: # %entry167; MMR3-NEXT: andi16 $2, $5, 255168; MMR3-NEXT: andi16 $3, $4, 255169; MMR3-NEXT: divu $zero, $3, $2170; MMR3-NEXT: teq $2, $zero, 7171; MMR3-NEXT: mfhi16 $1172; MMR3-NEXT: jr $ra173; MMR3-NEXT: seb $2, $1174;175; MMR6-LABEL: urem_i8:176; MMR6: # %bb.0: # %entry177; MMR6-NEXT: andi16 $2, $5, 255178; MMR6-NEXT: andi16 $3, $4, 255179; MMR6-NEXT: modu $1, $3, $2180; MMR6-NEXT: teq $2, $zero, 7181; MMR6-NEXT: seb $2, $1182; MMR6-NEXT: jrc $ra183entry:184 %r = urem i8 %a, %b185 ret i8 %r186}187 188define signext i16 @urem_i16(i16 signext %a, i16 signext %b) {189; MIPS2-LABEL: urem_i16:190; MIPS2: # %bb.0: # %entry191; MIPS2-NEXT: andi $1, $5, 65535192; MIPS2-NEXT: andi $2, $4, 65535193; MIPS2-NEXT: divu $zero, $2, $1194; MIPS2-NEXT: teq $1, $zero, 7195; MIPS2-NEXT: mfhi $1196; MIPS2-NEXT: sll $1, $1, 16197; MIPS2-NEXT: jr $ra198; MIPS2-NEXT: sra $2, $1, 16199;200; GP32R0R2-LABEL: urem_i16:201; GP32R0R2: # %bb.0: # %entry202; GP32R0R2-NEXT: andi $1, $5, 65535203; GP32R0R2-NEXT: andi $2, $4, 65535204; GP32R0R2-NEXT: divu $zero, $2, $1205; GP32R0R2-NEXT: teq $1, $zero, 7206; GP32R0R2-NEXT: mfhi $1207; GP32R0R2-NEXT: sll $1, $1, 16208; GP32R0R2-NEXT: jr $ra209; GP32R0R2-NEXT: sra $2, $1, 16210;211; GP32R2R5-LABEL: urem_i16:212; GP32R2R5: # %bb.0: # %entry213; GP32R2R5-NEXT: andi $1, $5, 65535214; GP32R2R5-NEXT: andi $2, $4, 65535215; GP32R2R5-NEXT: divu $zero, $2, $1216; GP32R2R5-NEXT: teq $1, $zero, 7217; GP32R2R5-NEXT: mfhi $1218; GP32R2R5-NEXT: jr $ra219; GP32R2R5-NEXT: seh $2, $1220;221; GP32R6-LABEL: urem_i16:222; GP32R6: # %bb.0: # %entry223; GP32R6-NEXT: andi $1, $5, 65535224; GP32R6-NEXT: andi $2, $4, 65535225; GP32R6-NEXT: modu $2, $2, $1226; GP32R6-NEXT: teq $1, $zero, 7227; GP32R6-NEXT: jr $ra228; GP32R6-NEXT: seh $2, $2229;230; MIPS3-LABEL: urem_i16:231; MIPS3: # %bb.0: # %entry232; MIPS3-NEXT: andi $1, $5, 65535233; MIPS3-NEXT: andi $2, $4, 65535234; MIPS3-NEXT: divu $zero, $2, $1235; MIPS3-NEXT: teq $1, $zero, 7236; MIPS3-NEXT: mfhi $1237; MIPS3-NEXT: sll $1, $1, 16238; MIPS3-NEXT: jr $ra239; MIPS3-NEXT: sra $2, $1, 16240;241; GP64R0R1-LABEL: urem_i16:242; GP64R0R1: # %bb.0: # %entry243; GP64R0R1-NEXT: andi $1, $5, 65535244; GP64R0R1-NEXT: andi $2, $4, 65535245; GP64R0R1-NEXT: divu $zero, $2, $1246; GP64R0R1-NEXT: teq $1, $zero, 7247; GP64R0R1-NEXT: mfhi $1248; GP64R0R1-NEXT: sll $1, $1, 16249; GP64R0R1-NEXT: jr $ra250; GP64R0R1-NEXT: sra $2, $1, 16251;252; GP64R2R5-LABEL: urem_i16:253; GP64R2R5: # %bb.0: # %entry254; GP64R2R5-NEXT: andi $1, $5, 65535255; GP64R2R5-NEXT: andi $2, $4, 65535256; GP64R2R5-NEXT: divu $zero, $2, $1257; GP64R2R5-NEXT: teq $1, $zero, 7258; GP64R2R5-NEXT: mfhi $1259; GP64R2R5-NEXT: jr $ra260; GP64R2R5-NEXT: seh $2, $1261;262; GP64R6-LABEL: urem_i16:263; GP64R6: # %bb.0: # %entry264; GP64R6-NEXT: andi $1, $5, 65535265; GP64R6-NEXT: andi $2, $4, 65535266; GP64R6-NEXT: modu $2, $2, $1267; GP64R6-NEXT: teq $1, $zero, 7268; GP64R6-NEXT: jr $ra269; GP64R6-NEXT: seh $2, $2270;271; MMR3-LABEL: urem_i16:272; MMR3: # %bb.0: # %entry273; MMR3-NEXT: andi16 $2, $5, 65535274; MMR3-NEXT: andi16 $3, $4, 65535275; MMR3-NEXT: divu $zero, $3, $2276; MMR3-NEXT: teq $2, $zero, 7277; MMR3-NEXT: mfhi16 $1278; MMR3-NEXT: jr $ra279; MMR3-NEXT: seh $2, $1280;281; MMR6-LABEL: urem_i16:282; MMR6: # %bb.0: # %entry283; MMR6-NEXT: andi16 $2, $5, 65535284; MMR6-NEXT: andi16 $3, $4, 65535285; MMR6-NEXT: modu $1, $3, $2286; MMR6-NEXT: teq $2, $zero, 7287; MMR6-NEXT: seh $2, $1288; MMR6-NEXT: jrc $ra289entry:290 %r = urem i16 %a, %b291 ret i16 %r292}293 294define signext i32 @urem_i32(i32 signext %a, i32 signext %b) {295; MIPS2-LABEL: urem_i32:296; MIPS2: # %bb.0: # %entry297; MIPS2-NEXT: divu $zero, $4, $5298; MIPS2-NEXT: teq $5, $zero, 7299; MIPS2-NEXT: mfhi $2300; MIPS2-NEXT: jr $ra301; MIPS2-NEXT: nop302;303; GP32-LABEL: urem_i32:304; GP32: # %bb.0: # %entry305; GP32-NEXT: divu $zero, $4, $5306; GP32-NEXT: teq $5, $zero, 7307; GP32-NEXT: jr $ra308; GP32-NEXT: mfhi $2309;310; GP32R6-LABEL: urem_i32:311; GP32R6: # %bb.0: # %entry312; GP32R6-NEXT: modu $2, $4, $5313; GP32R6-NEXT: teq $5, $zero, 7314; GP32R6-NEXT: jrc $ra315;316; MIPS3-LABEL: urem_i32:317; MIPS3: # %bb.0: # %entry318; MIPS3-NEXT: divu $zero, $4, $5319; MIPS3-NEXT: teq $5, $zero, 7320; MIPS3-NEXT: mfhi $2321; MIPS3-NEXT: jr $ra322; MIPS3-NEXT: nop323;324; GP64-LABEL: urem_i32:325; GP64: # %bb.0: # %entry326; GP64-NEXT: divu $zero, $4, $5327; GP64-NEXT: teq $5, $zero, 7328; GP64-NEXT: jr $ra329; GP64-NEXT: mfhi $2330;331; GP64R6-LABEL: urem_i32:332; GP64R6: # %bb.0: # %entry333; GP64R6-NEXT: modu $2, $4, $5334; GP64R6-NEXT: teq $5, $zero, 7335; GP64R6-NEXT: jrc $ra336;337; MMR3-LABEL: urem_i32:338; MMR3: # %bb.0: # %entry339; MMR3-NEXT: divu $zero, $4, $5340; MMR3-NEXT: teq $5, $zero, 7341; MMR3-NEXT: mfhi16 $2342; MMR3-NEXT: jrc $ra343;344; MMR6-LABEL: urem_i32:345; MMR6: # %bb.0: # %entry346; MMR6-NEXT: modu $2, $4, $5347; MMR6-NEXT: teq $5, $zero, 7348; MMR6-NEXT: jrc $ra349entry:350 %r = urem i32 %a, %b351 ret i32 %r352}353 354define signext i64 @urem_i64(i64 signext %a, i64 signext %b) {355; MIPS2-LABEL: urem_i64:356; MIPS2: # %bb.0: # %entry357; MIPS2-NEXT: lui $2, %hi(_gp_disp)358; MIPS2-NEXT: addiu $2, $2, %lo(_gp_disp)359; MIPS2-NEXT: addiu $sp, $sp, -24360; MIPS2-NEXT: .cfi_def_cfa_offset 24361; MIPS2-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill362; MIPS2-NEXT: .cfi_offset 31, -4363; MIPS2-NEXT: addu $gp, $2, $25364; MIPS2-NEXT: lw $25, %call16(__umoddi3)($gp)365; MIPS2-NEXT: jalr $25366; MIPS2-NEXT: nop367; MIPS2-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload368; MIPS2-NEXT: jr $ra369; MIPS2-NEXT: addiu $sp, $sp, 24370;371; GP32-LABEL: urem_i64:372; GP32: # %bb.0: # %entry373; GP32-NEXT: lui $2, %hi(_gp_disp)374; GP32-NEXT: addiu $2, $2, %lo(_gp_disp)375; GP32-NEXT: addiu $sp, $sp, -24376; GP32-NEXT: .cfi_def_cfa_offset 24377; GP32-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill378; GP32-NEXT: .cfi_offset 31, -4379; GP32-NEXT: addu $gp, $2, $25380; GP32-NEXT: lw $25, %call16(__umoddi3)($gp)381; GP32-NEXT: jalr $25382; GP32-NEXT: nop383; GP32-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload384; GP32-NEXT: jr $ra385; GP32-NEXT: addiu $sp, $sp, 24386;387; GP32R6-LABEL: urem_i64:388; GP32R6: # %bb.0: # %entry389; GP32R6-NEXT: lui $2, %hi(_gp_disp)390; GP32R6-NEXT: addiu $2, $2, %lo(_gp_disp)391; GP32R6-NEXT: addiu $sp, $sp, -24392; GP32R6-NEXT: .cfi_def_cfa_offset 24393; GP32R6-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill394; GP32R6-NEXT: .cfi_offset 31, -4395; GP32R6-NEXT: addu $gp, $2, $25396; GP32R6-NEXT: lw $25, %call16(__umoddi3)($gp)397; GP32R6-NEXT: jalrc $25398; GP32R6-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload399; GP32R6-NEXT: jr $ra400; GP32R6-NEXT: addiu $sp, $sp, 24401;402; MIPS3-LABEL: urem_i64:403; MIPS3: # %bb.0: # %entry404; MIPS3-NEXT: ddivu $zero, $4, $5405; MIPS3-NEXT: teq $5, $zero, 7406; MIPS3-NEXT: mfhi $2407; MIPS3-NEXT: jr $ra408; MIPS3-NEXT: nop409;410; GP64-LABEL: urem_i64:411; GP64: # %bb.0: # %entry412; GP64-NEXT: ddivu $zero, $4, $5413; GP64-NEXT: teq $5, $zero, 7414; GP64-NEXT: jr $ra415; GP64-NEXT: mfhi $2416;417; GP64R6-LABEL: urem_i64:418; GP64R6: # %bb.0: # %entry419; GP64R6-NEXT: dmodu $2, $4, $5420; GP64R6-NEXT: teq $5, $zero, 7421; GP64R6-NEXT: jrc $ra422;423; MMR3-LABEL: urem_i64:424; MMR3: # %bb.0: # %entry425; MMR3-NEXT: lui $2, %hi(_gp_disp)426; MMR3-NEXT: addiu $2, $2, %lo(_gp_disp)427; MMR3-NEXT: addiusp -24428; MMR3-NEXT: .cfi_def_cfa_offset 24429; MMR3-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill430; MMR3-NEXT: .cfi_offset 31, -4431; MMR3-NEXT: addu $gp, $2, $25432; MMR3-NEXT: lw $25, %call16(__umoddi3)($gp)433; MMR3-NEXT: jalr $25434; MMR3-NEXT: nop435; MMR3-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload436; MMR3-NEXT: addiusp 24437; MMR3-NEXT: jrc $ra438;439; MMR6-LABEL: urem_i64:440; MMR6: # %bb.0: # %entry441; MMR6-NEXT: lui $2, %hi(_gp_disp)442; MMR6-NEXT: addiu $2, $2, %lo(_gp_disp)443; MMR6-NEXT: addiu $sp, $sp, -24444; MMR6-NEXT: .cfi_def_cfa_offset 24445; MMR6-NEXT: sw $ra, 20($sp) # 4-byte Folded Spill446; MMR6-NEXT: .cfi_offset 31, -4447; MMR6-NEXT: addu $gp, $2, $25448; MMR6-NEXT: lw $25, %call16(__umoddi3)($gp)449; MMR6-NEXT: jalr $25450; MMR6-NEXT: lw $ra, 20($sp) # 4-byte Folded Reload451; MMR6-NEXT: addiu $sp, $sp, 24452; MMR6-NEXT: jrc $ra453entry:454 %r = urem i64 %a, %b455 ret i64 %r456}457 458define signext i128 @urem_i128(i128 signext %a, i128 signext %b) {459; MIPS2-LABEL: urem_i128:460; MIPS2: # %bb.0: # %entry461; MIPS2-NEXT: lui $2, %hi(_gp_disp)462; MIPS2-NEXT: addiu $2, $2, %lo(_gp_disp)463; MIPS2-NEXT: addiu $sp, $sp, -40464; MIPS2-NEXT: .cfi_def_cfa_offset 40465; MIPS2-NEXT: sw $ra, 36($sp) # 4-byte Folded Spill466; MIPS2-NEXT: .cfi_offset 31, -4467; MIPS2-NEXT: addu $gp, $2, $25468; MIPS2-NEXT: lw $1, 60($sp)469; MIPS2-NEXT: lw $2, 64($sp)470; MIPS2-NEXT: lw $3, 68($sp)471; MIPS2-NEXT: sw $3, 28($sp)472; MIPS2-NEXT: sw $2, 24($sp)473; MIPS2-NEXT: sw $1, 20($sp)474; MIPS2-NEXT: lw $1, 56($sp)475; MIPS2-NEXT: sw $1, 16($sp)476; MIPS2-NEXT: lw $25, %call16(__umodti3)($gp)477; MIPS2-NEXT: jalr $25478; MIPS2-NEXT: nop479; MIPS2-NEXT: lw $ra, 36($sp) # 4-byte Folded Reload480; MIPS2-NEXT: jr $ra481; MIPS2-NEXT: addiu $sp, $sp, 40482;483; GP32-LABEL: urem_i128:484; GP32: # %bb.0: # %entry485; GP32-NEXT: lui $2, %hi(_gp_disp)486; GP32-NEXT: addiu $2, $2, %lo(_gp_disp)487; GP32-NEXT: addiu $sp, $sp, -40488; GP32-NEXT: .cfi_def_cfa_offset 40489; GP32-NEXT: sw $ra, 36($sp) # 4-byte Folded Spill490; GP32-NEXT: .cfi_offset 31, -4491; GP32-NEXT: addu $gp, $2, $25492; GP32-NEXT: lw $1, 60($sp)493; GP32-NEXT: lw $2, 64($sp)494; GP32-NEXT: lw $3, 68($sp)495; GP32-NEXT: sw $3, 28($sp)496; GP32-NEXT: sw $2, 24($sp)497; GP32-NEXT: sw $1, 20($sp)498; GP32-NEXT: lw $1, 56($sp)499; GP32-NEXT: sw $1, 16($sp)500; GP32-NEXT: lw $25, %call16(__umodti3)($gp)501; GP32-NEXT: jalr $25502; GP32-NEXT: nop503; GP32-NEXT: lw $ra, 36($sp) # 4-byte Folded Reload504; GP32-NEXT: jr $ra505; GP32-NEXT: addiu $sp, $sp, 40506;507; GP32R6-LABEL: urem_i128:508; GP32R6: # %bb.0: # %entry509; GP32R6-NEXT: lui $2, %hi(_gp_disp)510; GP32R6-NEXT: addiu $2, $2, %lo(_gp_disp)511; GP32R6-NEXT: addiu $sp, $sp, -40512; GP32R6-NEXT: .cfi_def_cfa_offset 40513; GP32R6-NEXT: sw $ra, 36($sp) # 4-byte Folded Spill514; GP32R6-NEXT: .cfi_offset 31, -4515; GP32R6-NEXT: addu $gp, $2, $25516; GP32R6-NEXT: lw $1, 60($sp)517; GP32R6-NEXT: lw $2, 64($sp)518; GP32R6-NEXT: lw $3, 68($sp)519; GP32R6-NEXT: sw $3, 28($sp)520; GP32R6-NEXT: sw $2, 24($sp)521; GP32R6-NEXT: sw $1, 20($sp)522; GP32R6-NEXT: lw $1, 56($sp)523; GP32R6-NEXT: sw $1, 16($sp)524; GP32R6-NEXT: lw $25, %call16(__umodti3)($gp)525; GP32R6-NEXT: jalrc $25526; GP32R6-NEXT: lw $ra, 36($sp) # 4-byte Folded Reload527; GP32R6-NEXT: jr $ra528; GP32R6-NEXT: addiu $sp, $sp, 40529;530; MIPS3-LABEL: urem_i128:531; MIPS3: # %bb.0: # %entry532; MIPS3-NEXT: daddiu $sp, $sp, -16533; MIPS3-NEXT: .cfi_def_cfa_offset 16534; MIPS3-NEXT: sd $ra, 8($sp) # 8-byte Folded Spill535; MIPS3-NEXT: sd $gp, 0($sp) # 8-byte Folded Spill536; MIPS3-NEXT: .cfi_offset 31, -8537; MIPS3-NEXT: .cfi_offset 28, -16538; MIPS3-NEXT: lui $1, %hi(%neg(%gp_rel(urem_i128)))539; MIPS3-NEXT: daddu $1, $1, $25540; MIPS3-NEXT: daddiu $gp, $1, %lo(%neg(%gp_rel(urem_i128)))541; MIPS3-NEXT: ld $25, %call16(__umodti3)($gp)542; MIPS3-NEXT: jalr $25543; MIPS3-NEXT: nop544; MIPS3-NEXT: ld $gp, 0($sp) # 8-byte Folded Reload545; MIPS3-NEXT: ld $ra, 8($sp) # 8-byte Folded Reload546; MIPS3-NEXT: jr $ra547; MIPS3-NEXT: daddiu $sp, $sp, 16548;549; GP64-LABEL: urem_i128:550; GP64: # %bb.0: # %entry551; GP64-NEXT: daddiu $sp, $sp, -16552; GP64-NEXT: .cfi_def_cfa_offset 16553; GP64-NEXT: sd $ra, 8($sp) # 8-byte Folded Spill554; GP64-NEXT: sd $gp, 0($sp) # 8-byte Folded Spill555; GP64-NEXT: .cfi_offset 31, -8556; GP64-NEXT: .cfi_offset 28, -16557; GP64-NEXT: lui $1, %hi(%neg(%gp_rel(urem_i128)))558; GP64-NEXT: daddu $1, $1, $25559; GP64-NEXT: daddiu $gp, $1, %lo(%neg(%gp_rel(urem_i128)))560; GP64-NEXT: ld $25, %call16(__umodti3)($gp)561; GP64-NEXT: jalr $25562; GP64-NEXT: nop563; GP64-NEXT: ld $gp, 0($sp) # 8-byte Folded Reload564; GP64-NEXT: ld $ra, 8($sp) # 8-byte Folded Reload565; GP64-NEXT: jr $ra566; GP64-NEXT: daddiu $sp, $sp, 16567;568; GP64R6-LABEL: urem_i128:569; GP64R6: # %bb.0: # %entry570; GP64R6-NEXT: daddiu $sp, $sp, -16571; GP64R6-NEXT: .cfi_def_cfa_offset 16572; GP64R6-NEXT: sd $ra, 8($sp) # 8-byte Folded Spill573; GP64R6-NEXT: sd $gp, 0($sp) # 8-byte Folded Spill574; GP64R6-NEXT: .cfi_offset 31, -8575; GP64R6-NEXT: .cfi_offset 28, -16576; GP64R6-NEXT: lui $1, %hi(%neg(%gp_rel(urem_i128)))577; GP64R6-NEXT: daddu $1, $1, $25578; GP64R6-NEXT: daddiu $gp, $1, %lo(%neg(%gp_rel(urem_i128)))579; GP64R6-NEXT: ld $25, %call16(__umodti3)($gp)580; GP64R6-NEXT: jalrc $25581; GP64R6-NEXT: ld $gp, 0($sp) # 8-byte Folded Reload582; GP64R6-NEXT: ld $ra, 8($sp) # 8-byte Folded Reload583; GP64R6-NEXT: jr $ra584; GP64R6-NEXT: daddiu $sp, $sp, 16585;586; MMR3-LABEL: urem_i128:587; MMR3: # %bb.0: # %entry588; MMR3-NEXT: lui $2, %hi(_gp_disp)589; MMR3-NEXT: addiu $2, $2, %lo(_gp_disp)590; MMR3-NEXT: addiusp -40591; MMR3-NEXT: .cfi_def_cfa_offset 40592; MMR3-NEXT: sw $ra, 36($sp) # 4-byte Folded Spill593; MMR3-NEXT: sw $17, 32($sp) # 4-byte Folded Spill594; MMR3-NEXT: .cfi_offset 31, -4595; MMR3-NEXT: .cfi_offset 17, -8596; MMR3-NEXT: addu $gp, $2, $25597; MMR3-NEXT: move $1, $7598; MMR3-NEXT: lw $7, 60($sp)599; MMR3-NEXT: lw $17, 64($sp)600; MMR3-NEXT: lw $3, 68($sp)601; MMR3-NEXT: move $2, $sp602; MMR3-NEXT: sw16 $3, 28($2)603; MMR3-NEXT: sw16 $17, 24($2)604; MMR3-NEXT: sw16 $7, 20($2)605; MMR3-NEXT: lw $3, 56($sp)606; MMR3-NEXT: sw16 $3, 16($2)607; MMR3-NEXT: lw $25, %call16(__umodti3)($gp)608; MMR3-NEXT: move $7, $1609; MMR3-NEXT: jalr $25610; MMR3-NEXT: nop611; MMR3-NEXT: lw $17, 32($sp) # 4-byte Folded Reload612; MMR3-NEXT: lw $ra, 36($sp) # 4-byte Folded Reload613; MMR3-NEXT: addiusp 40614; MMR3-NEXT: jrc $ra615;616; MMR6-LABEL: urem_i128:617; MMR6: # %bb.0: # %entry618; MMR6-NEXT: lui $2, %hi(_gp_disp)619; MMR6-NEXT: addiu $2, $2, %lo(_gp_disp)620; MMR6-NEXT: addiu $sp, $sp, -40621; MMR6-NEXT: .cfi_def_cfa_offset 40622; MMR6-NEXT: sw $ra, 36($sp) # 4-byte Folded Spill623; MMR6-NEXT: sw $17, 32($sp) # 4-byte Folded Spill624; MMR6-NEXT: .cfi_offset 31, -4625; MMR6-NEXT: .cfi_offset 17, -8626; MMR6-NEXT: addu $gp, $2, $25627; MMR6-NEXT: move $1, $7628; MMR6-NEXT: lw $7, 60($sp)629; MMR6-NEXT: lw $17, 64($sp)630; MMR6-NEXT: lw $3, 68($sp)631; MMR6-NEXT: move $2, $sp632; MMR6-NEXT: sw16 $3, 28($2)633; MMR6-NEXT: sw16 $17, 24($2)634; MMR6-NEXT: sw16 $7, 20($2)635; MMR6-NEXT: lw $3, 56($sp)636; MMR6-NEXT: sw16 $3, 16($2)637; MMR6-NEXT: lw $25, %call16(__umodti3)($gp)638; MMR6-NEXT: move $7, $1639; MMR6-NEXT: jalr $25640; MMR6-NEXT: lw $17, 32($sp) # 4-byte Folded Reload641; MMR6-NEXT: lw $ra, 36($sp) # 4-byte Folded Reload642; MMR6-NEXT: addiu $sp, $sp, 40643; MMR6-NEXT: jrc $ra644entry:645 %r = urem i128 %a, %b646 ret i128 %r647}648