brintos

brintos / llvm-project-archived public Read only

0
0
Text · 6.6 KiB · 8d4103a Raw
220 lines · plain
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=mips-img-linux-gnu -mcpu=mips32r6 -mattr=+micromips %s -o - -start-before mips-delay-slot-filler -stop-after mips-branch-expansion | FileCheck %s --check-prefix=MM3# RUN: llc -mtriple=mips-img-linux-gnu -mcpu=mips32r6 -mattr=+micromips %s -o - -start-before mips-delay-slot-filler -stop-after mips-branch-expansion -relocation-model=pic | FileCheck %s --check-prefix=PIC4 5# Test the long branch expansion of various branches6 7--- |8 9  define i32 @a(double %a, double %b) {10  entry:11    %cmp = fcmp une double %a, %b12    br i1 %cmp, label %if.then, label %return13 14  if.then:15    call void asm sideeffect ".space 810680", "~{$1}"()16    ret i32 017 18  return:19    ret i32 120  }21 22  define i32 @b(double %a, double %b) {23  entry:24    %cmp = fcmp ueq double %a, %b25    br i1 %cmp, label %if.then, label %return26 27  if.then:28    call void asm sideeffect ".space 810680", "~{$1}"()29    ret i32 030 31  return:32    ret i32 133  }34 35...36---37name:            a38alignment:       439exposesReturnsTwice: false40legalized:       false41regBankSelected: false42selected:        false43failedISel:      false44tracksRegLiveness: true45registers:46liveins:47  - { reg: '$d12_64', virtual-reg: '' }48  - { reg: '$d14_64', virtual-reg: '' }49frameInfo:50  isFrameAddressTaken: false51  isReturnAddressTaken: false52  hasStackMap:     false53  hasPatchPoint:   false54  stackSize:       055  offsetAdjustment: 056  maxAlignment:    157  adjustsStack:    false58  hasCalls:        false59  stackProtector:  ''60  maxCallFrameSize: 061  hasOpaqueSPAdjustment: false62  hasVAStart:      false63  hasMustTailInVarArgFunc: false64  localFrameSize:  065  savePoint:       []66  restorePoint:    []67fixedStack:68stack:69constants:70body:             |71  ; MM-LABEL: name: a72  ; MM: bb.0.entry:73  ; MM:   successors: %bb.2(0x50000000), %bb.1(0x30000000)74  ; MM:   $f0 = CMP_EQ_D_MMR6 killed $d12_64, killed $d14_6475  ; MM:   BC1EQZC_MMR6 $d0_64, %bb.2, implicit-def $at76  ; MM: bb.1.entry:77  ; MM:   successors: %bb.3(0x80000000)78  ; MM:   BC_MMR6 %bb.379  ; MM: bb.2.if.then:80  ; MM:   INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at81  ; MM:   $v0 = LI16_MM 082  ; MM:   JRC16_MM undef $ra, implicit $v083  ; MM: bb.3.return:84  ; MM:   $v0 = LI16_MM 185  ; MM:   JRC16_MM undef $ra, implicit $v086  ; PIC-LABEL: name: a87  ; PIC: bb.0.entry:88  ; PIC:   successors: %bb.3(0x50000000), %bb.1(0x30000000)89  ; PIC:   $f0 = CMP_EQ_D_MMR6 killed $d12_64, killed $d14_6490  ; PIC:   BC1EQZC_MMR6 $d0_64, %bb.3, implicit-def $at91  ; PIC: bb.1.entry:92  ; PIC:   successors: %bb.2(0x80000000)93  ; PIC:   $sp = ADDiu $sp, -894  ; PIC:   SW $ra, $sp, 095  ; PIC:   $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.296  ; PIC:   $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.297  ; PIC:   BALC_MMR6 %bb.2, implicit-def $ra98  ; PIC: bb.2.entry:99  ; PIC:   successors: %bb.4(0x80000000)100  ; PIC:   $at = ADDu $ra, $at101  ; PIC:   $ra = LW $sp, 0102  ; PIC:   $sp = ADDiu $sp, 8103  ; PIC:   JIC_MMR6 $at, 0, implicit-def $at104  ; PIC: bb.3.if.then:105  ; PIC:   INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at106  ; PIC:   $v0 = LI16_MM 0107  ; PIC:   JRC16_MM undef $ra, implicit $v0108  ; PIC: bb.4.return:109  ; PIC:   $v0 = LI16_MM 1110  ; PIC:   JRC16_MM undef $ra, implicit $v0111  bb.0.entry:112    successors: %bb.1(0x50000000), %bb.2(0x30000000)113    liveins: $d12_64, $d14_64114 115    $f0 = CMP_EQ_D_MMR6 killed $d12_64, killed $d14_64116    BC1NEZC_MMR6 killed $d0_64, %bb.2, implicit-def $at117 118  bb.1.if.then:119    INLINEASM &".space 810680", 1, 12, implicit-def dead early-clobber $at120    $v0 = LI16_MM 0121    PseudoReturn undef $ra, implicit $v0122 123  bb.2.return:124    $v0 = LI16_MM 1125    PseudoReturn undef $ra, implicit $v0126 127...128---129name:            b130alignment:       4131exposesReturnsTwice: false132legalized:       false133regBankSelected: false134selected:        false135failedISel:      false136tracksRegLiveness: true137registers:138liveins:139  - { reg: '$d12_64', virtual-reg: '' }140  - { reg: '$d14_64', virtual-reg: '' }141frameInfo:142  isFrameAddressTaken: false143  isReturnAddressTaken: false144  hasStackMap:     false145  hasPatchPoint:   false146  stackSize:       0147  offsetAdjustment: 0148  maxAlignment:    1149  adjustsStack:    false150  hasCalls:        false151  stackProtector:  ''152  maxCallFrameSize: 0153  hasOpaqueSPAdjustment: false154  hasVAStart:      false155  hasMustTailInVarArgFunc: false156  localFrameSize:  0157  savePoint:       []158  restorePoint:    []159fixedStack:160stack:161constants:162body:             |163  ; MM-LABEL: name: b164  ; MM: bb.0.entry:165  ; MM:   successors: %bb.2(0x30000000), %bb.1(0x50000000)166  ; MM:   $f0 = CMP_UEQ_D_MMR6 killed $d12_64, killed $d14_64167  ; MM:   BC1NEZC_MMR6 $d0_64, %bb.2, implicit-def $at168  ; MM: bb.1.entry:169  ; MM:   successors: %bb.3(0x80000000)170  ; MM:   BC_MMR6 %bb.3171  ; MM: bb.2.if.then:172  ; MM:   INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at173  ; MM:   $v0 = LI16_MM 0174  ; MM:   JRC16_MM undef $ra, implicit $v0175  ; MM: bb.3.return:176  ; MM:   $v0 = LI16_MM 1177  ; MM:   JRC16_MM undef $ra, implicit $v0178  ; PIC-LABEL: name: b179  ; PIC: bb.0.entry:180  ; PIC:   successors: %bb.3(0x30000000), %bb.1(0x50000000)181  ; PIC:   $f0 = CMP_UEQ_D_MMR6 killed $d12_64, killed $d14_64182  ; PIC:   BC1NEZC_MMR6 $d0_64, %bb.3, implicit-def $at183  ; PIC: bb.1.entry:184  ; PIC:   successors: %bb.2(0x80000000)185  ; PIC:   $sp = ADDiu $sp, -8186  ; PIC:   SW $ra, $sp, 0187  ; PIC:   $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2188  ; PIC:   $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2189  ; PIC:   BALC_MMR6 %bb.2, implicit-def $ra190  ; PIC: bb.2.entry:191  ; PIC:   successors: %bb.4(0x80000000)192  ; PIC:   $at = ADDu $ra, $at193  ; PIC:   $ra = LW $sp, 0194  ; PIC:   $sp = ADDiu $sp, 8195  ; PIC:   JIC_MMR6 $at, 0, implicit-def $at196  ; PIC: bb.3.if.then:197  ; PIC:   INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at198  ; PIC:   $v0 = LI16_MM 0199  ; PIC:   JRC16_MM undef $ra, implicit $v0200  ; PIC: bb.4.return:201  ; PIC:   $v0 = LI16_MM 1202  ; PIC:   JRC16_MM undef $ra, implicit $v0203  bb.0.entry:204    successors: %bb.1(0x30000000), %bb.2(0x50000000)205    liveins: $d12_64, $d14_64206 207    $f0 = CMP_UEQ_D_MMR6 killed $d12_64, killed $d14_64208    BC1EQZC_MMR6 killed $d0_64, %bb.2, implicit-def $at209 210  bb.1.if.then:211    INLINEASM &".space 810680", 1, 12, implicit-def dead early-clobber $at212    $v0 = LI16_MM 0213    PseudoReturn undef $ra, implicit $v0214 215  bb.2.return:216    $v0 = LI16_MM 1217    PseudoReturn undef $ra, implicit $v0218 219...220