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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=mips-img-linux-gnu -mcpu=mips32r6 %s -o - -start-before mips-delay-slot-filler -stop-after mips-branch-expansion | FileCheck %s --check-prefix=R63# RUN: llc -mtriple=mips-img-linux-gnu -mcpu=mips32r6 %s -o - -start-before mips-delay-slot-filler -stop-after mips-branch-expansion -relocation-model=pic | FileCheck %s --check-prefix=PIC4 5# Test the long branch expansion of various branches6 7--- |8 9 define i32 @a(double %a, double %b) {10 entry:11 %cmp = fcmp une double %a, %b12 br i1 %cmp, label %if.then, label %return13 14 if.then: ; preds = %entry15 call void asm sideeffect ".space 310680", "~{$1}"()16 ret i32 017 18 return: ; preds = %entry19 ret i32 120 }21 22 define i32 @b(double %a, double %b) {23 entry:24 %cmp = fcmp ueq double %a, %b25 br i1 %cmp, label %if.then, label %return26 27 if.then: ; preds = %entry28 call void asm sideeffect ".space 310680", "~{$1}"()29 ret i32 030 31 return: ; preds = %entry32 ret i32 133 }34 35 36...37---38name: a39alignment: 440exposesReturnsTwice: false41legalized: false42regBankSelected: false43selected: false44failedISel: false45tracksRegLiveness: true46registers:47liveins:48 - { reg: '$d12_64', virtual-reg: '' }49 - { reg: '$d14_64', virtual-reg: '' }50frameInfo:51 isFrameAddressTaken: false52 isReturnAddressTaken: false53 hasStackMap: false54 hasPatchPoint: false55 stackSize: 056 offsetAdjustment: 057 maxAlignment: 158 adjustsStack: false59 hasCalls: false60 stackProtector: ''61 maxCallFrameSize: 062 hasOpaqueSPAdjustment: false63 hasVAStart: false64 hasMustTailInVarArgFunc: false65 localFrameSize: 066 savePoint: []67 restorePoint: []68fixedStack:69stack:70constants:71body: |72 ; R6-LABEL: name: a73 ; R6: bb.0.entry:74 ; R6: successors: %bb.2(0x50000000), %bb.1(0x30000000)75 ; R6: $f0 = CMP_EQ_D killed $d12_64, killed $d14_6476 ; R6: BC1NEZ $d0_64, %bb.2 {77 ; R6: $zero = SLL $zero, 078 ; R6: }79 ; R6: bb.1.entry:80 ; R6: successors: %bb.3(0x80000000)81 ; R6: BC %bb.382 ; R6: bb.2.if.then:83 ; R6: INLINEASM &".space 310680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at84 ; R6: PseudoReturn undef $ra, implicit killed $v0 {85 ; R6: $v0 = ADDiu $zero, 086 ; R6: }87 ; R6: bb.3.return:88 ; R6: PseudoReturn undef $ra, implicit killed $v0 {89 ; R6: $v0 = ADDiu $zero, 190 ; R6: }91 ; PIC-LABEL: name: a92 ; PIC: bb.0.entry:93 ; PIC: successors: %bb.3(0x50000000), %bb.1(0x30000000)94 ; PIC: $f0 = CMP_EQ_D killed $d12_64, killed $d14_6495 ; PIC: BC1NEZ $d0_64, %bb.3 {96 ; PIC: $zero = SLL $zero, 097 ; PIC: }98 ; PIC: bb.1.entry:99 ; PIC: successors: %bb.2(0x80000000)100 ; PIC: $sp = ADDiu $sp, -8101 ; PIC: SW $ra, $sp, 0102 ; PIC: $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2103 ; PIC: $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2104 ; PIC: BALC %bb.2, implicit-def $ra105 ; PIC: bb.2.entry:106 ; PIC: successors: %bb.4(0x80000000)107 ; PIC: $at = ADDu $ra, $at108 ; PIC: $ra = LW $sp, 0109 ; PIC: $sp = ADDiu $sp, 8110 ; PIC: JIC $at, 0, implicit-def $at111 ; PIC: bb.3.if.then:112 ; PIC: INLINEASM &".space 310680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at113 ; PIC: PseudoReturn undef $ra, implicit killed $v0 {114 ; PIC: $v0 = ADDiu $zero, 0115 ; PIC: }116 ; PIC: bb.4.return:117 ; PIC: PseudoReturn undef $ra, implicit killed $v0 {118 ; PIC: $v0 = ADDiu $zero, 1119 ; PIC: }120 bb.0.entry:121 successors: %bb.1(0x50000000), %bb.2(0x30000000)122 liveins: $d12_64, $d14_64123 124 $f0 = CMP_EQ_D killed $d12_64, killed $d14_64125 BC1EQZ killed $d0_64, %bb.2, implicit-def $at126 127 bb.1.if.then:128 INLINEASM &".space 310680", 1, 12, implicit-def dead early-clobber $at129 $v0 = ADDiu $zero, 0130 PseudoReturn undef $ra, implicit killed $v0131 132 bb.2.return:133 $v0 = ADDiu $zero, 1134 PseudoReturn undef $ra, implicit killed $v0135 136...137---138name: b139alignment: 4140exposesReturnsTwice: false141legalized: false142regBankSelected: false143selected: false144failedISel: false145tracksRegLiveness: true146registers:147liveins:148 - { reg: '$d12_64', virtual-reg: '' }149 - { reg: '$d14_64', virtual-reg: '' }150frameInfo:151 isFrameAddressTaken: false152 isReturnAddressTaken: false153 hasStackMap: false154 hasPatchPoint: false155 stackSize: 0156 offsetAdjustment: 0157 maxAlignment: 1158 adjustsStack: false159 hasCalls: false160 stackProtector: ''161 maxCallFrameSize: 0162 hasOpaqueSPAdjustment: false163 hasVAStart: false164 hasMustTailInVarArgFunc: false165 localFrameSize: 0166 savePoint: []167 restorePoint: []168fixedStack:169stack:170constants:171body: |172 ; R6-LABEL: name: b173 ; R6: bb.0.entry:174 ; R6: successors: %bb.2(0x50000000), %bb.1(0x30000000)175 ; R6: $f0 = CMP_EQ_D killed $d12_64, killed $d14_64176 ; R6: BC1EQZ $d0_64, %bb.2 {177 ; R6: $zero = SLL $zero, 0178 ; R6: }179 ; R6: bb.1.entry:180 ; R6: successors: %bb.3(0x80000000)181 ; R6: BC %bb.3182 ; R6: bb.2.if.then:183 ; R6: INLINEASM &".space 310680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at184 ; R6: PseudoReturn undef $ra, implicit killed $v0 {185 ; R6: $v0 = ADDiu $zero, 0186 ; R6: }187 ; R6: bb.3.return:188 ; R6: PseudoReturn undef $ra, implicit killed $v0 {189 ; R6: $v0 = ADDiu $zero, 1190 ; R6: }191 ; PIC-LABEL: name: b192 ; PIC: bb.0.entry:193 ; PIC: successors: %bb.3(0x50000000), %bb.1(0x30000000)194 ; PIC: $f0 = CMP_EQ_D killed $d12_64, killed $d14_64195 ; PIC: BC1EQZ $d0_64, %bb.3 {196 ; PIC: $zero = SLL $zero, 0197 ; PIC: }198 ; PIC: bb.1.entry:199 ; PIC: successors: %bb.2(0x80000000)200 ; PIC: $sp = ADDiu $sp, -8201 ; PIC: SW $ra, $sp, 0202 ; PIC: $at = LONG_BRANCH_LUi target-flags(mips-abs-hi) %bb.4, %bb.2203 ; PIC: $at = LONG_BRANCH_ADDiu $at, target-flags(mips-abs-lo) %bb.4, %bb.2204 ; PIC: BALC %bb.2, implicit-def $ra205 ; PIC: bb.2.entry:206 ; PIC: successors: %bb.4(0x80000000)207 ; PIC: $at = ADDu $ra, $at208 ; PIC: $ra = LW $sp, 0209 ; PIC: $sp = ADDiu $sp, 8210 ; PIC: JIC $at, 0, implicit-def $at211 ; PIC: bb.3.if.then:212 ; PIC: INLINEASM &".space 310680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at213 ; PIC: PseudoReturn undef $ra, implicit killed $v0 {214 ; PIC: $v0 = ADDiu $zero, 0215 ; PIC: }216 ; PIC: bb.4.return:217 ; PIC: PseudoReturn undef $ra, implicit killed $v0 {218 ; PIC: $v0 = ADDiu $zero, 1219 ; PIC: }220 bb.0.entry:221 successors: %bb.1(0x50000000), %bb.2(0x30000000)222 liveins: $d12_64, $d14_64223 224 $f0 = CMP_EQ_D killed $d12_64, killed $d14_64225 BC1NEZ killed $d0_64, %bb.2, implicit-def $at226 227 bb.1.if.then:228 INLINEASM &".space 310680", 1, 12, implicit-def dead early-clobber $at229 $v0 = ADDiu $zero, 0230 PseudoReturn undef $ra, implicit killed $v0231 232 bb.2.return:233 $v0 = ADDiu $zero, 1234 PseudoReturn undef $ra, implicit killed $v0235 236...237