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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=mips64-mti-linux-gnu -mcpu=mips64r5 -mattr=+fp64,+msa %s -o - -start-before mips-delay-slot-filler -stop-after mips-branch-expansion | FileCheck %s --check-prefix=MSA3# RUN: llc -mtriple=mips64-mti-linux-gnu -mcpu=mips64r5 -mattr=+fp64,+msa %s -o - -start-before mips-delay-slot-filler -stop-after mips-branch-expansion -relocation-model=pic | FileCheck %s --check-prefix=PIC4 5# Test the long branch expansion of various branches6 7 8 9--- |10 11 define i32 @_Z4bz_8Dv16_a(i64 inreg %d.coerce0, i64 inreg %d.coerce1) {12 entry:13 %0 = bitcast i64 %d.coerce0 to <8 x i8>14 %d.0.vec.expand = shufflevector <8 x i8> %0, <8 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>15 %1 = bitcast i64 %d.coerce1 to <8 x i8>16 %d.8.vec.expand = shufflevector <8 x i8> %1, <8 x i8> undef, <16 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>17 %d.8.vecblend = shufflevector <16 x i8> %d.8.vec.expand, <16 x i8> %d.0.vec.expand, <16 x i32> <i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>18 %2 = tail call i32 @llvm.mips.bz.b(<16 x i8> %d.8.vecblend)19 %tobool = icmp eq i32 %2, 020 br i1 %tobool, label %return, label %if.then21 22 if.then:23 tail call void asm sideeffect ".space 810680", "~{$1}"()24 br label %return25 26 return:27 %retval.0 = phi i32 [ 1, %if.then ], [ 0, %entry ]28 ret i32 %retval.029 }30 31 declare i32 @llvm.mips.bz.b(<16 x i8>)32 33 define i32 @_Z5bz_16Dv8_s(i64 inreg %d.coerce0, i64 inreg %d.coerce1) {34 entry:35 %0 = bitcast i64 %d.coerce0 to <4 x i16>36 %d.0.vec.expand = shufflevector <4 x i16> %0, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>37 %1 = bitcast i64 %d.coerce1 to <4 x i16>38 %d.8.vec.expand = shufflevector <4 x i16> %1, <4 x i16> undef, <8 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 0, i32 1, i32 2, i32 3>39 %d.8.vecblend = shufflevector <8 x i16> %d.8.vec.expand, <8 x i16> %d.0.vec.expand, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7>40 %2 = tail call i32 @llvm.mips.bz.h(<8 x i16> %d.8.vecblend)41 %tobool = icmp eq i32 %2, 042 br i1 %tobool, label %return, label %if.then43 44 if.then:45 tail call void asm sideeffect ".space 810680", "~{$1}"()46 br label %return47 48 return:49 %retval.0 = phi i32 [ 1, %if.then ], [ 0, %entry ]50 ret i32 %retval.051 }52 53 declare i32 @llvm.mips.bz.h(<8 x i16>)54 55 define i32 @_Z5bz_32Dv4_i(i64 inreg %d.coerce0, i64 inreg %d.coerce1) {56 entry:57 %0 = bitcast i64 %d.coerce0 to <2 x i32>58 %d.0.vec.expand = shufflevector <2 x i32> %0, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>59 %1 = bitcast i64 %d.coerce1 to <2 x i32>60 %d.8.vec.expand = shufflevector <2 x i32> %1, <2 x i32> undef, <4 x i32> <i32 undef, i32 undef, i32 0, i32 1>61 %d.8.vecblend = shufflevector <4 x i32> %d.8.vec.expand, <4 x i32> %d.0.vec.expand, <4 x i32> <i32 4, i32 5, i32 2, i32 3>62 %2 = tail call i32 @llvm.mips.bz.w(<4 x i32> %d.8.vecblend)63 %tobool = icmp eq i32 %2, 064 br i1 %tobool, label %return, label %if.then65 66 if.then:67 tail call void asm sideeffect ".space 810680", "~{$1}"()68 br label %return69 70 return:71 %retval.0 = phi i32 [ 1, %if.then ], [ 0, %entry ]72 ret i32 %retval.073 }74 75 declare i32 @llvm.mips.bz.w(<4 x i32>)76 77 define i32 @_Z5bz_64Dv2_x(i64 inreg %d.coerce0, i64 inreg %d.coerce1) {78 entry:79 %d.0.vec.insert = insertelement <2 x i64> undef, i64 %d.coerce0, i32 080 %d.8.vec.insert = insertelement <2 x i64> %d.0.vec.insert, i64 %d.coerce1, i32 181 %0 = tail call i32 @llvm.mips.bz.d(<2 x i64> %d.8.vec.insert)82 %tobool = icmp eq i32 %0, 083 br i1 %tobool, label %return, label %if.then84 85 if.then:86 tail call void asm sideeffect ".space 810680", "~{$1}"()87 br label %return88 89 return:90 %retval.0 = phi i32 [ 1, %if.then ], [ 0, %entry ]91 ret i32 %retval.092 }93 94 declare i32 @llvm.mips.bz.d(<2 x i64>)95 96 define i32 @_Z5bz_64_vDv2_x(i64 inreg %d.coerce0, i64 inreg %d.coerce1) {97 entry:98 %d.0.vec.insert = insertelement <2 x i64> undef, i64 %d.coerce0, i32 099 %d.8.vec.insert = insertelement <2 x i64> %d.0.vec.insert, i64 %d.coerce1, i32 1100 %d.16.vec.insert = bitcast <2 x i64> %d.8.vec.insert to <16 x i8>101 %0 = tail call i32 @llvm.mips.bz.v(<16 x i8> %d.16.vec.insert)102 %tobool = icmp eq i32 %0, 0103 br i1 %tobool, label %return, label %if.then104 105 if.then:106 tail call void asm sideeffect ".space 810680", "~{$1}"()107 br label %return108 109 return:110 %retval.0 = phi i32 [ 1, %if.then ], [ 0, %entry ]111 ret i32 %retval.0112 }113 114 declare i32 @llvm.mips.bz.v(<16 x i8>)115 116 define i32 @_Z5bnz_8Dv16_a(i64 inreg %d.coerce0, i64 inreg %d.coerce1) {117 entry:118 %0 = bitcast i64 %d.coerce0 to <8 x i8>119 %d.0.vec.expand = shufflevector <8 x i8> %0, <8 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>120 %1 = bitcast i64 %d.coerce1 to <8 x i8>121 %d.8.vec.expand = shufflevector <8 x i8> %1, <8 x i8> undef, <16 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>122 %d.8.vecblend = shufflevector <16 x i8> %d.8.vec.expand, <16 x i8> %d.0.vec.expand, <16 x i32> <i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>123 %2 = tail call i32 @llvm.mips.bnz.b(<16 x i8> %d.8.vecblend)124 %tobool = icmp eq i32 %2, 0125 br i1 %tobool, label %return, label %if.then126 127 if.then:128 tail call void asm sideeffect ".space 810680", "~{$1}"()129 br label %return130 131 return:132 %retval.0 = phi i32 [ 1, %if.then ], [ 0, %entry ]133 ret i32 %retval.0134 }135 136 declare i32 @llvm.mips.bnz.b(<16 x i8>)137 138 define i32 @_Z6bnz_16Dv8_s(i64 inreg %d.coerce0, i64 inreg %d.coerce1) {139 entry:140 %0 = bitcast i64 %d.coerce0 to <4 x i16>141 %d.0.vec.expand = shufflevector <4 x i16> %0, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef, i32 undef>142 %1 = bitcast i64 %d.coerce1 to <4 x i16>143 %d.8.vec.expand = shufflevector <4 x i16> %1, <4 x i16> undef, <8 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 0, i32 1, i32 2, i32 3>144 %d.8.vecblend = shufflevector <8 x i16> %d.8.vec.expand, <8 x i16> %d.0.vec.expand, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7>145 %2 = tail call i32 @llvm.mips.bnz.h(<8 x i16> %d.8.vecblend)146 %tobool = icmp eq i32 %2, 0147 br i1 %tobool, label %return, label %if.then148 149 if.then:150 tail call void asm sideeffect ".space 810680", "~{$1}"()151 br label %return152 153 return:154 %retval.0 = phi i32 [ 1, %if.then ], [ 0, %entry ]155 ret i32 %retval.0156 }157 158 declare i32 @llvm.mips.bnz.h(<8 x i16>)159 160 define i32 @_Z6bnz_32Dv4_i(i64 inreg %d.coerce0, i64 inreg %d.coerce1) {161 entry:162 %0 = bitcast i64 %d.coerce0 to <2 x i32>163 %d.0.vec.expand = shufflevector <2 x i32> %0, <2 x i32> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>164 %1 = bitcast i64 %d.coerce1 to <2 x i32>165 %d.8.vec.expand = shufflevector <2 x i32> %1, <2 x i32> undef, <4 x i32> <i32 undef, i32 undef, i32 0, i32 1>166 %d.8.vecblend = shufflevector <4 x i32> %d.8.vec.expand, <4 x i32> %d.0.vec.expand, <4 x i32> <i32 4, i32 5, i32 2, i32 3>167 %2 = tail call i32 @llvm.mips.bnz.w(<4 x i32> %d.8.vecblend)168 %tobool = icmp eq i32 %2, 0169 br i1 %tobool, label %return, label %if.then170 171 if.then:172 tail call void asm sideeffect ".space 810680", "~{$1}"()173 br label %return174 175 return:176 %retval.0 = phi i32 [ 1, %if.then ], [ 0, %entry ]177 ret i32 %retval.0178 }179 180 declare i32 @llvm.mips.bnz.w(<4 x i32>)181 182 define i32 @_Z6bnz_64Dv2_x(i64 inreg %d.coerce0, i64 inreg %d.coerce1) {183 entry:184 %d.0.vec.insert = insertelement <2 x i64> undef, i64 %d.coerce0, i32 0185 %d.8.vec.insert = insertelement <2 x i64> %d.0.vec.insert, i64 %d.coerce1, i32 1186 %0 = tail call i32 @llvm.mips.bnz.d(<2 x i64> %d.8.vec.insert)187 %tobool = icmp eq i32 %0, 0188 br i1 %tobool, label %return, label %if.then189 190 if.then:191 tail call void asm sideeffect ".space 810680", "~{$1}"()192 br label %return193 194 return:195 %retval.0 = phi i32 [ 1, %if.then ], [ 0, %entry ]196 ret i32 %retval.0197 }198 199 declare i32 @llvm.mips.bnz.d(<2 x i64>)200 201 define i32 @_Z6bnz_64_vDv2_x(i64 inreg %d.coerce0, i64 inreg %d.coerce1) {202 entry:203 %d.0.vec.insert = insertelement <2 x i64> undef, i64 %d.coerce0, i32 0204 %d.8.vec.insert = insertelement <2 x i64> %d.0.vec.insert, i64 %d.coerce1, i32 1205 %d.16.vec.insert = bitcast <2 x i64> %d.8.vec.insert to <16 x i8>206 %0 = tail call i32 @llvm.mips.bnz.v(<16 x i8> %d.16.vec.insert)207 %tobool = icmp eq i32 %0, 0208 br i1 %tobool, label %return, label %if.then209 210 if.then:211 tail call void asm sideeffect ".space 810680", "~{$1}"()212 br label %return213 214 return:215 %retval.0 = phi i32 [ 1, %if.then ], [ 0, %entry ]216 ret i32 %retval.0217 }218 219 declare i32 @llvm.mips.bnz.v(<16 x i8>)220 221...222---223name: _Z4bz_8Dv16_a224alignment: 8225exposesReturnsTwice: false226legalized: false227regBankSelected: false228selected: false229failedISel: false230tracksRegLiveness: true231registers:232liveins:233 - { reg: '$a0_64', virtual-reg: '' }234 - { reg: '$a1_64', virtual-reg: '' }235frameInfo:236 isFrameAddressTaken: false237 isReturnAddressTaken: false238 hasStackMap: false239 hasPatchPoint: false240 stackSize: 0241 offsetAdjustment: 0242 maxAlignment: 1243 adjustsStack: false244 hasCalls: false245 stackProtector: ''246 maxCallFrameSize: 0247 hasOpaqueSPAdjustment: false248 hasVAStart: false249 hasMustTailInVarArgFunc: false250 localFrameSize: 0251 savePoint: []252 restorePoint: []253fixedStack:254stack:255constants:256body: |257 ; MSA-LABEL: name: _Z4bz_8Dv16_a258 ; MSA: bb.0.entry:259 ; MSA: successors: %bb.2(0x40000000), %bb.1(0x40000000)260 ; MSA: renamable $w0 = LDI_B 0261 ; MSA: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a0_64, 0262 ; MSA: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 1263 ; MSA: renamable $w0 = SHF_B killed renamable $w0, 27264 ; MSA: renamable $w0 = SHF_W killed renamable $w0, 177265 ; MSA: BNZ_B $w0, %bb.2, implicit-def $at {266 ; MSA: $zero = SLL $zero, 0267 ; MSA: }268 ; MSA: bb.1.entry:269 ; MSA: successors: %bb.3(0x80000000)270 ; MSA: J %bb.3, implicit-def $at {271 ; MSA: $zero = SLL $zero, 0272 ; MSA: }273 ; MSA: bb.2.if.then:274 ; MSA: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at275 ; MSA: PseudoReturn64 undef $ra_64, implicit killed $v0 {276 ; MSA: renamable $v0 = ADDiu $zero, 1277 ; MSA: }278 ; MSA: bb.3:279 ; MSA: PseudoReturn64 undef $ra_64, implicit killed $v0 {280 ; MSA: renamable $v0 = ADDiu $zero, 0281 ; MSA: }282 ; PIC-LABEL: name: _Z4bz_8Dv16_a283 ; PIC: bb.0.entry:284 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)285 ; PIC: renamable $w0 = LDI_B 0286 ; PIC: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a0_64, 0287 ; PIC: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 1288 ; PIC: renamable $w0 = SHF_B killed renamable $w0, 27289 ; PIC: renamable $w0 = SHF_W killed renamable $w0, 177290 ; PIC: BNZ_B $w0, %bb.3, implicit-def $at {291 ; PIC: $zero = SLL $zero, 0292 ; PIC: }293 ; PIC: bb.1.entry:294 ; PIC: successors: %bb.2(0x80000000)295 ; PIC: $sp_64 = DADDiu $sp_64, -16296 ; PIC: SD $ra_64, $sp_64, 0297 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.2298 ; PIC: $at_64 = DSLL $at_64, 16299 ; PIC: BAL_BR %bb.2, implicit-def $ra {300 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.2301 ; PIC: }302 ; PIC: bb.2.entry:303 ; PIC: successors: %bb.4(0x80000000)304 ; PIC: $at_64 = DADDu $ra_64, $at_64305 ; PIC: $ra_64 = LD $sp_64, 0306 ; PIC: JR64 $at_64 {307 ; PIC: $sp_64 = DADDiu $sp_64, 16308 ; PIC: }309 ; PIC: bb.3.if.then:310 ; PIC: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at311 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0 {312 ; PIC: renamable $v0 = ADDiu $zero, 1313 ; PIC: }314 ; PIC: bb.4:315 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0 {316 ; PIC: renamable $v0 = ADDiu $zero, 0317 ; PIC: }318 bb.0.entry:319 successors: %bb.1(0x40000000), %bb.2(0x40000000)320 liveins: $a0_64, $a1_64321 322 renamable $w0 = LDI_B 0323 renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a0_64, 0324 renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 1325 renamable $w0 = SHF_B killed renamable $w0, 27326 renamable $w0 = SHF_W killed renamable $w0, 177327 BZ_B killed renamable $w0, %bb.2, implicit-def dead $at328 329 bb.1.if.then:330 INLINEASM &".space 810680", 1, 12, implicit-def dead early-clobber $at331 renamable $v0 = ADDiu $zero, 1332 PseudoReturn64 undef $ra_64, implicit killed $v0333 334 bb.2:335 renamable $v0 = ADDiu $zero, 0336 PseudoReturn64 undef $ra_64, implicit killed $v0337 338...339---340name: _Z5bz_16Dv8_s341alignment: 8342exposesReturnsTwice: false343legalized: false344regBankSelected: false345selected: false346failedISel: false347tracksRegLiveness: true348registers:349liveins:350 - { reg: '$a0_64', virtual-reg: '' }351 - { reg: '$a1_64', virtual-reg: '' }352frameInfo:353 isFrameAddressTaken: false354 isReturnAddressTaken: false355 hasStackMap: false356 hasPatchPoint: false357 stackSize: 0358 offsetAdjustment: 0359 maxAlignment: 1360 adjustsStack: false361 hasCalls: false362 stackProtector: ''363 maxCallFrameSize: 0364 hasOpaqueSPAdjustment: false365 hasVAStart: false366 hasMustTailInVarArgFunc: false367 localFrameSize: 0368 savePoint: []369 restorePoint: []370fixedStack:371stack:372constants:373body: |374 ; MSA-LABEL: name: _Z5bz_16Dv8_s375 ; MSA: bb.0.entry:376 ; MSA: successors: %bb.2(0x40000000), %bb.1(0x40000000)377 ; MSA: renamable $w0 = LDI_B 0378 ; MSA: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a0_64, 0379 ; MSA: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 1380 ; MSA: renamable $w0 = SHF_H killed renamable $w0, 27381 ; MSA: BNZ_H $w0, %bb.2, implicit-def $at {382 ; MSA: $zero = SLL $zero, 0383 ; MSA: }384 ; MSA: bb.1.entry:385 ; MSA: successors: %bb.3(0x80000000)386 ; MSA: J %bb.3, implicit-def $at {387 ; MSA: $zero = SLL $zero, 0388 ; MSA: }389 ; MSA: bb.2.if.then:390 ; MSA: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at391 ; MSA: PseudoReturn64 undef $ra_64, implicit killed $v0 {392 ; MSA: renamable $v0 = ADDiu $zero, 1393 ; MSA: }394 ; MSA: bb.3:395 ; MSA: PseudoReturn64 undef $ra_64, implicit killed $v0 {396 ; MSA: renamable $v0 = ADDiu $zero, 0397 ; MSA: }398 ; PIC-LABEL: name: _Z5bz_16Dv8_s399 ; PIC: bb.0.entry:400 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)401 ; PIC: renamable $w0 = LDI_B 0402 ; PIC: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a0_64, 0403 ; PIC: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 1404 ; PIC: renamable $w0 = SHF_H killed renamable $w0, 27405 ; PIC: BNZ_H $w0, %bb.3, implicit-def $at {406 ; PIC: $zero = SLL $zero, 0407 ; PIC: }408 ; PIC: bb.1.entry:409 ; PIC: successors: %bb.2(0x80000000)410 ; PIC: $sp_64 = DADDiu $sp_64, -16411 ; PIC: SD $ra_64, $sp_64, 0412 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.2413 ; PIC: $at_64 = DSLL $at_64, 16414 ; PIC: BAL_BR %bb.2, implicit-def $ra {415 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.2416 ; PIC: }417 ; PIC: bb.2.entry:418 ; PIC: successors: %bb.4(0x80000000)419 ; PIC: $at_64 = DADDu $ra_64, $at_64420 ; PIC: $ra_64 = LD $sp_64, 0421 ; PIC: JR64 $at_64 {422 ; PIC: $sp_64 = DADDiu $sp_64, 16423 ; PIC: }424 ; PIC: bb.3.if.then:425 ; PIC: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at426 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0 {427 ; PIC: renamable $v0 = ADDiu $zero, 1428 ; PIC: }429 ; PIC: bb.4:430 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0 {431 ; PIC: renamable $v0 = ADDiu $zero, 0432 ; PIC: }433 bb.0.entry:434 successors: %bb.1(0x40000000), %bb.2(0x40000000)435 liveins: $a0_64, $a1_64436 437 renamable $w0 = LDI_B 0438 renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a0_64, 0439 renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 1440 renamable $w0 = SHF_H killed renamable $w0, 27441 BZ_H killed renamable $w0, %bb.2, implicit-def dead $at442 443 bb.1.if.then:444 INLINEASM &".space 810680", 1, 12, implicit-def dead early-clobber $at445 renamable $v0 = ADDiu $zero, 1446 PseudoReturn64 undef $ra_64, implicit killed $v0447 448 bb.2:449 renamable $v0 = ADDiu $zero, 0450 PseudoReturn64 undef $ra_64, implicit killed $v0451 452...453---454name: _Z5bz_32Dv4_i455alignment: 8456exposesReturnsTwice: false457legalized: false458regBankSelected: false459selected: false460failedISel: false461tracksRegLiveness: true462registers:463liveins:464 - { reg: '$a0_64', virtual-reg: '' }465 - { reg: '$a1_64', virtual-reg: '' }466frameInfo:467 isFrameAddressTaken: false468 isReturnAddressTaken: false469 hasStackMap: false470 hasPatchPoint: false471 stackSize: 0472 offsetAdjustment: 0473 maxAlignment: 1474 adjustsStack: false475 hasCalls: false476 stackProtector: ''477 maxCallFrameSize: 0478 hasOpaqueSPAdjustment: false479 hasVAStart: false480 hasMustTailInVarArgFunc: false481 localFrameSize: 0482 savePoint: []483 restorePoint: []484fixedStack:485stack:486constants:487body: |488 ; MSA-LABEL: name: _Z5bz_32Dv4_i489 ; MSA: bb.0.entry:490 ; MSA: successors: %bb.2(0x40000000), %bb.1(0x40000000)491 ; MSA: renamable $w0 = LDI_B 0492 ; MSA: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a0_64, 0493 ; MSA: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 1494 ; MSA: renamable $w0 = SHF_W killed renamable $w0, 177495 ; MSA: BNZ_W $w0, %bb.2, implicit-def $at {496 ; MSA: $zero = SLL $zero, 0497 ; MSA: }498 ; MSA: bb.1.entry:499 ; MSA: successors: %bb.3(0x80000000)500 ; MSA: J %bb.3, implicit-def $at {501 ; MSA: $zero = SLL $zero, 0502 ; MSA: }503 ; MSA: bb.2.if.then:504 ; MSA: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at505 ; MSA: PseudoReturn64 undef $ra_64, implicit killed $v0 {506 ; MSA: renamable $v0 = ADDiu $zero, 1507 ; MSA: }508 ; MSA: bb.3:509 ; MSA: PseudoReturn64 undef $ra_64, implicit killed $v0 {510 ; MSA: renamable $v0 = ADDiu $zero, 0511 ; MSA: }512 ; PIC-LABEL: name: _Z5bz_32Dv4_i513 ; PIC: bb.0.entry:514 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)515 ; PIC: renamable $w0 = LDI_B 0516 ; PIC: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a0_64, 0517 ; PIC: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 1518 ; PIC: renamable $w0 = SHF_W killed renamable $w0, 177519 ; PIC: BNZ_W $w0, %bb.3, implicit-def $at {520 ; PIC: $zero = SLL $zero, 0521 ; PIC: }522 ; PIC: bb.1.entry:523 ; PIC: successors: %bb.2(0x80000000)524 ; PIC: $sp_64 = DADDiu $sp_64, -16525 ; PIC: SD $ra_64, $sp_64, 0526 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.2527 ; PIC: $at_64 = DSLL $at_64, 16528 ; PIC: BAL_BR %bb.2, implicit-def $ra {529 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.2530 ; PIC: }531 ; PIC: bb.2.entry:532 ; PIC: successors: %bb.4(0x80000000)533 ; PIC: $at_64 = DADDu $ra_64, $at_64534 ; PIC: $ra_64 = LD $sp_64, 0535 ; PIC: JR64 $at_64 {536 ; PIC: $sp_64 = DADDiu $sp_64, 16537 ; PIC: }538 ; PIC: bb.3.if.then:539 ; PIC: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at540 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0 {541 ; PIC: renamable $v0 = ADDiu $zero, 1542 ; PIC: }543 ; PIC: bb.4:544 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0 {545 ; PIC: renamable $v0 = ADDiu $zero, 0546 ; PIC: }547 bb.0.entry:548 successors: %bb.1(0x40000000), %bb.2(0x40000000)549 liveins: $a0_64, $a1_64550 551 renamable $w0 = LDI_B 0552 renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a0_64, 0553 renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 1554 renamable $w0 = SHF_W killed renamable $w0, 177555 BZ_W killed renamable $w0, %bb.2, implicit-def dead $at556 557 bb.1.if.then:558 INLINEASM &".space 810680", 1, 12, implicit-def dead early-clobber $at559 renamable $v0 = ADDiu $zero, 1560 PseudoReturn64 undef $ra_64, implicit killed $v0561 562 bb.2:563 renamable $v0 = ADDiu $zero, 0564 PseudoReturn64 undef $ra_64, implicit killed $v0565 566...567---568name: _Z5bz_64Dv2_x569alignment: 8570exposesReturnsTwice: false571legalized: false572regBankSelected: false573selected: false574failedISel: false575tracksRegLiveness: true576registers:577liveins:578 - { reg: '$a0_64', virtual-reg: '' }579 - { reg: '$a1_64', virtual-reg: '' }580frameInfo:581 isFrameAddressTaken: false582 isReturnAddressTaken: false583 hasStackMap: false584 hasPatchPoint: false585 stackSize: 0586 offsetAdjustment: 0587 maxAlignment: 1588 adjustsStack: false589 hasCalls: false590 stackProtector: ''591 maxCallFrameSize: 0592 hasOpaqueSPAdjustment: false593 hasVAStart: false594 hasMustTailInVarArgFunc: false595 localFrameSize: 0596 savePoint: []597 restorePoint: []598fixedStack:599stack:600constants:601body: |602 ; MSA-LABEL: name: _Z5bz_64Dv2_x603 ; MSA: bb.0.entry:604 ; MSA: successors: %bb.2(0x40000000), %bb.1(0x40000000)605 ; MSA: renamable $w0 = LDI_B 0606 ; MSA: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a0_64, 0607 ; MSA: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 1608 ; MSA: BNZ_D $w0, %bb.2, implicit-def $at {609 ; MSA: $zero = SLL $zero, 0610 ; MSA: }611 ; MSA: bb.1.entry:612 ; MSA: successors: %bb.3(0x80000000)613 ; MSA: J %bb.3, implicit-def $at {614 ; MSA: $zero = SLL $zero, 0615 ; MSA: }616 ; MSA: bb.2.if.then:617 ; MSA: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at618 ; MSA: PseudoReturn64 undef $ra_64, implicit killed $v0 {619 ; MSA: renamable $v0 = ADDiu $zero, 1620 ; MSA: }621 ; MSA: bb.3:622 ; MSA: PseudoReturn64 undef $ra_64, implicit killed $v0 {623 ; MSA: renamable $v0 = ADDiu $zero, 0624 ; MSA: }625 ; PIC-LABEL: name: _Z5bz_64Dv2_x626 ; PIC: bb.0.entry:627 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)628 ; PIC: renamable $w0 = LDI_B 0629 ; PIC: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a0_64, 0630 ; PIC: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 1631 ; PIC: BNZ_D $w0, %bb.3, implicit-def $at {632 ; PIC: $zero = SLL $zero, 0633 ; PIC: }634 ; PIC: bb.1.entry:635 ; PIC: successors: %bb.2(0x80000000)636 ; PIC: $sp_64 = DADDiu $sp_64, -16637 ; PIC: SD $ra_64, $sp_64, 0638 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.2639 ; PIC: $at_64 = DSLL $at_64, 16640 ; PIC: BAL_BR %bb.2, implicit-def $ra {641 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.2642 ; PIC: }643 ; PIC: bb.2.entry:644 ; PIC: successors: %bb.4(0x80000000)645 ; PIC: $at_64 = DADDu $ra_64, $at_64646 ; PIC: $ra_64 = LD $sp_64, 0647 ; PIC: JR64 $at_64 {648 ; PIC: $sp_64 = DADDiu $sp_64, 16649 ; PIC: }650 ; PIC: bb.3.if.then:651 ; PIC: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at652 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0 {653 ; PIC: renamable $v0 = ADDiu $zero, 1654 ; PIC: }655 ; PIC: bb.4:656 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0 {657 ; PIC: renamable $v0 = ADDiu $zero, 0658 ; PIC: }659 bb.0.entry:660 successors: %bb.1(0x40000000), %bb.2(0x40000000)661 liveins: $a0_64, $a1_64662 663 renamable $w0 = LDI_B 0664 renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a0_64, 0665 renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 1666 BZ_D killed renamable $w0, %bb.2, implicit-def dead $at667 668 bb.1.if.then:669 INLINEASM &".space 810680", 1, 12, implicit-def dead early-clobber $at670 renamable $v0 = ADDiu $zero, 1671 PseudoReturn64 undef $ra_64, implicit killed $v0672 673 bb.2:674 renamable $v0 = ADDiu $zero, 0675 PseudoReturn64 undef $ra_64, implicit killed $v0676 677...678---679name: _Z5bz_64_vDv2_x680alignment: 8681exposesReturnsTwice: false682legalized: false683regBankSelected: false684selected: false685failedISel: false686tracksRegLiveness: true687registers:688liveins:689 - { reg: '$a0_64', virtual-reg: '' }690 - { reg: '$a1_64', virtual-reg: '' }691frameInfo:692 isFrameAddressTaken: false693 isReturnAddressTaken: false694 hasStackMap: false695 hasPatchPoint: false696 stackSize: 0697 offsetAdjustment: 0698 maxAlignment: 1699 adjustsStack: false700 hasCalls: false701 stackProtector: ''702 maxCallFrameSize: 0703 hasOpaqueSPAdjustment: false704 hasVAStart: false705 hasMustTailInVarArgFunc: false706 localFrameSize: 0707 savePoint: []708 restorePoint: []709fixedStack:710stack:711constants:712body: |713 ; MSA-LABEL: name: _Z5bz_64_vDv2_x714 ; MSA: bb.0.entry:715 ; MSA: successors: %bb.2(0x40000000), %bb.1(0x40000000)716 ; MSA: renamable $w0 = LDI_B 0717 ; MSA: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a0_64, 0718 ; MSA: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 1719 ; MSA: BNZ_V $w0, %bb.2, implicit-def $at {720 ; MSA: $zero = SLL $zero, 0721 ; MSA: }722 ; MSA: bb.1.entry:723 ; MSA: successors: %bb.3(0x80000000)724 ; MSA: J %bb.3, implicit-def $at {725 ; MSA: $zero = SLL $zero, 0726 ; MSA: }727 ; MSA: bb.2.if.then:728 ; MSA: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at729 ; MSA: PseudoReturn64 undef $ra_64, implicit killed $v0 {730 ; MSA: renamable $v0 = ADDiu $zero, 1731 ; MSA: }732 ; MSA: bb.3:733 ; MSA: PseudoReturn64 undef $ra_64, implicit killed $v0 {734 ; MSA: renamable $v0 = ADDiu $zero, 0735 ; MSA: }736 ; PIC-LABEL: name: _Z5bz_64_vDv2_x737 ; PIC: bb.0.entry:738 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)739 ; PIC: renamable $w0 = LDI_B 0740 ; PIC: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a0_64, 0741 ; PIC: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 1742 ; PIC: BNZ_V $w0, %bb.3, implicit-def $at {743 ; PIC: $zero = SLL $zero, 0744 ; PIC: }745 ; PIC: bb.1.entry:746 ; PIC: successors: %bb.2(0x80000000)747 ; PIC: $sp_64 = DADDiu $sp_64, -16748 ; PIC: SD $ra_64, $sp_64, 0749 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.2750 ; PIC: $at_64 = DSLL $at_64, 16751 ; PIC: BAL_BR %bb.2, implicit-def $ra {752 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.2753 ; PIC: }754 ; PIC: bb.2.entry:755 ; PIC: successors: %bb.4(0x80000000)756 ; PIC: $at_64 = DADDu $ra_64, $at_64757 ; PIC: $ra_64 = LD $sp_64, 0758 ; PIC: JR64 $at_64 {759 ; PIC: $sp_64 = DADDiu $sp_64, 16760 ; PIC: }761 ; PIC: bb.3.if.then:762 ; PIC: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at763 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0 {764 ; PIC: renamable $v0 = ADDiu $zero, 1765 ; PIC: }766 ; PIC: bb.4:767 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0 {768 ; PIC: renamable $v0 = ADDiu $zero, 0769 ; PIC: }770 bb.0.entry:771 successors: %bb.1(0x40000000), %bb.2(0x40000000)772 liveins: $a0_64, $a1_64773 774 renamable $w0 = LDI_B 0775 renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a0_64, 0776 renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 1777 BZ_V killed renamable $w0, %bb.2, implicit-def dead $at778 779 bb.1.if.then:780 INLINEASM &".space 810680", 1, 12, implicit-def dead early-clobber $at781 renamable $v0 = ADDiu $zero, 1782 PseudoReturn64 undef $ra_64, implicit killed $v0783 784 bb.2:785 renamable $v0 = ADDiu $zero, 0786 PseudoReturn64 undef $ra_64, implicit killed $v0787 788...789---790name: _Z5bnz_8Dv16_a791alignment: 8792exposesReturnsTwice: false793legalized: false794regBankSelected: false795selected: false796failedISel: false797tracksRegLiveness: true798registers:799liveins:800 - { reg: '$a0_64', virtual-reg: '' }801 - { reg: '$a1_64', virtual-reg: '' }802frameInfo:803 isFrameAddressTaken: false804 isReturnAddressTaken: false805 hasStackMap: false806 hasPatchPoint: false807 stackSize: 0808 offsetAdjustment: 0809 maxAlignment: 1810 adjustsStack: false811 hasCalls: false812 stackProtector: ''813 maxCallFrameSize: 0814 hasOpaqueSPAdjustment: false815 hasVAStart: false816 hasMustTailInVarArgFunc: false817 localFrameSize: 0818 savePoint: []819 restorePoint: []820fixedStack:821stack:822constants:823body: |824 ; MSA-LABEL: name: _Z5bnz_8Dv16_a825 ; MSA: bb.0.entry:826 ; MSA: successors: %bb.2(0x40000000), %bb.1(0x40000000)827 ; MSA: renamable $w0 = LDI_B 0828 ; MSA: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a0_64, 0829 ; MSA: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 1830 ; MSA: renamable $w0 = SHF_B killed renamable $w0, 27831 ; MSA: renamable $w0 = SHF_W killed renamable $w0, 177832 ; MSA: BZ_B $w0, %bb.2, implicit-def $at {833 ; MSA: $zero = SLL $zero, 0834 ; MSA: }835 ; MSA: bb.1.entry:836 ; MSA: successors: %bb.3(0x80000000)837 ; MSA: J %bb.3, implicit-def $at {838 ; MSA: $zero = SLL $zero, 0839 ; MSA: }840 ; MSA: bb.2.if.then:841 ; MSA: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at842 ; MSA: PseudoReturn64 undef $ra_64, implicit killed $v0 {843 ; MSA: renamable $v0 = ADDiu $zero, 1844 ; MSA: }845 ; MSA: bb.3:846 ; MSA: PseudoReturn64 undef $ra_64, implicit killed $v0 {847 ; MSA: renamable $v0 = ADDiu $zero, 0848 ; MSA: }849 ; PIC-LABEL: name: _Z5bnz_8Dv16_a850 ; PIC: bb.0.entry:851 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)852 ; PIC: renamable $w0 = LDI_B 0853 ; PIC: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a0_64, 0854 ; PIC: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 1855 ; PIC: renamable $w0 = SHF_B killed renamable $w0, 27856 ; PIC: renamable $w0 = SHF_W killed renamable $w0, 177857 ; PIC: BZ_B $w0, %bb.3, implicit-def $at {858 ; PIC: $zero = SLL $zero, 0859 ; PIC: }860 ; PIC: bb.1.entry:861 ; PIC: successors: %bb.2(0x80000000)862 ; PIC: $sp_64 = DADDiu $sp_64, -16863 ; PIC: SD $ra_64, $sp_64, 0864 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.2865 ; PIC: $at_64 = DSLL $at_64, 16866 ; PIC: BAL_BR %bb.2, implicit-def $ra {867 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.2868 ; PIC: }869 ; PIC: bb.2.entry:870 ; PIC: successors: %bb.4(0x80000000)871 ; PIC: $at_64 = DADDu $ra_64, $at_64872 ; PIC: $ra_64 = LD $sp_64, 0873 ; PIC: JR64 $at_64 {874 ; PIC: $sp_64 = DADDiu $sp_64, 16875 ; PIC: }876 ; PIC: bb.3.if.then:877 ; PIC: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at878 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0 {879 ; PIC: renamable $v0 = ADDiu $zero, 1880 ; PIC: }881 ; PIC: bb.4:882 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0 {883 ; PIC: renamable $v0 = ADDiu $zero, 0884 ; PIC: }885 bb.0.entry:886 successors: %bb.1(0x40000000), %bb.2(0x40000000)887 liveins: $a0_64, $a1_64888 889 renamable $w0 = LDI_B 0890 renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a0_64, 0891 renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 1892 renamable $w0 = SHF_B killed renamable $w0, 27893 renamable $w0 = SHF_W killed renamable $w0, 177894 BNZ_B killed renamable $w0, %bb.2, implicit-def dead $at895 896 bb.1.if.then:897 INLINEASM &".space 810680", 1, 12, implicit-def dead early-clobber $at898 renamable $v0 = ADDiu $zero, 1899 PseudoReturn64 undef $ra_64, implicit killed $v0900 901 bb.2:902 renamable $v0 = ADDiu $zero, 0903 PseudoReturn64 undef $ra_64, implicit killed $v0904 905...906---907name: _Z6bnz_16Dv8_s908alignment: 8909exposesReturnsTwice: false910legalized: false911regBankSelected: false912selected: false913failedISel: false914tracksRegLiveness: true915registers:916liveins:917 - { reg: '$a0_64', virtual-reg: '' }918 - { reg: '$a1_64', virtual-reg: '' }919frameInfo:920 isFrameAddressTaken: false921 isReturnAddressTaken: false922 hasStackMap: false923 hasPatchPoint: false924 stackSize: 0925 offsetAdjustment: 0926 maxAlignment: 1927 adjustsStack: false928 hasCalls: false929 stackProtector: ''930 maxCallFrameSize: 0931 hasOpaqueSPAdjustment: false932 hasVAStart: false933 hasMustTailInVarArgFunc: false934 localFrameSize: 0935 savePoint: []936 restorePoint: []937fixedStack:938stack:939constants:940body: |941 ; MSA-LABEL: name: _Z6bnz_16Dv8_s942 ; MSA: bb.0.entry:943 ; MSA: successors: %bb.2(0x40000000), %bb.1(0x40000000)944 ; MSA: renamable $w0 = LDI_B 0945 ; MSA: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a0_64, 0946 ; MSA: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 1947 ; MSA: renamable $w0 = SHF_H killed renamable $w0, 27948 ; MSA: BZ_H $w0, %bb.2, implicit-def $at {949 ; MSA: $zero = SLL $zero, 0950 ; MSA: }951 ; MSA: bb.1.entry:952 ; MSA: successors: %bb.3(0x80000000)953 ; MSA: J %bb.3, implicit-def $at {954 ; MSA: $zero = SLL $zero, 0955 ; MSA: }956 ; MSA: bb.2.if.then:957 ; MSA: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at958 ; MSA: PseudoReturn64 undef $ra_64, implicit killed $v0 {959 ; MSA: renamable $v0 = ADDiu $zero, 1960 ; MSA: }961 ; MSA: bb.3:962 ; MSA: PseudoReturn64 undef $ra_64, implicit killed $v0 {963 ; MSA: renamable $v0 = ADDiu $zero, 0964 ; MSA: }965 ; PIC-LABEL: name: _Z6bnz_16Dv8_s966 ; PIC: bb.0.entry:967 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)968 ; PIC: renamable $w0 = LDI_B 0969 ; PIC: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a0_64, 0970 ; PIC: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 1971 ; PIC: renamable $w0 = SHF_H killed renamable $w0, 27972 ; PIC: BZ_H $w0, %bb.3, implicit-def $at {973 ; PIC: $zero = SLL $zero, 0974 ; PIC: }975 ; PIC: bb.1.entry:976 ; PIC: successors: %bb.2(0x80000000)977 ; PIC: $sp_64 = DADDiu $sp_64, -16978 ; PIC: SD $ra_64, $sp_64, 0979 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.2980 ; PIC: $at_64 = DSLL $at_64, 16981 ; PIC: BAL_BR %bb.2, implicit-def $ra {982 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.2983 ; PIC: }984 ; PIC: bb.2.entry:985 ; PIC: successors: %bb.4(0x80000000)986 ; PIC: $at_64 = DADDu $ra_64, $at_64987 ; PIC: $ra_64 = LD $sp_64, 0988 ; PIC: JR64 $at_64 {989 ; PIC: $sp_64 = DADDiu $sp_64, 16990 ; PIC: }991 ; PIC: bb.3.if.then:992 ; PIC: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at993 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0 {994 ; PIC: renamable $v0 = ADDiu $zero, 1995 ; PIC: }996 ; PIC: bb.4:997 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0 {998 ; PIC: renamable $v0 = ADDiu $zero, 0999 ; PIC: }1000 bb.0.entry:1001 successors: %bb.1(0x40000000), %bb.2(0x40000000)1002 liveins: $a0_64, $a1_641003 1004 renamable $w0 = LDI_B 01005 renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a0_64, 01006 renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 11007 renamable $w0 = SHF_H killed renamable $w0, 271008 BNZ_H killed renamable $w0, %bb.2, implicit-def dead $at1009 1010 bb.1.if.then:1011 INLINEASM &".space 810680", 1, 12, implicit-def dead early-clobber $at1012 renamable $v0 = ADDiu $zero, 11013 PseudoReturn64 undef $ra_64, implicit killed $v01014 1015 bb.2:1016 renamable $v0 = ADDiu $zero, 01017 PseudoReturn64 undef $ra_64, implicit killed $v01018 1019...1020---1021name: _Z6bnz_32Dv4_i1022alignment: 81023exposesReturnsTwice: false1024legalized: false1025regBankSelected: false1026selected: false1027failedISel: false1028tracksRegLiveness: true1029registers:1030liveins:1031 - { reg: '$a0_64', virtual-reg: '' }1032 - { reg: '$a1_64', virtual-reg: '' }1033frameInfo:1034 isFrameAddressTaken: false1035 isReturnAddressTaken: false1036 hasStackMap: false1037 hasPatchPoint: false1038 stackSize: 01039 offsetAdjustment: 01040 maxAlignment: 11041 adjustsStack: false1042 hasCalls: false1043 stackProtector: ''1044 maxCallFrameSize: 01045 hasOpaqueSPAdjustment: false1046 hasVAStart: false1047 hasMustTailInVarArgFunc: false1048 localFrameSize: 01049 savePoint: []1050 restorePoint: []1051fixedStack:1052stack:1053constants:1054body: |1055 ; MSA-LABEL: name: _Z6bnz_32Dv4_i1056 ; MSA: bb.0.entry:1057 ; MSA: successors: %bb.2(0x40000000), %bb.1(0x40000000)1058 ; MSA: renamable $w0 = LDI_B 01059 ; MSA: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a0_64, 01060 ; MSA: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 11061 ; MSA: renamable $w0 = SHF_W killed renamable $w0, 1771062 ; MSA: BZ_W $w0, %bb.2, implicit-def $at {1063 ; MSA: $zero = SLL $zero, 01064 ; MSA: }1065 ; MSA: bb.1.entry:1066 ; MSA: successors: %bb.3(0x80000000)1067 ; MSA: J %bb.3, implicit-def $at {1068 ; MSA: $zero = SLL $zero, 01069 ; MSA: }1070 ; MSA: bb.2.if.then:1071 ; MSA: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at1072 ; MSA: PseudoReturn64 undef $ra_64, implicit killed $v0 {1073 ; MSA: renamable $v0 = ADDiu $zero, 11074 ; MSA: }1075 ; MSA: bb.3:1076 ; MSA: PseudoReturn64 undef $ra_64, implicit killed $v0 {1077 ; MSA: renamable $v0 = ADDiu $zero, 01078 ; MSA: }1079 ; PIC-LABEL: name: _Z6bnz_32Dv4_i1080 ; PIC: bb.0.entry:1081 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)1082 ; PIC: renamable $w0 = LDI_B 01083 ; PIC: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a0_64, 01084 ; PIC: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 11085 ; PIC: renamable $w0 = SHF_W killed renamable $w0, 1771086 ; PIC: BZ_W $w0, %bb.3, implicit-def $at {1087 ; PIC: $zero = SLL $zero, 01088 ; PIC: }1089 ; PIC: bb.1.entry:1090 ; PIC: successors: %bb.2(0x80000000)1091 ; PIC: $sp_64 = DADDiu $sp_64, -161092 ; PIC: SD $ra_64, $sp_64, 01093 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.21094 ; PIC: $at_64 = DSLL $at_64, 161095 ; PIC: BAL_BR %bb.2, implicit-def $ra {1096 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.21097 ; PIC: }1098 ; PIC: bb.2.entry:1099 ; PIC: successors: %bb.4(0x80000000)1100 ; PIC: $at_64 = DADDu $ra_64, $at_641101 ; PIC: $ra_64 = LD $sp_64, 01102 ; PIC: JR64 $at_64 {1103 ; PIC: $sp_64 = DADDiu $sp_64, 161104 ; PIC: }1105 ; PIC: bb.3.if.then:1106 ; PIC: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at1107 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0 {1108 ; PIC: renamable $v0 = ADDiu $zero, 11109 ; PIC: }1110 ; PIC: bb.4:1111 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0 {1112 ; PIC: renamable $v0 = ADDiu $zero, 01113 ; PIC: }1114 bb.0.entry:1115 successors: %bb.1(0x40000000), %bb.2(0x40000000)1116 liveins: $a0_64, $a1_641117 1118 renamable $w0 = LDI_B 01119 renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a0_64, 01120 renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 11121 renamable $w0 = SHF_W killed renamable $w0, 1771122 BNZ_W killed renamable $w0, %bb.2, implicit-def dead $at1123 1124 bb.1.if.then:1125 INLINEASM &".space 810680", 1, 12, implicit-def dead early-clobber $at1126 renamable $v0 = ADDiu $zero, 11127 PseudoReturn64 undef $ra_64, implicit killed $v01128 1129 bb.2:1130 renamable $v0 = ADDiu $zero, 01131 PseudoReturn64 undef $ra_64, implicit killed $v01132 1133...1134---1135name: _Z6bnz_64Dv2_x1136alignment: 81137exposesReturnsTwice: false1138legalized: false1139regBankSelected: false1140selected: false1141failedISel: false1142tracksRegLiveness: true1143registers:1144liveins:1145 - { reg: '$a0_64', virtual-reg: '' }1146 - { reg: '$a1_64', virtual-reg: '' }1147frameInfo:1148 isFrameAddressTaken: false1149 isReturnAddressTaken: false1150 hasStackMap: false1151 hasPatchPoint: false1152 stackSize: 01153 offsetAdjustment: 01154 maxAlignment: 11155 adjustsStack: false1156 hasCalls: false1157 stackProtector: ''1158 maxCallFrameSize: 01159 hasOpaqueSPAdjustment: false1160 hasVAStart: false1161 hasMustTailInVarArgFunc: false1162 localFrameSize: 01163 savePoint: []1164 restorePoint: []1165fixedStack:1166stack:1167constants:1168body: |1169 ; MSA-LABEL: name: _Z6bnz_64Dv2_x1170 ; MSA: bb.0.entry:1171 ; MSA: successors: %bb.2(0x40000000), %bb.1(0x40000000)1172 ; MSA: renamable $w0 = LDI_B 01173 ; MSA: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a0_64, 01174 ; MSA: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 11175 ; MSA: BZ_D $w0, %bb.2, implicit-def $at {1176 ; MSA: $zero = SLL $zero, 01177 ; MSA: }1178 ; MSA: bb.1.entry:1179 ; MSA: successors: %bb.3(0x80000000)1180 ; MSA: J %bb.3, implicit-def $at {1181 ; MSA: $zero = SLL $zero, 01182 ; MSA: }1183 ; MSA: bb.2.if.then:1184 ; MSA: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at1185 ; MSA: PseudoReturn64 undef $ra_64, implicit killed $v0 {1186 ; MSA: renamable $v0 = ADDiu $zero, 11187 ; MSA: }1188 ; MSA: bb.3:1189 ; MSA: PseudoReturn64 undef $ra_64, implicit killed $v0 {1190 ; MSA: renamable $v0 = ADDiu $zero, 01191 ; MSA: }1192 ; PIC-LABEL: name: _Z6bnz_64Dv2_x1193 ; PIC: bb.0.entry:1194 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)1195 ; PIC: renamable $w0 = LDI_B 01196 ; PIC: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a0_64, 01197 ; PIC: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 11198 ; PIC: BZ_D $w0, %bb.3, implicit-def $at {1199 ; PIC: $zero = SLL $zero, 01200 ; PIC: }1201 ; PIC: bb.1.entry:1202 ; PIC: successors: %bb.2(0x80000000)1203 ; PIC: $sp_64 = DADDiu $sp_64, -161204 ; PIC: SD $ra_64, $sp_64, 01205 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.21206 ; PIC: $at_64 = DSLL $at_64, 161207 ; PIC: BAL_BR %bb.2, implicit-def $ra {1208 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.21209 ; PIC: }1210 ; PIC: bb.2.entry:1211 ; PIC: successors: %bb.4(0x80000000)1212 ; PIC: $at_64 = DADDu $ra_64, $at_641213 ; PIC: $ra_64 = LD $sp_64, 01214 ; PIC: JR64 $at_64 {1215 ; PIC: $sp_64 = DADDiu $sp_64, 161216 ; PIC: }1217 ; PIC: bb.3.if.then:1218 ; PIC: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at1219 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0 {1220 ; PIC: renamable $v0 = ADDiu $zero, 11221 ; PIC: }1222 ; PIC: bb.4:1223 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0 {1224 ; PIC: renamable $v0 = ADDiu $zero, 01225 ; PIC: }1226 bb.0.entry:1227 successors: %bb.1(0x40000000), %bb.2(0x40000000)1228 liveins: $a0_64, $a1_641229 1230 renamable $w0 = LDI_B 01231 renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a0_64, 01232 renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 11233 BNZ_D killed renamable $w0, %bb.2, implicit-def dead $at1234 1235 bb.1.if.then:1236 INLINEASM &".space 810680", 1, 12, implicit-def dead early-clobber $at1237 renamable $v0 = ADDiu $zero, 11238 PseudoReturn64 undef $ra_64, implicit killed $v01239 1240 bb.2:1241 renamable $v0 = ADDiu $zero, 01242 PseudoReturn64 undef $ra_64, implicit killed $v01243 1244...1245---1246name: _Z6bnz_64_vDv2_x1247alignment: 81248exposesReturnsTwice: false1249legalized: false1250regBankSelected: false1251selected: false1252failedISel: false1253tracksRegLiveness: true1254registers:1255liveins:1256 - { reg: '$a0_64', virtual-reg: '' }1257 - { reg: '$a1_64', virtual-reg: '' }1258frameInfo:1259 isFrameAddressTaken: false1260 isReturnAddressTaken: false1261 hasStackMap: false1262 hasPatchPoint: false1263 stackSize: 01264 offsetAdjustment: 01265 maxAlignment: 11266 adjustsStack: false1267 hasCalls: false1268 stackProtector: ''1269 maxCallFrameSize: 01270 hasOpaqueSPAdjustment: false1271 hasVAStart: false1272 hasMustTailInVarArgFunc: false1273 localFrameSize: 01274 savePoint: []1275 restorePoint: []1276fixedStack:1277stack:1278constants:1279body: |1280 ; MSA-LABEL: name: _Z6bnz_64_vDv2_x1281 ; MSA: bb.0.entry:1282 ; MSA: successors: %bb.2(0x40000000), %bb.1(0x40000000)1283 ; MSA: renamable $w0 = LDI_B 01284 ; MSA: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a0_64, 01285 ; MSA: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 11286 ; MSA: BZ_V $w0, %bb.2, implicit-def $at {1287 ; MSA: $zero = SLL $zero, 01288 ; MSA: }1289 ; MSA: bb.1.entry:1290 ; MSA: successors: %bb.3(0x80000000)1291 ; MSA: J %bb.3, implicit-def $at {1292 ; MSA: $zero = SLL $zero, 01293 ; MSA: }1294 ; MSA: bb.2.if.then:1295 ; MSA: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at1296 ; MSA: PseudoReturn64 undef $ra_64, implicit killed $v0 {1297 ; MSA: renamable $v0 = ADDiu $zero, 11298 ; MSA: }1299 ; MSA: bb.3:1300 ; MSA: PseudoReturn64 undef $ra_64, implicit killed $v0 {1301 ; MSA: renamable $v0 = ADDiu $zero, 01302 ; MSA: }1303 ; PIC-LABEL: name: _Z6bnz_64_vDv2_x1304 ; PIC: bb.0.entry:1305 ; PIC: successors: %bb.3(0x40000000), %bb.1(0x40000000)1306 ; PIC: renamable $w0 = LDI_B 01307 ; PIC: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a0_64, 01308 ; PIC: renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 11309 ; PIC: BZ_V $w0, %bb.3, implicit-def $at {1310 ; PIC: $zero = SLL $zero, 01311 ; PIC: }1312 ; PIC: bb.1.entry:1313 ; PIC: successors: %bb.2(0x80000000)1314 ; PIC: $sp_64 = DADDiu $sp_64, -161315 ; PIC: SD $ra_64, $sp_64, 01316 ; PIC: $at_64 = LONG_BRANCH_DADDiu $zero_64, target-flags(mips-abs-hi) %bb.4, %bb.21317 ; PIC: $at_64 = DSLL $at_64, 161318 ; PIC: BAL_BR %bb.2, implicit-def $ra {1319 ; PIC: $at_64 = LONG_BRANCH_DADDiu $at_64, target-flags(mips-abs-lo) %bb.4, %bb.21320 ; PIC: }1321 ; PIC: bb.2.entry:1322 ; PIC: successors: %bb.4(0x80000000)1323 ; PIC: $at_64 = DADDu $ra_64, $at_641324 ; PIC: $ra_64 = LD $sp_64, 01325 ; PIC: JR64 $at_64 {1326 ; PIC: $sp_64 = DADDiu $sp_64, 161327 ; PIC: }1328 ; PIC: bb.3.if.then:1329 ; PIC: INLINEASM &".space 810680", 1 /* sideeffect attdialect */, 12 /* clobber */, implicit-def dead early-clobber $at1330 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0 {1331 ; PIC: renamable $v0 = ADDiu $zero, 11332 ; PIC: }1333 ; PIC: bb.4:1334 ; PIC: PseudoReturn64 undef $ra_64, implicit killed $v0 {1335 ; PIC: renamable $v0 = ADDiu $zero, 01336 ; PIC: }1337 bb.0.entry:1338 successors: %bb.1(0x40000000), %bb.2(0x40000000)1339 liveins: $a0_64, $a1_641340 1341 renamable $w0 = LDI_B 01342 renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a0_64, 01343 renamable $w0 = INSERT_D killed renamable $w0, killed renamable $a1_64, 11344 BNZ_V killed renamable $w0, %bb.2, implicit-def dead $at1345 1346 bb.1.if.then:1347 INLINEASM &".space 810680", 1, 12, implicit-def dead early-clobber $at1348 renamable $v0 = ADDiu $zero, 11349 PseudoReturn64 undef $ra_64, implicit killed $v01350 1351 bb.2:1352 renamable $v0 = ADDiu $zero, 01353 PseudoReturn64 undef $ra_64, implicit killed $v01354 1355...1356