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1; RUN: llc < %s -mtriple=mips -mcpu=mips32r6 -force-mips-long-branch | FileCheck %s2 3; Check that when MIPS32R6 with the static relocation model with the usage of4; long branches, that there is a nop between any compact branch and the static5; relocation method of expanding branches. Previously, it could result in 'j'6; following a b(ne|eq)zc, which would raise a reserved instruction exception.7 8declare i32 @f(i32)9 10declare i32 @g()11 12; CHECK-LABEL: test1:13; CHECK: bnezc14; CHECK-NEXT: nop15 16define i32 @test1(i32 %a) {17entry:18 %0 = icmp eq i32 %a, 019 br i1 %0, label %cond.true, label %cond.false20cond.true:21 %1 = call i32 @f(i32 %a)22 ret i32 %123cond.false:24 %2 = call i32 @g()25 ret i32 %226}27 28; CHECK-LABEL: test2:29; CHECK: bgezc30; CHECK-NEXT: nop31 32define i32 @test2(i32 %a) {33entry:34 %0 = icmp sge i32 %a, 035 br i1 %0, label %cond.true, label %cond.false36cond.true:37 %1 = call i32 @f(i32 %a)38 ret i32 %139cond.false:40 %2 = call i32 @g()41 ret i32 %242}43 44; CHECK-LABEL: test3:45; CHECK: blezc46; CHECK-NEXT: nop47 48define i32 @test3(i32 %a) {49entry:50 %0 = icmp sle i32 %a, 051 br i1 %0, label %cond.true, label %cond.false52cond.true:53 %1 = call i32 @f(i32 %a)54 ret i32 %155cond.false:56 %2 = call i32 @g()57 ret i32 %258}59 60; CHECK-LABEL: test4:61; CHECK: bgtzc62; CHECK-NEXT: nop63 64define i32 @test4(i32 %a) {65entry:66 %0 = icmp sgt i32 %a, 067 br i1 %0, label %cond.true, label %cond.false68cond.true:69 %1 = call i32 @f(i32 %a)70 ret i32 %171cond.false:72 %2 = call i32 @g()73 ret i32 %274}75 76; CHECK-LABEL: test5:77; CHECK: bgezc78; CHECK-NEXT: nop79 80define i32 @test5(i32 %a) {81entry:82 %0 = icmp slt i32 %a, 083 br i1 %0, label %cond.true, label %cond.false84cond.true:85 %1 = call i32 @f(i32 %a)86 ret i32 %187cond.false:88 %2 = call i32 @g()89 ret i32 %290}91 92; CHECK-LABEL: test6:93; CHECK: bnezc94; CHECK-NEXT: nop95 96define i32 @test6(i32 %a, i32 %b) {97entry:98 %0 = icmp ugt i32 %a, %b99 br i1 %0, label %cond.true, label %cond.false100cond.true:101 %1 = call i32 @f(i32 %a)102 ret i32 %1103cond.false:104 %2 = call i32 @g()105 ret i32 %2106}107 108; CHECK-LABEL: test7:109; CHECK: beqzc110; CHECK-NEXT: nop111 112define i32 @test7(i32 %a, i32 %b) {113entry:114 %0 = icmp uge i32 %a, %b115 br i1 %0, label %cond.true, label %cond.false116cond.true:117 %1 = call i32 @f(i32 %a)118 ret i32 %1119cond.false:120 %2 = call i32 @g()121 ret i32 %2122}123 124; CHECK-LABEL: test8:125; CHECK: bnezc126; CHECK-NEXT: nop127 128define i32 @test8(i32 %a, i32 %b) {129entry:130 %0 = icmp ult i32 %a, %b131 br i1 %0, label %cond.true, label %cond.false132cond.true:133 %1 = call i32 @f(i32 %a)134 ret i32 %1135cond.false:136 %2 = call i32 @g()137 ret i32 %2138}139 140; CHECK-LABEL: test9:141; CHECK: beqzc142; CHECK-NEXT: nop143 144define i32 @test9(i32 %a, i32 %b) {145entry:146 %0 = icmp ule i32 %a, %b147 br i1 %0, label %cond.true, label %cond.false148cond.true:149 %1 = call i32 @f(i32 %a)150 ret i32 %1151cond.false:152 %2 = call i32 @g()153 ret i32 %2154}155