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1; RUN: llc -mtriple=mips -mcpu=mips32r3 -mattr=+micromips \2; RUN: -relocation-model=pic < %s | \3; RUN: FileCheck %s -check-prefixes=MM324; RUN: llc -mtriple=mips -mcpu=mips32r6 -mattr=+micromips \5; RUN: -relocation-model=pic < %s | \6; RUN: FileCheck %s -check-prefixes=MM327 8@gf0 = external global float9 10define float @test_lwc1() {11entry:12; CHECK-LABEL: test_lwc113; MM32: lui $[[R0:[0-9]+]], %hi(_gp_disp)14; MM32: addiu $[[R1:[0-9]+]], $[[R0]], %lo(_gp_disp)15; MM32: addu $[[R2:[0-9]+]], $[[R1]], $2516; MM32: lw $[[R3:[0-9]+]], %got(gf0)($[[R2]])17; MM32: lwc1 $f0, 0($[[R3]])18 19 %0 = load float, ptr @gf0, align 420 ret float %021}22 23define void @test_swc1(float %a) {24entry:25; CHECK-LABEL: test_swc126; MM32: lui $[[R0:[0-9]+]], %hi(_gp_disp)27; MM32: addiu $[[R1:[0-9]+]], $[[R0]], %lo(_gp_disp)28; MM32: addu $[[R2:[0-9]+]], $[[R1]], $2529; MM32: lw $[[R3:[0-9]+]], %got(gf0)($[[R2]])30; MM32: swc1 $f12, 0($[[R3]])31 32 store float %a, ptr @gf0, align 433 ret void34}35 36