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1; RUN: llc < %s -mtriple=mips -mcpu=mips32r5 -mattr=+fp64,+msa | FileCheck %s2 3; Test that fexup[rl].w don't crash LLVM during type legalization.4 5@g = local_unnamed_addr global <8 x half> <half 0xH5BF8, half 0xH5BF8, half 0xH5BF8, half 0xH5BF8, half 0xH73C0, half 0xH73C0, half 0xH73C0, half 0xH73C0>, align 166@i = local_unnamed_addr global <4 x float> zeroinitializer, align 167@j = local_unnamed_addr global <4 x float> zeroinitializer, align 168 9define i32 @test() local_unnamed_addr {10entry:11 %0 = load <8 x half>, ptr @g, align 1612 %1 = tail call <4 x float> @llvm.mips.fexupl.w(<8 x half> %0)13 store <4 x float> %1, ptr @i, align 1614; CHECK: ld.h $w[[W0:[0-9]+]], 0(${{[0-9]+}})15; CHECK: fexupl.w $w[[W1:[0-9]+]], $w[[W0]]16; CHECK: st.w $w[[W1]], 0(${{[0-9]+}})17 18 %2 = tail call <4 x float> @llvm.mips.fexupr.w(<8 x half> %0)19 store <4 x float> %2, ptr @j, align 1620 21; CHECK: fexupr.w $w[[W2:[0-9]+]], $w[[W0]]22; CHECK: st.w $w[[W2]], 0(${{[0-9]+}})23 24 ret i32 025}26 27declare <4 x float> @llvm.mips.fexupl.w(<8 x half>)28declare <4 x float> @llvm.mips.fexupr.w(<8 x half>)29