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1; A basic inline assembly test2 3; RUN: llc -mtriple=mips -mattr=+msa,+fp64,+mips32r2 < %s | FileCheck %s4 5@v4i32_r = global <4 x i32> zeroinitializer, align 166 7define void @test1() nounwind {8entry:9 ; CHECK-LABEL: test1:10 %0 = call <4 x i32> asm "ldi.w ${0:w}, 1", "=f"()11 ; CHECK: ldi.w $w{{[1-3]?[0-9]}}, 112 store <4 x i32> %0, ptr @v4i32_r13 ret void14}15 16define void @test2() nounwind {17entry:18 ; CHECK-LABEL: test2:19 %0 = load <4 x i32>, ptr @v4i32_r20 %1 = call <4 x i32> asm "addvi.w ${0:w}, ${1:w}, 1", "=f,f"(<4 x i32> %0)21 ; CHECK: addvi.w $w{{[1-3]?[0-9]}}, $w{{[1-3]?[0-9]}}, 122 store <4 x i32> %1, ptr @v4i32_r23 ret void24}25 26define void @test3() nounwind {27entry:28 ; CHECK-LABEL: test3:29 %0 = load <4 x i32>, ptr @v4i32_r30 %1 = call <4 x i32> asm sideeffect "addvi.w ${0:w}, ${1:w}, 1", "=f,f,~{$w0}"(<4 x i32> %0)31 ; CHECK: addvi.w $w{{([1-9]|[1-3][0-9])}}, $w{{([1-9]|[1-3][0-9])}}, 132 store <4 x i32> %1, ptr @v4i32_r33 ret void34}35 36define dso_local double @test4(double noundef %a, double noundef %b, double noundef %c) {37entry:38 ; CHECK-LABEL: test4:39 %0 = tail call double asm sideeffect "fmadd.d ${0:w}, ${1:w}, ${2:w}", "=f,f,f,0,~{$1}"(double %b, double %c, double %a)40 ; CHECK: fmadd.d $w{{([0-9]|[1-3][0-9])}}, $w{{([0-9]|[1-3][0-9])}}, $w{{([0-9]|[1-3][0-9])}}41 ret double %042}43 44define dso_local float @test5(float noundef %a, float noundef %b, float noundef %c) {45entry:46 ; CHECK-LABEL: test5:47 %0 = tail call float asm sideeffect "fmadd.w ${0:w}, ${1:w}, ${2:w}", "=f,f,f,0,~{$1}"(float %b, float %c, float %a)48 ; CHECK: fmadd.w $w{{([0-9]|[1-3][0-9])}}, $w{{([0-9]|[1-3][0-9])}}, $w{{([0-9]|[1-3][0-9])}}49 ret float %050}51