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1; RUN: llc -mtriple=mips < %s2; RUN: llc -mtriple=mips -mattr=+msa,+fp64,+mips32r2 < %s3; RUN: llc -mtriple=mipsel < %s4; RUN: llc -mtriple=mipsel -mattr=+msa,+fp64,+mips32r2 < %s5 6; This test originally failed for MSA with a7; "Type for zero vector elements is not legal" assertion.8; It should at least successfully build.9 10define void @autogen_SD3926023935(ptr, ptr, ptr, i32, i64, i8) {11BB:12 %A4 = alloca i113 %A3 = alloca float14 %A2 = alloca double15 %A1 = alloca float16 %A = alloca double17 %L = load i8, ptr %018 store i8 -123, ptr %019 %E = extractelement <4 x i64> zeroinitializer, i32 120 %Shuff = shufflevector <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, <4 x i32> zeroinitializer, <4 x i32> <i32 0, i32 2, i32 4, i32 6>21 %I = insertelement <2 x i1> zeroinitializer, i1 false, i32 022 %BC = bitcast i64 181325 to double23 %Sl = select i1 false, <2 x i32> zeroinitializer, <2 x i32> zeroinitializer24 %Cmp = icmp ne <4 x i64> zeroinitializer, zeroinitializer25 %L5 = load i8, ptr %026 store i8 %L, ptr %027 %E6 = extractelement <4 x i64> zeroinitializer, i32 328 %Shuff7 = shufflevector <2 x i16> zeroinitializer, <2 x i16> zeroinitializer, <2 x i32> <i32 2, i32 0>29 %I8 = insertelement <8 x i64> <i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1>, i64 498254, i32 430 %B = shl i32 0, 36446431 %Sl9 = select i1 false, i64 %E, i64 49825432 %Cmp10 = icmp sge i8 -123, %533 br label %CF8034 35CF80: ; preds = %BB36 %L11 = load i8, ptr %037 store i8 -123, ptr %038 %E12 = extractelement <2 x i16> zeroinitializer, i32 139 %Shuff13 = shufflevector <4 x i64> zeroinitializer, <4 x i64> zeroinitializer, <4 x i32> <i32 0, i32 2, i32 4, i32 6>40 %I14 = insertelement <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, i32 %B, i32 241 %B15 = sdiv i64 334618, -142 %Sl16 = select i1 %Cmp10, <4 x i32> zeroinitializer, <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>43 %Cmp17 = icmp ule <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, %Sl1644 %L18 = load double, ptr %A245 store i64 498254, ptr %A446 %E19 = extractelement <4 x i64> zeroinitializer, i32 047 %Shuff20 = shufflevector <2 x i1> zeroinitializer, <2 x i1> %I, <2 x i32> <i32 3, i32 1>48 %I21 = insertelement <2 x i1> zeroinitializer, i1 false, i32 149 %B22 = fadd double 0.000000e+00, %BC50 %ZE = zext <2 x i1> %Shuff20 to <2 x i32>51 %Sl23 = select i1 %Cmp10, <2 x i1> %Shuff20, <2 x i1> zeroinitializer52 %Cmp24 = icmp ult <2 x i32> zeroinitializer, zeroinitializer53 %L25 = load i8, ptr %054 store i8 %L25, ptr %055 %E26 = extractelement <4 x i8> <i8 -1, i8 -1, i8 -1, i8 -1>, i32 356 %Shuff27 = shufflevector <4 x i32> %Shuff, <4 x i32> %I14, <4 x i32> <i32 6, i32 0, i32 undef, i32 4>57 %I28 = insertelement <4 x i32> zeroinitializer, i32 %3, i32 058 %B29 = lshr i8 %E26, -4359 %Tr = trunc i8 %L5 to i160 br label %CF7961 62CF79: ; preds = %CF8063 %Sl30 = select i1 false, i8 %B29, i8 -12364 %Cmp31 = icmp sge <2 x i1> %I, %I65 %L32 = load i64, ptr %A466 store i8 -123, ptr %067 %E33 = extractelement <8 x i64> <i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1>, i32 268 %Shuff34 = shufflevector <4 x i64> zeroinitializer, <4 x i64> %Shuff13, <4 x i32> <i32 5, i32 7, i32 1, i32 3>69 %I35 = insertelement <4 x i64> zeroinitializer, i64 498254, i32 370 %B36 = sub <8 x i64> %I8, <i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1>71 %Sl38 = select i1 %Cmp10, i8 -43, i8 %L572 %Cmp39 = icmp eq i64 498254, %B1573 br label %CF74 75CF: ; preds = %CF, %CF7976 %L40 = load double, ptr %A77 store i1 %Cmp39, ptr %078 %E41 = extractelement <4 x i64> zeroinitializer, i32 379 %Shuff42 = shufflevector <2 x i32> zeroinitializer, <2 x i32> %ZE, <2 x i32> <i32 2, i32 undef>80 %I43 = insertelement <4 x i32> %Shuff, i32 %3, i32 081 %B44 = shl i64 %E41, -182 %Se = sext <2 x i1> %I to <2 x i32>83 %Sl45 = select i1 %Cmp10, i1 false, i1 false84 br i1 %Sl45, label %CF, label %CF7785 86CF77: ; preds = %CF77, %CF87 %Cmp46 = fcmp uno double 0.000000e+00, 0.000000e+0088 br i1 %Cmp46, label %CF77, label %CF7889 90CF78: ; preds = %CF78, %CF83, %CF82, %CF7791 %L47 = load i64, ptr %A492 store i8 -123, ptr %093 %E48 = extractelement <4 x i64> zeroinitializer, i32 394 %Shuff49 = shufflevector <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, <4 x i32> zeroinitializer, <4 x i32> <i32 2, i32 4, i32 6, i32 undef>95 %I50 = insertelement <2 x i1> zeroinitializer, i1 %Cmp10, i32 096 %B51 = sdiv i64 %E19, 46313297 %Tr52 = trunc i64 %E48 to i3298 %Sl53 = select i1 %Tr, i1 %Cmp46, i1 %Cmp1099 br i1 %Sl53, label %CF78, label %CF83100 101CF83: ; preds = %CF78102 %Cmp54 = fcmp uge double %L40, %L40103 br i1 %Cmp54, label %CF78, label %CF82104 105CF82: ; preds = %CF83106 %L55 = load i64, ptr %A4107 store i64 %L32, ptr %A4108 %E56 = extractelement <2 x i16> %Shuff7, i32 1109 %Shuff57 = shufflevector <4 x i64> zeroinitializer, <4 x i64> zeroinitializer, <4 x i32> <i32 2, i32 4, i32 6, i32 0>110 %I58 = insertelement <2 x i32> %Sl, i32 %Tr52, i32 0111 %B59 = or i32 %B, %3112 %FC = sitofp i64 498254 to double113 %Sl60 = select i1 false, i64 %E6, i64 -1114 %Cmp61 = icmp sgt <4 x i32> %Shuff27, %I43115 %L62 = load i64, ptr %A4116 store i64 %Sl9, ptr %A4117 %E63 = extractelement <2 x i32> %ZE, i32 0118 %Shuff64 = shufflevector <4 x i64> zeroinitializer, <4 x i64> %Shuff13, <4 x i32> <i32 1, i32 3, i32 undef, i32 7>119 %I65 = insertelement <4 x i32> %Shuff, i32 %3, i32 3120 %B66 = sub i64 %L47, 53612121 %Tr67 = trunc i64 %4 to i32122 %Sl68 = select i1 %Cmp39, i1 %Cmp39, i1 false123 br i1 %Sl68, label %CF78, label %CF81124 125CF81: ; preds = %CF82126 %Cmp69 = icmp ne <8 x i64> <i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1>, %B36127 %L70 = load i8, ptr %0128 store i64 %L55, ptr %A4129 %E71 = extractelement <4 x i32> %Shuff49, i32 1130 %Shuff72 = shufflevector <4 x i64> zeroinitializer, <4 x i64> %Shuff34, <4 x i32> <i32 0, i32 2, i32 4, i32 6>131 %I73 = insertelement <4 x i64> %Shuff64, i64 %E, i32 2132 %B74 = lshr <8 x i64> <i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1, i64 -1>, %B36133 %Sl75 = select i1 %Sl68, i64 %B51, i64 %L55134 %Cmp76 = icmp sgt <8 x i64> %B74, %B36135 store i1 %Cmp39, ptr %0136 store i64 %E41, ptr %A4137 store i64 %L32, ptr %A4138 store i64 %Sl75, ptr %2139 store i64 %L32, ptr %A4140 ret void141}142