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1; RUN: llc -mtriple=mips -mcpu=mips32r5 -mattr=+fp64,+msa,+nooddspreg < %s | FileCheck %s2 3; Test that the register allocator honours +nooddspreg and does not pick an odd4; single precision subregister of an MSA register.5 6@f1 = external global float7 8@f2 = external global float9 10@v3 = external global <4 x float>11 12@d1 = external global double13 14define void @test() {15; CHECK-LABEL: test:16entry:17; CHECK-NOT: lwc1 $f{{[13579]+}}18; CHECK: lwc1 $f{{[02468]+}}19 %0 = load float, ptr @f120 %1 = insertelement <4 x float> undef, float %0, i32 021 %2 = insertelement <4 x float> %1, float %0, i32 122 %3 = insertelement <4 x float> %2, float %0, i32 223 %4 = insertelement <4 x float> %3, float %0, i32 324 25; CHECK-NOT: lwc1 $f{{[13579]+}}26; CHECK: lwc1 $f{{[02468]+}}27 %5 = load float, ptr @f228 %6 = insertelement <4 x float> undef, float %5, i32 029 %7 = insertelement <4 x float> %6, float %5, i32 130 %8 = insertelement <4 x float> %7, float %5, i32 231 %9 = insertelement <4 x float> %8, float %5, i32 332 33 %10 = fadd <4 x float> %4, %934 store <4 x float> %10, ptr @v335 ret void36}37 38; Test that the register allocator hnours +noodspreg and does not pick an odd39; single precision register for a load to perform a conversion to a double.40 41define void @test2() {42; CHECK-LABEL: test2:43entry:44; CHECK-NOT: lwc1 $f{{[13579]+}}45; CHECK: lwc1 $f{{[02468]+}}46 %0 = load float, ptr @f147 %1 = fpext float %0 to double48; CHECK-NOT: lwc1 $f{{[13579]+}}49; CHECK: lwc1 $f{{[02468]+}}50 %2 = load float, ptr @f251 %3 = fpext float %2 to double52 %4 = fadd double %1, %353 store double%4, ptr @d154 ret void55}56