57 lines · plain
1; Test the MSA intrinsics that are encoded with the SPECIAL instruction format.2 3; RUN: llc -mtriple=mips-elf -mattr=+msa,+fp64,+mips32r2 < %s | \4; RUN: FileCheck %s --check-prefix=MIPS325; RUN: llc -mtriple=mips64-elf -mcpu=mips64r2 -mattr=+msa,+fp64 < %s | \6; RUN: FileCheck %s --check-prefix=MIPS647; RUN: llc -mtriple=mips-elf -mcpu=mips32r6 -mattr=+msa < %s | \8; RUN: FileCheck %s --check-prefix=MIPS329; RUN: llc -mtriple=mips64-elf -mcpu=mips64r6 -mattr=+msa < %s | \10; RUN: FileCheck %s --check-prefix=MIPS6411 12define i32 @llvm_mips_lsa_test(i32 %a, i32 %b) nounwind {13entry:14 %0 = tail call i32 @llvm.mips.lsa(i32 %a, i32 %b, i32 2)15 ret i32 %016}17 18declare i32 @llvm.mips.lsa(i32, i32, i32) nounwind19 20; MIPS32: llvm_mips_lsa_test:21; MIPS32: lsa {{\$[0-9]+}}, $5, $4, 222; MIPS32: .size llvm_mips_lsa_test23 24define i32 @lsa_test(i32 %a, i32 %b) nounwind {25entry:26 %0 = shl i32 %b, 227 %1 = add i32 %a, %028 ret i32 %129}30 31; MIPS32: lsa_test:32; MIPS32: lsa {{\$[0-9]+}}, $5, $4, 233; MIPS32: .size lsa_test34 35define i64 @llvm_mips_dlsa_test(i64 %a, i64 %b) nounwind {36entry:37 %0 = tail call i64 @llvm.mips.dlsa(i64 %a, i64 %b, i32 2)38 ret i64 %039}40 41declare i64 @llvm.mips.dlsa(i64, i64, i32) nounwind42 43; MIPS64: llvm_mips_dlsa_test:44; MIPS64: dlsa {{\$[0-9]+}}, $5, $4, 245; MIPS64: .size llvm_mips_dlsa_test46 47define i64 @dlsa_test(i64 %a, i64 %b) nounwind {48entry:49 %0 = shl i64 %b, 250 %1 = add i64 %a, %051 ret i64 %152}53 54; MIPS64: dlsa_test:55; MIPS64: dlsa {{\$[0-9]+}}, $5, $4, 256; MIPS64: .size dlsa_test57