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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 42;; Test the strict-align feature which is similar to AArch64/arm64-strict-align.ll.3 4; RUN: llc --mtriple=mipsisa32r6 < %s | FileCheck %s --check-prefix=MIPS32R6-UNALIGNED5; RUN: llc --mtriple=mipsisa32r6 --mattr=-strict-align < %s | FileCheck %s --check-prefix=MIPS32R6-UNALIGNED6; RUN: llc --mtriple=mipsisa32r6 --mattr=+strict-align < %s | FileCheck %s --check-prefix=MIPS32R6-ALIGNED7 8; RUN: llc --mtriple=mipsisa64r6 < %s | FileCheck %s --check-prefix=MIPS64R6-UNALIGNED9; RUN: llc --mtriple=mipsisa64r6 --mattr=-strict-align < %s | FileCheck %s --check-prefix=MIPS64R6-UNALIGNED10; RUN: llc --mtriple=mipsisa64r6 --mattr=+strict-align < %s | FileCheck %s --check-prefix=MIPS64R6-ALIGNED11 12define i32 @f0(ptr %p) nounwind {13; MIPS32R6-UNALIGNED-LABEL: f0:14; MIPS32R6-UNALIGNED: # %bb.0:15; MIPS32R6-UNALIGNED-NEXT: lw $2, 0($4)16; MIPS32R6-UNALIGNED-NEXT: jrc $ra17;18; MIPS32R6-ALIGNED-LABEL: f0:19; MIPS32R6-ALIGNED: # %bb.0:20; MIPS32R6-ALIGNED-NEXT: lhu $1, 2($4)21; MIPS32R6-ALIGNED-NEXT: lhu $2, 0($4)22; MIPS32R6-ALIGNED-NEXT: sll $2, $2, 1623; MIPS32R6-ALIGNED-NEXT: jr $ra24; MIPS32R6-ALIGNED-NEXT: or $2, $2, $125;26; MIPS64R6-UNALIGNED-LABEL: f0:27; MIPS64R6-UNALIGNED: # %bb.0:28; MIPS64R6-UNALIGNED-NEXT: lw $2, 0($4)29; MIPS64R6-UNALIGNED-NEXT: jrc $ra30;31; MIPS64R6-ALIGNED-LABEL: f0:32; MIPS64R6-ALIGNED: # %bb.0:33; MIPS64R6-ALIGNED-NEXT: lhu $1, 2($4)34; MIPS64R6-ALIGNED-NEXT: lhu $2, 0($4)35; MIPS64R6-ALIGNED-NEXT: sll $2, $2, 1636; MIPS64R6-ALIGNED-NEXT: jr $ra37; MIPS64R6-ALIGNED-NEXT: or $2, $2, $138 %tmp = load i32, ptr %p, align 239 ret i32 %tmp40}41 42define i64 @f1(ptr %p) nounwind {43; MIPS32R6-UNALIGNED-LABEL: f1:44; MIPS32R6-UNALIGNED: # %bb.0:45; MIPS32R6-UNALIGNED-NEXT: lw $2, 0($4)46; MIPS32R6-UNALIGNED-NEXT: lw $3, 4($4)47; MIPS32R6-UNALIGNED-NEXT: jrc $ra48;49; MIPS32R6-ALIGNED-LABEL: f1:50; MIPS32R6-ALIGNED: # %bb.0:51; MIPS32R6-ALIGNED-NEXT: lw $2, 0($4)52; MIPS32R6-ALIGNED-NEXT: lw $3, 4($4)53; MIPS32R6-ALIGNED-NEXT: jrc $ra54;55; MIPS64R6-UNALIGNED-LABEL: f1:56; MIPS64R6-UNALIGNED: # %bb.0:57; MIPS64R6-UNALIGNED-NEXT: ld $2, 0($4)58; MIPS64R6-UNALIGNED-NEXT: jrc $ra59;60; MIPS64R6-ALIGNED-LABEL: f1:61; MIPS64R6-ALIGNED: # %bb.0:62; MIPS64R6-ALIGNED-NEXT: lwu $1, 4($4)63; MIPS64R6-ALIGNED-NEXT: lwu $2, 0($4)64; MIPS64R6-ALIGNED-NEXT: dsll $2, $2, 3265; MIPS64R6-ALIGNED-NEXT: jr $ra66; MIPS64R6-ALIGNED-NEXT: or $2, $2, $167 %tmp = load i64, ptr %p, align 468 ret i64 %tmp69}70