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1; RUN: llc -mtriple=mips -mcpu=mips32r2 < %s | FileCheck %s2; RUN: llc -mtriple=mipsel-linux-gnu -mcpu=mips32r2 -mattr=+mips16 < %s | FileCheck %s -check-prefix=mips163; RUN: llc -mtriple=mips -mcpu=mips32r3 -mattr=+micromips < %s | FileCheck %s \4; RUN: -check-prefix=MM325; RUN: llc -mtriple=mips -mcpu=mips32r6 -mattr=+micromips < %s | FileCheck %s \6; RUN: -check-prefix=MM327 8; CHECK: rotrv $2, $49; mips16: .ent rot010; MM32: li16 $2, 3211; MM32: subu16 $2, $2, $512; MM32: rotrv $2, $4, $213define i32 @rot0(i32 %a, i32 %b) nounwind readnone {14entry:15 %shl = shl i32 %a, %b16 %sub = sub i32 32, %b17 %shr = lshr i32 %a, %sub18 %or = or i32 %shr, %shl19 ret i32 %or20}21 22; CHECK: rotr $2, $4, 2223; mips16: .ent rot124; MM32: rotr $2, $4, 2225define i32 @rot1(i32 %a) nounwind readnone {26entry:27 %shl = shl i32 %a, 1028 %shr = lshr i32 %a, 2229 %or = or i32 %shl, %shr30 ret i32 %or31}32 33; CHECK: rotrv $2, $4, $534; mips16: .ent rot235; MM32: rotrv $2, $4, $536define i32 @rot2(i32 %a, i32 %b) nounwind readnone {37entry:38 %shr = lshr i32 %a, %b39 %sub = sub i32 32, %b40 %shl = shl i32 %a, %sub41 %or = or i32 %shl, %shr42 ret i32 %or43}44 45; CHECK: rotr $2, $4, 1046; mips16: .ent rot347; MM32: rotr $2, $4, 1048define i32 @rot3(i32 %a) nounwind readnone {49entry:50 %shr = lshr i32 %a, 1051 %shl = shl i32 %a, 2252 %or = or i32 %shr, %shl53 ret i32 %or54}55 56