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1; RUN: llc -mtriple=mipsel-elf -mattr=mips16 -relocation-model=pic < %s | FileCheck %s -check-prefix=162 3@t = global i32 10, align 44@f = global i32 199, align 45@a = global i32 1, align 46@b = global i32 10, align 47@c = global i32 1, align 48@z1 = common global i32 0, align 49@z2 = common global i32 0, align 410@z3 = common global i32 0, align 411@z4 = common global i32 0, align 412@.str = private unnamed_addr constant [5 x i8] c"%i \0A\00", align 113 14define void @calc_z() nounwind "target-cpu"="mips16" "target-features"="+mips16,+o32" {15entry:16 %0 = load i32, ptr @a, align 417 %1 = load i32, ptr @b, align 418 %cmp = icmp sle i32 %0, %119 br i1 %cmp, label %cond.true, label %cond.false20 21cond.true: ; preds = %entry22 %2 = load i32, ptr @t, align 423 br label %cond.end24 25cond.false: ; preds = %entry26 %3 = load i32, ptr @f, align 427 br label %cond.end28 29cond.end: ; preds = %cond.false, %cond.true30 %cond = phi i32 [ %2, %cond.true ], [ %3, %cond.false ]31 store i32 %cond, ptr @z1, align 432 %4 = load i32, ptr @b, align 433 %5 = load i32, ptr @a, align 434 %cmp1 = icmp sle i32 %4, %535 br i1 %cmp1, label %cond.true2, label %cond.false336 37cond.true2: ; preds = %cond.end38 %6 = load i32, ptr @f, align 439 br label %cond.end440 41cond.false3: ; preds = %cond.end42 %7 = load i32, ptr @t, align 443 br label %cond.end444 45cond.end4: ; preds = %cond.false3, %cond.true246 %cond5 = phi i32 [ %6, %cond.true2 ], [ %7, %cond.false3 ]47 store i32 %cond5, ptr @z2, align 448 %8 = load i32, ptr @c, align 449 %9 = load i32, ptr @a, align 450 %cmp6 = icmp sle i32 %8, %951 br i1 %cmp6, label %cond.true7, label %cond.false852 53cond.true7: ; preds = %cond.end454 %10 = load i32, ptr @t, align 455 br label %cond.end956 57cond.false8: ; preds = %cond.end458 %11 = load i32, ptr @f, align 459 br label %cond.end960 61cond.end9: ; preds = %cond.false8, %cond.true762 %cond10 = phi i32 [ %10, %cond.true7 ], [ %11, %cond.false8 ]63 store i32 %cond10, ptr @z3, align 464 %12 = load i32, ptr @a, align 465 %13 = load i32, ptr @c, align 466 %cmp11 = icmp sle i32 %12, %1367 br i1 %cmp11, label %cond.true12, label %cond.false1368 69cond.true12: ; preds = %cond.end970 %14 = load i32, ptr @t, align 471 br label %cond.end1472 73cond.false13: ; preds = %cond.end974 %15 = load i32, ptr @f, align 475 br label %cond.end1476 77cond.end14: ; preds = %cond.false13, %cond.true1278 %cond15 = phi i32 [ %14, %cond.true12 ], [ %15, %cond.false13 ]79 store i32 %cond15, ptr @z4, align 480 ret void81}82 83; 16: slt ${{[0-9]+}}, ${{[0-9]+}}84; 16: btnez $BB{{[0-9]+}}_{{[0-9]}}85 86; 16: slt ${{[0-9]+}}, ${{[0-9]+}}87; 16: btnez $BB{{[0-9]+}}_{{[0-9]}}88 89; 16: slt ${{[0-9]+}}, ${{[0-9]+}}90; 16: btnez $BB{{[0-9]+}}_{{[0-9]}}91 92; 16: slt ${{[0-9]+}}, ${{[0-9]+}}93; 16: btnez $BB{{[0-9]+}}_{{[0-9]}}94 95attributes #0 = { nounwind "target-cpu"="mips16" "target-features"="+mips16,+o32" }96attributes #1 = { "target-cpu"="mips16" "target-features"="+mips16,+o32" }97