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1; RUN: llc -mtriple=mipsel-elf -mattr=mips16 -relocation-model=pic < %s | FileCheck %s -check-prefix=162 3@t = global i32 10, align 44@f = global i32 199, align 45@a = global i32 2, align 46@b = global i32 1000, align 47@c = global i32 2, align 48@z1 = common global i32 0, align 49@z2 = common global i32 0, align 410@z3 = common global i32 0, align 411@z4 = common global i32 0, align 412@.str = private unnamed_addr constant [5 x i8] c"%i \0A\00", align 113 14define void @calc_selltk() nounwind "target-cpu"="mips16" "target-features"="+mips16,+o32" {15entry:16 %0 = load i32, ptr @a, align 417 %cmp = icmp slt i32 %0, 100018 br i1 %cmp, label %cond.true, label %cond.false19 20cond.true: ; preds = %entry21 %1 = load i32, ptr @t, align 422 br label %cond.end23 24cond.false: ; preds = %entry25 %2 = load i32, ptr @f, align 426 br label %cond.end27 28cond.end: ; preds = %cond.false, %cond.true29 %cond = phi i32 [ %1, %cond.true ], [ %2, %cond.false ]30 store i32 %cond, ptr @z1, align 431 %3 = load i32, ptr @b, align 432 %cmp1 = icmp slt i32 %3, 233 br i1 %cmp1, label %cond.true2, label %cond.false334 35cond.true2: ; preds = %cond.end36 %4 = load i32, ptr @f, align 437 br label %cond.end438 39cond.false3: ; preds = %cond.end40 %5 = load i32, ptr @t, align 441 br label %cond.end442 43cond.end4: ; preds = %cond.false3, %cond.true244 %cond5 = phi i32 [ %4, %cond.true2 ], [ %5, %cond.false3 ]45 store i32 %cond5, ptr @z2, align 446 %6 = load i32, ptr @c, align 447 %cmp6 = icmp sgt i32 %6, 248 br i1 %cmp6, label %cond.true7, label %cond.false849 50cond.true7: ; preds = %cond.end451 %7 = load i32, ptr @f, align 452 br label %cond.end953 54cond.false8: ; preds = %cond.end455 %8 = load i32, ptr @t, align 456 br label %cond.end957 58cond.end9: ; preds = %cond.false8, %cond.true759 %cond10 = phi i32 [ %7, %cond.true7 ], [ %8, %cond.false8 ]60 store i32 %cond10, ptr @z3, align 461 %9 = load i32, ptr @a, align 462 %cmp11 = icmp sgt i32 %9, 263 br i1 %cmp11, label %cond.true12, label %cond.false1364 65cond.true12: ; preds = %cond.end966 %10 = load i32, ptr @f, align 467 br label %cond.end1468 69cond.false13: ; preds = %cond.end970 %11 = load i32, ptr @t, align 471 br label %cond.end1472 73cond.end14: ; preds = %cond.false13, %cond.true1274 %cond15 = phi i32 [ %10, %cond.true12 ], [ %11, %cond.false13 ]75 store i32 %cond15, ptr @z4, align 476 ret void77}78 79attributes #0 = { nounwind "target-cpu"="mips16" "target-features"="+mips16,+o32" }80attributes #1 = { "target-cpu"="mips16" "target-features"="+mips16,+o32" }81 82; 16: slt ${{[0-9]+}}, ${{[0-9]+}}83; 16: btnez $BB{{[0-9]+}}_{{[0-9]}}84 85; 16: slt ${{[0-9]+}}, ${{[0-9]+}}86; 16: btnez $BB{{[0-9]+}}_{{[0-9]}}87 88; 16: slti ${{[0-9]+}}, 3 # 16 bit inst89; 16: btnez $BB{{[0-9]+}}_{{[0-9]}}90 91; 16: slti ${{[0-9]+}}, 3 # 16 bit inst92; 16: btnez $BB{{[0-9]+}}_{{[0-9]}}93 94