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1; RUN: llc -mtriple=mipsel-elf -mattr=mips16 -relocation-model=pic < %s | FileCheck %s -check-prefix=162 3@t = global i32 10, align 44@f = global i32 199, align 45@a = global i32 1, align 46@b = global i32 1000, align 47@z1 = common global i32 0, align 48@z2 = common global i32 0, align 49@z3 = common global i32 0, align 410@z4 = common global i32 0, align 411@.str = private unnamed_addr constant [5 x i8] c"%i \0A\00", align 112 13define void @calc_z() nounwind "target-cpu"="mips16" "target-features"="+mips16,+o32" {14entry:15 %0 = load i32, ptr @a, align 416 %cmp = icmp ne i32 %0, 117 br i1 %cmp, label %cond.true, label %cond.false18 19cond.true: ; preds = %entry20 %1 = load i32, ptr @f, align 421 br label %cond.end22 23cond.false: ; preds = %entry24 %2 = load i32, ptr @t, align 425 br label %cond.end26 27cond.end: ; preds = %cond.false, %cond.true28 %cond = phi i32 [ %1, %cond.true ], [ %2, %cond.false ]29 store i32 %cond, ptr @z1, align 430 %3 = load i32, ptr @a, align 431 %cmp1 = icmp ne i32 %3, 100032 br i1 %cmp1, label %cond.true2, label %cond.false333 34cond.true2: ; preds = %cond.end35 %4 = load i32, ptr @t, align 436 br label %cond.end437 38cond.false3: ; preds = %cond.end39 %5 = load i32, ptr @f, align 440 br label %cond.end441 42cond.end4: ; preds = %cond.false3, %cond.true243 %cond5 = phi i32 [ %4, %cond.true2 ], [ %5, %cond.false3 ]44 store i32 %cond5, ptr @z2, align 445 %6 = load i32, ptr @b, align 446 %cmp6 = icmp ne i32 %6, 347 br i1 %cmp6, label %cond.true7, label %cond.false848 49cond.true7: ; preds = %cond.end450 %7 = load i32, ptr @t, align 451 br label %cond.end952 53cond.false8: ; preds = %cond.end454 %8 = load i32, ptr @f, align 455 br label %cond.end956 57cond.end9: ; preds = %cond.false8, %cond.true758 %cond10 = phi i32 [ %7, %cond.true7 ], [ %8, %cond.false8 ]59 store i32 %cond10, ptr @z3, align 460 %9 = load i32, ptr @b, align 461 %cmp11 = icmp ne i32 %9, 100062 br i1 %cmp11, label %cond.true12, label %cond.false1363 64cond.true12: ; preds = %cond.end965 %10 = load i32, ptr @f, align 466 br label %cond.end1467 68cond.false13: ; preds = %cond.end969 %11 = load i32, ptr @t, align 470 br label %cond.end1471 72cond.end14: ; preds = %cond.false13, %cond.true1273 %cond15 = phi i32 [ %10, %cond.true12 ], [ %11, %cond.false13 ]74 store i32 %cond15, ptr @z4, align 475 ret void76}77 78define i32 @main() nounwind "target-cpu"="mips16" "target-features"="+mips16,+o32" {79entry:80 call void @calc_z() "target-cpu"="mips16" "target-features"="+mips16,+o32"81 %0 = load i32, ptr @z1, align 482 %call = call i32 (ptr, ...) @printf(ptr @.str, i32 %0) "target-cpu"="mips16" "target-features"="+mips16,+o32"83 %1 = load i32, ptr @z2, align 484 %call1 = call i32 (ptr, ...) @printf(ptr @.str, i32 %1) "target-cpu"="mips16" "target-features"="+mips16,+o32"85 %2 = load i32, ptr @z3, align 486 %call2 = call i32 (ptr, ...) @printf(ptr @.str, i32 %2) "target-cpu"="mips16" "target-features"="+mips16,+o32"87 %3 = load i32, ptr @z4, align 488 %call3 = call i32 (ptr, ...) @printf(ptr @.str, i32 %3) "target-cpu"="mips16" "target-features"="+mips16,+o32"89 ret i32 090}91 92declare i32 @printf(ptr, ...) "target-cpu"="mips16" "target-features"="+mips16,+o32"93 94attributes #0 = { nounwind "target-cpu"="mips16" "target-features"="+mips16,+o32" }95attributes #1 = { "target-cpu"="mips16" "target-features"="+mips16,+o32" }96 97; 16: cmpi ${{[0-9]+}}, 1 # 16 bit inst98; 16: bteqz $BB{{[0-9]+}}_{{[0-9]}}99 100; 16: cmpi ${{[0-9]+}}, 1000101; 16: bteqz $BB{{[0-9]+}}_{{[0-9]}}102 103; 16: cmpi ${{[0-9]+}}, 3 # 16 bit inst104; 16: bteqz $BB{{[0-9]+}}_{{[0-9]}}105 106; 16: cmpi ${{[0-9]+}}, 1000107; 16: bteqz $BB{{[0-9]+}}_{{[0-9]}}108