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1; RUN: llc -mtriple=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=162; RUN: llc -mtriple=mips -mcpu=mips32r6 -mattr=micromips -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=MMR63 4@i = global i32 0, align 45@j = global i32 99, align 46@r1 = common global i32 0, align 47@r2 = common global i32 0, align 48 9define void @test() nounwind {10entry:11 %0 = load i32, ptr @i, align 412 %cmp = icmp eq i32 %0, 013 %conv = zext i1 %cmp to i3214 store i32 %conv, ptr @r1, align 415; 16: sltiu ${{[0-9]+}}, 116; MMR6: sltiu ${{[0-9]+}}, ${{[0-9]+}}, 117; 16: move ${{[0-9]+}}, $2418 %1 = load i32, ptr @j, align 419 %cmp1 = icmp eq i32 %1, 9920 %conv2 = zext i1 %cmp1 to i3221 store i32 %conv2, ptr @r2, align 422; 16: xor $[[REGISTER:[0-9A-Ba-b_]+]], ${{[0-9]+}}23; 16: sltiu $[[REGISTER:[0-9A-Ba-b_]+]], 124; MMR6: sltiu ${{[0-9]+}}, ${{[0-9]+}}, 125; 16: move ${{[0-9]+}}, $2426 ret void27}28