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1; RUN: llc -mtriple=mips -mcpu=mips32 -O0 -relocation-model=pic -mips-tail-calls=1 < %s | FileCheck \2; RUN:     %s -check-prefix=MIPS323; RUN: llc -mtriple=mips64 -mcpu=mips64 -O0 -relocation-model=pic -target-abi n64 \4; RUN:     -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=MIPS645; RUN: llc -mtriple=mips64 -mcpu=mips64 -O0 -relocation-model=pic -target-abi n32 \6; RUN:     -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=MIPS647 8 9; LLVM PR/3019710; Test that the scheduler does not order loads and stores of arguments that11; are passed on the stack such that the arguments of the caller are clobbered12; too early.13 14; This test is more fragile than I'd like. The -NEXT directives enforce an15; assumption that any GOT related instructions will not appear between the16; loads and stores.17 18; O32 case: The last two arguments should appear at 16(sp), 20(sp). The order19;           of the loads doesn't matter, but they have to become before the20;           stores21define internal i32 @func2(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f) {22  %1 = add i32 %a, %b23  %2 = add i32 %1, %c24  %3 = add i32 %2, %d25  %4 = add i32 %3, %e26  %5 = add i32 %4, %f27  ret i32 %528}29 30define i32 @func1(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e, i32 %f){31; MIPS32-LABEL: func1:32 33; MIPS32: lw ${{[0-9]+}}, {{[0-9]+}}($sp)34; MIPS32-NEXT: lw ${{[0-9]+}}, {{[0-9]+}}($sp)35; MIPS32-NEXT: sw ${{[0-9]+}}, {{[0-9]+}}($sp)36; MIPS32-NEXT: sw ${{[0-9]+}}, {{[0-9]+}}($sp)37  %retval = tail call i32 @func2(i32 %a, i32 %f, i32 %c, i32 %d, i32 %e, i32 %b)38 39  ret i32 %retval40}41 42; N64, N32 cases: N64 and N32 both pass 8 arguments in registers. The order43;           of the loads doesn't matter, but they have to become before the44;           stores45 46define internal i64 @func4(i64 %a, i64 %b, i64 %c, i64 %d, i64 %e,47                           i64 %f, i64 %g, i64 %h, i64 %i, i64 %j) {48  %1 = add i64 %a, %b49  %2 = add i64 %1, %c50  %3 = add i64 %2, %d51  %4 = add i64 %3, %e52  %5 = add i64 %4, %f53  %6 = add i64 %1, %g54  %7 = add i64 %2, %h55  %8 = add i64 %3, %i56  %9 = add i64 %4, %j57  ret i64 %558}59define i64 @func3(i64 %a, i64 %b, i64 %c, i64 %d,60                  i64 %e, i64 %f, i64 %g, i64 %h,61                  i64 %i, i64 %j){62; MIPS64-LABEL: func3:63 64; MIPS64: ld ${{[0-9]+}}, {{[0-9]+}}($sp)65; MIPS64-NEXT: ld ${{[0-9]+}}, {{[0-9]+}}($sp)66; MIPS64-NEXT: sd ${{[0-9]+}}, {{[0-9]+}}($sp)67; MIPS64-NEXT: sd ${{[0-9]+}}, {{[0-9]+}}($sp)68  %retval = tail call i64 @func4(i64 %a, i64 %j, i64 %c, i64 %d, i64 %e, i64 %f, i64 %g, i64 %h, i64 %i, i64 %b)69 70  ret i64 %retval71}72