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1; RUN: llc -mtriple=mipsel -relocation-model=pic \2; RUN: -verify-machineinstrs -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,PIC323; RUN: llc -mtriple=mipsel -relocation-model=static \4; RUN: -verify-machineinstrs -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,STATIC325; RUN: llc -mtriple=mips64el -mcpu=mips64r2 -relocation-model=pic \6; RUN: -verify-machineinstrs -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,PIC647; RUN: llc -mtriple=mips64el -mcpu=mips64r2 -relocation-model=static \8; RUN: -verify-machineinstrs -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,STATIC649; RUN: llc -mtriple=mipsel -mattr=mips16 -relocation-model=pic \10; RUN: -verify-machineinstrs -mips-tail-calls=1 < %s | \11; RUN: FileCheck %s -check-prefixes=ALL,PIC1612 13; RUN: llc -mtriple=mipsel -relocation-model=pic -mattr=+micromips -verify-machineinstrs \14; RUN: -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,PIC32MM15; RUN: llc -mtriple=mipsel -relocation-model=static -mattr=+micromips -verify-machineinstrs \16; RUN: -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,STATIC3217 18; RUN: llc -mtriple=mipsel -relocation-model=pic -mcpu=mips32r6 -verify-machineinstrs \19; RUN: -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,PIC32R620; RUN: llc -mtriple=mipsel -relocation-model=static -mcpu=mips32r2 -verify-machineinstrs \21; RUN: -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,STATIC3222; RUN: llc -mtriple=mips64el -relocation-model=pic -mcpu=mips64r2 -verify-machineinstrs \23; RUN: -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=PIC6424; RUN: llc -mtriple=mips64el -relocation-model=pic -mcpu=mips64r6 -verify-machineinstrs \25; RUN: -mips-tail-calls=1 < %s | FileCheck %s -check-prefix=STATIC6426 27; RUN: llc -mtriple=mipsel -relocation-model=pic -mcpu=mips32r6 -mattr=+micromips -verify-machineinstrs \28; RUN: -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,PIC32MMR629; RUN: llc -mtriple=mipsel -relocation-model=static -mcpu=mips32r6 -verify-machineinstrs \30; RUN: -mattr=+micromips -mips-tail-calls=1 < %s | FileCheck %s -check-prefixes=ALL,STATIC32MMR631 32@g0 = common global i32 0, align 433@g1 = common global i32 0, align 434@g2 = common global i32 0, align 435@g3 = common global i32 0, align 436@g4 = common global i32 0, align 437@g5 = common global i32 0, align 438@g6 = common global i32 0, align 439@g7 = common global i32 0, align 440@g8 = common global i32 0, align 441@g9 = common global i32 0, align 442 43define i32 @caller1(i32 %a0) nounwind {44entry:45; ALL-LABEL: caller1:46; PIC32: jalr $2547; PIC32MM: jalrs16 $2548; PIC32MMR6: jalr $2549; PIC32R6: jalr $2550; STATIC32: jal51; STATIC32MMR6: balc52; N64: jalr $2553; N64R6: jalr $2554; PIC16: jalrc55 56 %call = tail call i32 @callee1(i32 1, i32 1, i32 1, i32 %a0) nounwind57 ret i32 %call58}59 60declare i32 @callee1(i32, i32, i32, i32)61 62define i32 @caller2(i32 %a0, i32 %a1, i32 %a2, i32 %a3) nounwind {63entry:64; ALL-LABEL: caller265; PIC32: jalr $2566; PIC32MM: jalr $2567; PIC32MMR6: jalr $2568; PIC32R6: jalr $2569; STATIC32: jal70; STATIC32MMR6: balc71; N64: jalr $2572; N64R6: jalr $2573; PIC16: jalrc74 75 %call = tail call i32 @callee2(i32 1, i32 %a0, i32 %a1, i32 %a2, i32 %a3) nounwind76 ret i32 %call77}78 79declare i32 @callee2(i32, i32, i32, i32, i32)80 81define i32 @caller3(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4) nounwind {82entry:83; ALL-LABEL: caller3:84; PIC32: jalr $2585; PIC32R6: jalr $2586; PIC32MM: jalr $2587; PIC32MMR6: jalr $2588; STATIC32: jal89; STATIC32MMR6: balc90; N64: jalr $2591; N64R6: jalr $2592; PIC16: jalrc93 94 %call = tail call i32 @callee3(i32 1, i32 1, i32 1, i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4) nounwind95 ret i32 %call96}97 98declare i32 @callee3(i32, i32, i32, i32, i32, i32, i32, i32)99 100define i32 @caller4(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7) nounwind {101entry:102; ALL-LABEL: caller4:103; PIC32: jalr $25104; PIC32R6: jalr $25105; PIC32MM: jalr $25106; PIC32MMR6: jalr $25107; STATIC32: jal108; SATATIC32MMR6: jal109; PIC64: jalr $25110; STATIC64: jal111; N64R6: jalr $25112; PIC16: jalrc113 114 %call = tail call i32 @callee4(i32 1, i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7) nounwind115 ret i32 %call116}117 118declare i32 @callee4(i32, i32, i32, i32, i32, i32, i32, i32, i32)119 120define i32 @caller5() nounwind readonly {121entry:122; ALL-LABEL: caller5:123; PIC32: jr $25124; PIC32R6: jr $25125; PIC32MM: jr126; PIC32MMR6: jr127; STATIC32: j128; STATIC32MMR6: bc129; PIC64: jr $25130; STATIC64: j131; PIC16: jalrc132 133 %0 = load i32, ptr @g0, align 4134 %1 = load i32, ptr @g1, align 4135 %2 = load i32, ptr @g2, align 4136 %3 = load i32, ptr @g3, align 4137 %4 = load i32, ptr @g4, align 4138 %5 = load i32, ptr @g5, align 4139 %6 = load i32, ptr @g6, align 4140 %7 = load i32, ptr @g7, align 4141 %8 = load i32, ptr @g8, align 4142 %9 = load i32, ptr @g9, align 4143 %call = tail call fastcc i32 @callee5(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7, i32 %8, i32 %9)144 ret i32 %call145}146 147define internal fastcc i32 @callee5(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7, i32 %a8, i32 %a9) nounwind readnone noinline {148entry:149 %add = add nsw i32 %a1, %a0150 %add1 = add nsw i32 %add, %a2151 %add2 = add nsw i32 %add1, %a3152 %add3 = add nsw i32 %add2, %a4153 %add4 = add nsw i32 %add3, %a5154 %add5 = add nsw i32 %add4, %a6155 %add6 = add nsw i32 %add5, %a7156 %add7 = add nsw i32 %add6, %a8157 %add8 = add nsw i32 %add7, %a9158 ret i32 %add8159}160 161declare i32 @callee8(i32, ...)162 163define i32 @caller8_0() nounwind {164entry:165; ALL-LABEL: caller8_0:166; PIC32: jr $25167; PIC32R6: jrc $25168; PIC32MM: jrc169; PIC32MMR6: jrc170; STATIC32: j171; STATIC32MMR6: bc172; PIC64: jr $25173; PIC64R6: jrc $25174; STATIC64: j175; PIC16: jalrc176 177 %call = tail call fastcc i32 @caller8_1()178 ret i32 %call179}180 181define internal fastcc i32 @caller8_1() nounwind noinline {182entry:183; ALL-LABEL: caller8_1:184; PIC32: jalr $25185; PIC32R6: jalr $25186; PIC32MM: jalrs16 $25187; PIC32MMR6: jalr $25188; STATIC32: jal189; STATIC32MMR6: balc190; PIC64: jalr $25191; STATIC64: jal192; PIC16: jalrc193 194 %call = tail call i32 (i32, ...) @callee8(i32 2, i32 1) nounwind195 ret i32 %call196}197 198%struct.S = type { [2 x i32] }199 200@gs1 = external global %struct.S201 202declare i32 @callee9(ptr byval(%struct.S))203 204define i32 @caller9_0() nounwind {205entry:206; ALL-LABEL: caller9_0:207; PIC32: jr $25208; PIC32R6: jrc $25209; PIC32MM: jrc210; PIC32MMR6: jrc211; STATIC32: j212; STATIC32MMR6: bc213; PIC64: jr $25214; STATIC64: j215; PIC64R6: jrc $25216; PIC16: jalrc217 %call = tail call fastcc i32 @caller9_1()218 ret i32 %call219}220 221define internal fastcc i32 @caller9_1() nounwind noinline {222entry:223; ALL-LABEL: caller9_1:224; PIC32: jalr $25225; PIC32R6: jalrc $25226; PIC32MM: jalr $25227; PIC32MMR6: jalr $25228; STATIC32: jal229; STATIC32MMR6: balc230; STATIC64: jal231; PIC64: jalr $25232; PIC64R6: jalrc $25233; PIC16: jalrc234 235 %call = tail call i32 @callee9(ptr byval(%struct.S) @gs1) nounwind236 ret i32 %call237}238 239declare i32 @callee10(i32, i32, i32, i32, i32, i32, i32, i32, i32)240 241define i32 @caller10(i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7, i32 %a8) nounwind {242entry:243; ALL-LABEL: caller10:244; PIC32: jalr $25245; PIC32R6: jalr $25246; PIC32MM: jalr $25247; PIC32MMR6: jalr $25248; STATIC32: jal249; STATIC32MMR6: balc250; STATIC64: jal251; PIC64: jalr $25252; PIC64R6: jalr $25253; PIC16: jalrc254 255 %call = tail call i32 @callee10(i32 %a8, i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7) nounwind256 ret i32 %call257}258 259declare i32 @callee11(ptr byval(%struct.S))260 261define i32 @caller11() nounwind noinline {262entry:263; ALL-LABEL: caller11:264; PIC32: jalr $25265; PIC32R6: jalrc $25266; PIC32MM: jalr $25267; PIC32MMR6: jalr $25268; STATIC32: jal269; STATIC32MMR6: balc270; STATIC64: jal271; PIC64: jalr $25272; PIC64R6: jalrc $25273; PIC16: jalrc274 275 %call = tail call i32 @callee11(ptr byval(%struct.S) @gs1) nounwind276 ret i32 %call277}278 279declare i32 @callee12()280 281declare void @llvm.memcpy.p0.p0.i32(ptr nocapture, ptr nocapture, i32, i1) nounwind282 283define i32 @caller12(ptr nocapture byval(%struct.S) %a0) nounwind {284entry:285; ALL-LABEL: caller12:286; PIC32: jalr $25287; PIC32R6: jalrc $25288; PIC32MM: jalr $25289; PIC32MMR6: jalr $25290; STATIC32: jal291; STATIC32MMR6: balc292; STATIC64: jal293; PIC64: jalr $25294; PIC64R6: jalrc $25295; PIC16: jalrc296 297 tail call void @llvm.memcpy.p0.p0.i32(ptr align 4 @gs1, ptr align 4 %a0, i32 8, i1 false)298 %call = tail call i32 @callee12() nounwind299 ret i32 %call300}301 302declare i32 @callee13(i32, ...)303 304define i32 @caller13() nounwind {305entry:306; ALL-LABEL: caller13:307; PIC32: jalr $25308; PIC32R6: jalr $25309; PIC32MM: jalrs16 $25310; PIC32MMR6: jalr $25311; STATIC32: jal312; STATIC32MMR6: balc313; STATIC64: jal314; PIC64R6: jalr $25315; PIC64: jalr $25316; PIC16: jalrc317 318 %call = tail call i32 (i32, ...) @callee13(i32 1, i32 2) nounwind319 ret i32 %call320}321 322; Check that there is a chain edge between the load and store nodes.323;324; ALL-LABEL: caller14:325; PIC32: lw ${{[0-9]+}}, 48($sp)326; PIC32: sw $4, 16($sp)327 328; PIC32MM: lw ${{[0-9]+}}, 48($sp)329; PIC32MM: sw16 $4, 16(${{[0-9]+}})330 331define void @caller14(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e) {332entry:333 tail call void @callee14(i32 %e, i32 %b, i32 %c, i32 %d, i32 %a)334 ret void335}336 337declare void @callee14(i32, i32, i32, i32, i32)338