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1# RUN: llc -O0 -mtriple=mips -mcpu=mips32r3 -mattr=+micromips,+eva -start-after=finalize-isel \2# RUN: -filetype obj %s -o - | llvm-objdump --no-print-imm-hex --mattr=+eva -d - | FileCheck %s3 4# Test that MIPS unaligned load/store instructions can be mapped to their5# corresponding microMIPS instructions.6--- |7 define void @g(ptr %a, ptr %b) {8 entry:9 %0 = load i32, ptr %a, align 110 store i32 %0, ptr %b, align 111 ret void12 }13 14 define void @g2(ptr %a, ptr %b) {15 entry:16 %0 = load i32, ptr %a, align 117 store i32 %0, ptr %b, align 118 ret void19 }20...21---22name: g23alignment: 424exposesReturnsTwice: false25legalized: false26regBankSelected: false27selected: false28failedISel: false29tracksRegLiveness: true30liveins:31 - { reg: '$a0', virtual-reg: '%0' }32 - { reg: '$a1', virtual-reg: '%1' }33frameInfo:34 isFrameAddressTaken: false35 isReturnAddressTaken: false36 hasStackMap: false37 hasPatchPoint: false38 stackSize: 039 offsetAdjustment: 040 maxAlignment: 141 adjustsStack: false42 hasCalls: false43 stackProtector: ''44 maxCallFrameSize: 429496729545 hasOpaqueSPAdjustment: false46 hasVAStart: false47 hasMustTailInVarArgFunc: false48 savePoint: []49 restorePoint: []50fixedStack:51stack:52constants:53body: |54 bb.0.entry:55 liveins: $a0, $a156 57 %1:gpr32 = COPY $a158 %0:gpr32 = COPY $a059 %3:gpr32 = IMPLICIT_DEF60 %2:gpr32 = LWL %0, 0, %3 :: (load (s32) from %ir.a, align 1)61 %4:gpr32 = LWR %0, 3, %2 :: (load (s32) from %ir.a, align 1)62 SWL %4, %1, 0 :: (store (s32) into %ir.b, align 1)63 SWR %4, %1, 3 :: (store (s32) into %ir.b, align 1)64 RetRA65 66...67---68name: g269alignment: 470exposesReturnsTwice: false71legalized: false72regBankSelected: false73selected: false74failedISel: false75tracksRegLiveness: true76liveins:77 - { reg: '$a0', virtual-reg: '%0' }78 - { reg: '$a1', virtual-reg: '%1' }79frameInfo:80 isFrameAddressTaken: false81 isReturnAddressTaken: false82 hasStackMap: false83 hasPatchPoint: false84 stackSize: 085 offsetAdjustment: 086 maxAlignment: 187 adjustsStack: false88 hasCalls: false89 stackProtector: ''90 maxCallFrameSize: 429496729591 hasOpaqueSPAdjustment: false92 hasVAStart: false93 hasMustTailInVarArgFunc: false94 savePoint: []95 restorePoint: []96fixedStack:97stack:98constants:99body: |100 bb.0.entry:101 liveins: $a0, $a1102 103 %1:gpr32 = COPY $a1104 %0:gpr32 = COPY $a0105 %3:gpr32 = IMPLICIT_DEF106 %2:gpr32 = LWLE %0, 0, %3 :: (load (s32) from %ir.a, align 1)107 %4:gpr32 = LWRE %0, 3, %2 :: (load (s32) from %ir.a, align 1)108 SWLE %4, %1, 0 :: (store (s32) into %ir.b, align 1)109 SWRE %4, %1, 3 :: (store (s32) into %ir.b, align 1)110 RetRA111 112...113 114# CHECK-LABEL: <g>:115# CHECK: 0: 60 24 00 00 lwl $1, 0($4)116# CHECK: 4: 60 24 10 03 lwr $1, 3($4)117# CHECK: 8: 60 25 80 00 swl $1, 0($5)118# CHECK: c: 60 25 90 03 swr $1, 3($5)119 120# CHECK-LABEL: <g2>:121# CHECK: 14: 60 24 64 00 lwle $1, 0($4)122# CHECK: 18: 60 24 66 03 lwre $1, 3($4)123# CHECK: 1c: 60 25 a0 00 swle $1, 0($5)124# CHECK: 20: 60 25 a2 03 swre $1, 3($5)125