29 lines · plain
1; RUN: llc < %s -mtriple=nvptx -mcpu=sm_20 -nvptx-fma-level=1 | FileCheck %s -check-prefix=FMA2; RUN: llc < %s -mtriple=nvptx -mcpu=sm_20 -nvptx-fma-level=0 | FileCheck %s -check-prefix=MUL3; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_20 -nvptx-fma-level=1 | FileCheck %s -check-prefix=FMA4; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_20 -nvptx-fma-level=0 | FileCheck %s -check-prefix=MUL5; RUN: %if ptxas-ptr32 %{ llc < %s -mtriple=nvptx -mcpu=sm_20 -nvptx-fma-level=1 | %ptxas-verify %}6; RUN: %if ptxas-ptr32 %{ llc < %s -mtriple=nvptx -mcpu=sm_20 -nvptx-fma-level=0 | %ptxas-verify %}7; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64 -mcpu=sm_20 -nvptx-fma-level=1 | %ptxas-verify %}8; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64 -mcpu=sm_20 -nvptx-fma-level=0 | %ptxas-verify %}9 10define ptx_device float @test_mul_add_f(float %x, float %y, float %z) {11entry:12; FMA: fma.rn.f3213; MUL: mul.rn.f3214; MUL: add.rn.f3215 %a = fmul float %x, %y16 %b = fadd float %a, %z17 ret float %b18}19 20define ptx_device double @test_mul_add_d(double %x, double %y, double %z) {21entry:22; FMA: fma.rn.f6423; MUL: mul.rn.f6424; MUL: add.rn.f6425 %a = fmul double %x, %y26 %b = fadd double %a, %z27 ret double %b28}29