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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_20 | FileCheck %s3; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64 -mcpu=sm_20 | %ptxas-verify %}4 5target triple = "nvptx-nvidia-cuda"6 7define i32 @test_select_i1_trunc(i32 %a, i32 %b, i32 %c, i32 %true, i32 %false) {8; CHECK-LABEL: test_select_i1_trunc(9; CHECK: {10; CHECK-NEXT: .reg .pred %p<3>;11; CHECK-NEXT: .reg .b32 %r<6>;12; CHECK-NEXT: .reg .b64 %rd<7>;13; CHECK-EMPTY:14; CHECK-NEXT: // %bb.0:15; CHECK-NEXT: ld.param.b32 %r1, [test_select_i1_trunc_param_0];16; CHECK-NEXT: and.b32 %r2, %r1, 1;17; CHECK-NEXT: setp.ne.b32 %p1, %r2, 0;18; CHECK-NEXT: mov.b64 %rd1, test_select_i1_trunc_param_2;19; CHECK-NEXT: mov.b64 %rd2, test_select_i1_trunc_param_1;20; CHECK-NEXT: selp.b64 %rd3, %rd2, %rd1, %p1;21; CHECK-NEXT: ld.param.b32 %r3, [%rd3];22; CHECK-NEXT: and.b32 %r4, %r3, 1;23; CHECK-NEXT: setp.ne.b32 %p2, %r4, 0;24; CHECK-NEXT: mov.b64 %rd4, test_select_i1_trunc_param_4;25; CHECK-NEXT: mov.b64 %rd5, test_select_i1_trunc_param_3;26; CHECK-NEXT: selp.b64 %rd6, %rd5, %rd4, %p2;27; CHECK-NEXT: ld.param.b32 %r5, [%rd6];28; CHECK-NEXT: st.param.b32 [func_retval0], %r5;29; CHECK-NEXT: ret;30 %a_trunc = trunc i32 %a to i131 %b_trunc = trunc i32 %b to i132 %c_trunc = trunc i32 %c to i133 %select_i1 = select i1 %a_trunc, i1 %b_trunc, i1 %c_trunc34 %select_ret = select i1 %select_i1, i32 %true, i32 %false35 ret i32 %select_ret36}37 38define i32 @test_select_i1_trunc_2(i64 %a, i16 %b, i32 %c, i32 %true, i32 %false) {39; CHECK-LABEL: test_select_i1_trunc_2(40; CHECK: {41; CHECK-NEXT: .reg .pred %p<3>;42; CHECK-NEXT: .reg .b16 %rs<3>;43; CHECK-NEXT: .reg .b32 %r<2>;44; CHECK-NEXT: .reg .b64 %rd<9>;45; CHECK-EMPTY:46; CHECK-NEXT: // %bb.0:47; CHECK-NEXT: ld.param.b64 %rd1, [test_select_i1_trunc_2_param_0];48; CHECK-NEXT: and.b64 %rd2, %rd1, 1;49; CHECK-NEXT: setp.ne.b64 %p1, %rd2, 0;50; CHECK-NEXT: mov.b64 %rd3, test_select_i1_trunc_2_param_2;51; CHECK-NEXT: mov.b64 %rd4, test_select_i1_trunc_2_param_1;52; CHECK-NEXT: selp.b64 %rd5, %rd4, %rd3, %p1;53; CHECK-NEXT: ld.param.b16 %rs1, [%rd5];54; CHECK-NEXT: and.b16 %rs2, %rs1, 1;55; CHECK-NEXT: setp.ne.b16 %p2, %rs2, 0;56; CHECK-NEXT: mov.b64 %rd6, test_select_i1_trunc_2_param_4;57; CHECK-NEXT: mov.b64 %rd7, test_select_i1_trunc_2_param_3;58; CHECK-NEXT: selp.b64 %rd8, %rd7, %rd6, %p2;59; CHECK-NEXT: ld.param.b32 %r1, [%rd8];60; CHECK-NEXT: st.param.b32 [func_retval0], %r1;61; CHECK-NEXT: ret;62 %a_trunc = trunc i64 %a to i163 %b_trunc = trunc i16 %b to i164 %c_trunc = trunc i32 %c to i165 %select_i1 = select i1 %a_trunc, i1 %b_trunc, i1 %c_trunc66 %select_ret = select i1 %select_i1, i32 %true, i32 %false67 ret i32 %select_ret68}69 70define i32 @test_select_i1_basic(i32 %v1, i32 %v2, i32 %v3, i32 %true, i32 %false) {71; CHECK-LABEL: test_select_i1_basic(72; CHECK: {73; CHECK-NEXT: .reg .pred %p<4>;74; CHECK-NEXT: .reg .b32 %r<6>;75; CHECK-NEXT: .reg .b64 %rd<6>;76; CHECK-EMPTY:77; CHECK-NEXT: // %bb.0:78; CHECK-NEXT: ld.param.b32 %r1, [test_select_i1_basic_param_0];79; CHECK-NEXT: ld.param.b32 %r2, [test_select_i1_basic_param_1];80; CHECK-NEXT: or.b32 %r3, %r1, %r2;81; CHECK-NEXT: setp.ne.b32 %p1, %r1, 0;82; CHECK-NEXT: ld.param.b32 %r4, [test_select_i1_basic_param_2];83; CHECK-NEXT: setp.eq.b32 %p2, %r4, 0;84; CHECK-NEXT: setp.eq.b32 %p3, %r3, 0;85; CHECK-NEXT: mov.b64 %rd1, test_select_i1_basic_param_4;86; CHECK-NEXT: mov.b64 %rd2, test_select_i1_basic_param_3;87; CHECK-NEXT: selp.b64 %rd3, %rd2, %rd1, %p2;88; CHECK-NEXT: selp.b64 %rd4, %rd3, %rd1, %p1;89; CHECK-NEXT: selp.b64 %rd5, %rd2, %rd4, %p3;90; CHECK-NEXT: ld.param.b32 %r5, [%rd5];91; CHECK-NEXT: st.param.b32 [func_retval0], %r5;92; CHECK-NEXT: ret;93 %b1 = icmp eq i32 %v1, 094 %b2 = icmp eq i32 %v2, 095 %b3 = icmp eq i32 %v3, 096 %select_i1 = select i1 %b1, i1 %b2, i1 %b397 %select_ret = select i1 %select_i1, i32 %true, i32 %false98 ret i32 %select_ret99}100 101define i32 @test_select_i1_basic_folding(i32 %v1, i32 %v2, i32 %v3, i32 %true, i32 %false) {102; CHECK-LABEL: test_select_i1_basic_folding(103; CHECK: {104; CHECK-NEXT: .reg .pred %p<11>;105; CHECK-NEXT: .reg .b32 %r<5>;106; CHECK-NEXT: .reg .b64 %rd<4>;107; CHECK-EMPTY:108; CHECK-NEXT: // %bb.0:109; CHECK-NEXT: ld.param.b32 %r1, [test_select_i1_basic_folding_param_0];110; CHECK-NEXT: setp.eq.b32 %p1, %r1, 0;111; CHECK-NEXT: ld.param.b32 %r2, [test_select_i1_basic_folding_param_1];112; CHECK-NEXT: setp.ne.b32 %p2, %r2, 0;113; CHECK-NEXT: setp.eq.b32 %p3, %r2, 0;114; CHECK-NEXT: ld.param.b32 %r3, [test_select_i1_basic_folding_param_2];115; CHECK-NEXT: setp.eq.b32 %p4, %r3, 0;116; CHECK-NEXT: xor.pred %p5, %p1, %p3;117; CHECK-NEXT: and.pred %p6, %p5, %p4;118; CHECK-NEXT: and.pred %p7, %p2, %p4;119; CHECK-NEXT: and.pred %p8, %p3, %p6;120; CHECK-NEXT: or.pred %p9, %p8, %p7;121; CHECK-NEXT: xor.pred %p10, %p9, %p3;122; CHECK-NEXT: mov.b64 %rd1, test_select_i1_basic_folding_param_4;123; CHECK-NEXT: mov.b64 %rd2, test_select_i1_basic_folding_param_3;124; CHECK-NEXT: selp.b64 %rd3, %rd2, %rd1, %p10;125; CHECK-NEXT: ld.param.b32 %r4, [%rd3];126; CHECK-NEXT: st.param.b32 [func_retval0], %r4;127; CHECK-NEXT: ret;128 %b1 = icmp eq i32 %v1, 0129 %b2 = icmp eq i32 %v2, 0130 %b3 = icmp eq i32 %v3, 0131 %b4 = xor i1 %b1, %b2132 %b5 = and i1 %b4, %b3133 %select_i1 = select i1 %b2, i1 %b5, i1 %b3134 %b6 = xor i1 %select_i1, %b2135 %select_ret = select i1 %b6, i32 %true, i32 %false136 ret i32 %select_ret137}138