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1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-attributes --version 52; RUN: opt < %s -S -mtriple=nvptx-nvidia-cuda -mcpu=sm_20 -passes=nvvm-intr-range | FileCheck %s3; RUN: llvm-as < %s | llvm-dis | FileCheck %s --check-prefix=DEFAULT4 5define ptx_kernel i32 @test_maxntid() "nvvm.maxntid"="32,1,3" {6; CHECK-LABEL: define ptx_kernel i32 @test_maxntid(7; CHECK-SAME: ) #[[ATTR0:[0-9]+]] {8; CHECK-NEXT: [[TMP1:%.*]] = call range(i32 0, 96) i32 @llvm.nvvm.read.ptx.sreg.tid.x()9; CHECK-NEXT: [[TMP3:%.*]] = call range(i32 0, 96) i32 @llvm.nvvm.read.ptx.sreg.tid.y()10; CHECK-NEXT: [[TMP2:%.*]] = call range(i32 0, 64) i32 @llvm.nvvm.read.ptx.sreg.tid.z()11; CHECK-NEXT: [[TMP11:%.*]] = call range(i32 1, 97) i32 @llvm.nvvm.read.ptx.sreg.ntid.x()12; CHECK-NEXT: [[TMP4:%.*]] = call range(i32 1, 97) i32 @llvm.nvvm.read.ptx.sreg.ntid.y()13; CHECK-NEXT: [[TMP6:%.*]] = call range(i32 1, 65) i32 @llvm.nvvm.read.ptx.sreg.ntid.z()14; CHECK-NEXT: [[TMP7:%.*]] = add i32 [[TMP1]], [[TMP3]]15; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[TMP7]], [[TMP2]]16; CHECK-NEXT: [[TMP9:%.*]] = add i32 [[TMP8]], [[TMP11]]17; CHECK-NEXT: [[TMP10:%.*]] = add i32 [[TMP9]], [[TMP4]]18; CHECK-NEXT: [[TMP5:%.*]] = add i32 [[TMP10]], [[TMP6]]19; CHECK-NEXT: ret i32 [[TMP5]]20;21 %1 = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()22 %2 = call i32 @llvm.nvvm.read.ptx.sreg.tid.y()23 %3 = call i32 @llvm.nvvm.read.ptx.sreg.tid.z()24 %4 = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()25 %5 = call i32 @llvm.nvvm.read.ptx.sreg.ntid.y()26 %6 = call i32 @llvm.nvvm.read.ptx.sreg.ntid.z()27 %7 = add i32 %1, %228 %8 = add i32 %7, %329 %9 = add i32 %8, %430 %10 = add i32 %9, %531 %11 = add i32 %10, %632 ret i32 %1133}34 35define ptx_kernel i32 @test_reqntid() "nvvm.reqntid"="20" {36; CHECK-LABEL: define ptx_kernel i32 @test_reqntid(37; CHECK-SAME: ) #[[ATTR1:[0-9]+]] {38; CHECK-NEXT: [[TMP1:%.*]] = call range(i32 0, 20) i32 @llvm.nvvm.read.ptx.sreg.tid.x()39; CHECK-NEXT: [[TMP5:%.*]] = call range(i32 0, 20) i32 @llvm.nvvm.read.ptx.sreg.tid.y()40; CHECK-NEXT: [[TMP2:%.*]] = call range(i32 0, 20) i32 @llvm.nvvm.read.ptx.sreg.tid.z()41; CHECK-NEXT: [[TMP4:%.*]] = call range(i32 1, 21) i32 @llvm.nvvm.read.ptx.sreg.ntid.x()42; CHECK-NEXT: [[TMP3:%.*]] = call range(i32 1, 21) i32 @llvm.nvvm.read.ptx.sreg.ntid.y()43; CHECK-NEXT: [[TMP6:%.*]] = call range(i32 1, 21) i32 @llvm.nvvm.read.ptx.sreg.ntid.z()44; CHECK-NEXT: [[TMP7:%.*]] = add i32 [[TMP1]], [[TMP5]]45; CHECK-NEXT: [[TMP8:%.*]] = add i32 [[TMP7]], [[TMP2]]46; CHECK-NEXT: [[TMP9:%.*]] = add i32 [[TMP8]], [[TMP4]]47; CHECK-NEXT: [[TMP10:%.*]] = add i32 [[TMP9]], [[TMP3]]48; CHECK-NEXT: [[TMP11:%.*]] = add i32 [[TMP10]], [[TMP6]]49; CHECK-NEXT: ret i32 [[TMP3]]50;51 %1 = call i32 @llvm.nvvm.read.ptx.sreg.tid.x()52 %2 = call i32 @llvm.nvvm.read.ptx.sreg.tid.y()53 %3 = call i32 @llvm.nvvm.read.ptx.sreg.tid.z()54 %4 = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()55 %5 = call i32 @llvm.nvvm.read.ptx.sreg.ntid.y()56 %6 = call i32 @llvm.nvvm.read.ptx.sreg.ntid.z()57 %7 = add i32 %1, %258 %8 = add i32 %7, %359 %9 = add i32 %8, %460 %10 = add i32 %9, %561 %11 = add i32 %10, %662 ret i32 %563}64 65;; A case like this could occur if a function with the sreg intrinsic was66;; inlined into a kernel where the tid metadata is present, ensure the range is67;; updated.68define ptx_kernel i32 @test_inlined() "nvvm.maxntid"="4" {69; CHECK-LABEL: define ptx_kernel i32 @test_inlined(70; CHECK-SAME: ) #[[ATTR2:[0-9]+]] {71; CHECK-NEXT: [[TMP1:%.*]] = call range(i32 0, 4) i32 @llvm.nvvm.read.ptx.sreg.tid.x()72; CHECK-NEXT: ret i32 [[TMP1]]73;74 %1 = call range(i32 0, 1024) i32 @llvm.nvvm.read.ptx.sreg.tid.x()75 ret i32 %176}77 78define ptx_kernel i32 @test_cluster_ctaid() "nvvm.maxclusterrank"="8" {79; CHECK-LABEL: define ptx_kernel i32 @test_cluster_ctaid(80; CHECK-SAME: ) #[[ATTR3:[0-9]+]] {81; CHECK-NEXT: [[TMP1:%.*]] = call range(i32 0, 8) i32 @llvm.nvvm.read.ptx.sreg.cluster.ctaid.x()82; CHECK-NEXT: [[TMP2:%.*]] = call range(i32 0, 8) i32 @llvm.nvvm.read.ptx.sreg.cluster.ctaid.y()83; CHECK-NEXT: [[TMP3:%.*]] = call range(i32 0, 8) i32 @llvm.nvvm.read.ptx.sreg.cluster.ctaid.z()84; CHECK-NEXT: [[TMP5:%.*]] = call range(i32 1, 9) i32 @llvm.nvvm.read.ptx.sreg.cluster.nctaid.x()85; CHECK-NEXT: [[TMP6:%.*]] = call range(i32 1, 9) i32 @llvm.nvvm.read.ptx.sreg.cluster.nctaid.y()86; CHECK-NEXT: [[TMP7:%.*]] = call range(i32 1, 9) i32 @llvm.nvvm.read.ptx.sreg.cluster.nctaid.z()87; CHECK-NEXT: [[TMP9:%.*]] = add i32 [[TMP1]], [[TMP2]]88; CHECK-NEXT: [[TMP10:%.*]] = add i32 [[TMP9]], [[TMP3]]89; CHECK-NEXT: [[TMP12:%.*]] = add i32 [[TMP10]], [[TMP5]]90; CHECK-NEXT: [[TMP13:%.*]] = add i32 [[TMP12]], [[TMP6]]91; CHECK-NEXT: [[TMP15:%.*]] = add i32 [[TMP13]], [[TMP7]]92; CHECK-NEXT: ret i32 [[TMP15]]93;94 %1 = call i32 @llvm.nvvm.read.ptx.sreg.cluster.ctaid.x()95 %2 = call i32 @llvm.nvvm.read.ptx.sreg.cluster.ctaid.y()96 %3 = call i32 @llvm.nvvm.read.ptx.sreg.cluster.ctaid.z()97 %4 = call i32 @llvm.nvvm.read.ptx.sreg.cluster.nctaid.x()98 %5 = call i32 @llvm.nvvm.read.ptx.sreg.cluster.nctaid.y()99 %6 = call i32 @llvm.nvvm.read.ptx.sreg.cluster.nctaid.z()100 %7 = add i32 %1, %2101 %8 = add i32 %7, %3102 %9 = add i32 %8, %4103 %10 = add i32 %9, %5104 %11 = add i32 %10, %6105 ret i32 %11106}107 108define ptx_kernel i32 @test_cluster_dim() "nvvm.cluster_dim"="4,4,1" {109; CHECK-LABEL: define ptx_kernel i32 @test_cluster_dim(110; CHECK-SAME: ) #[[ATTR4:[0-9]+]] {111; CHECK-NEXT: [[TMP1:%.*]] = call range(i32 0, 16) i32 @llvm.nvvm.read.ptx.sreg.cluster.ctaid.x()112; CHECK-NEXT: [[TMP2:%.*]] = call range(i32 0, 16) i32 @llvm.nvvm.read.ptx.sreg.cluster.ctaid.y()113; CHECK-NEXT: [[TMP3:%.*]] = call range(i32 0, 16) i32 @llvm.nvvm.read.ptx.sreg.cluster.ctaid.z()114; CHECK-NEXT: [[TMP5:%.*]] = call range(i32 1, 17) i32 @llvm.nvvm.read.ptx.sreg.cluster.nctaid.x()115; CHECK-NEXT: [[TMP6:%.*]] = call range(i32 1, 17) i32 @llvm.nvvm.read.ptx.sreg.cluster.nctaid.y()116; CHECK-NEXT: [[TMP7:%.*]] = call range(i32 1, 17) i32 @llvm.nvvm.read.ptx.sreg.cluster.nctaid.z()117; CHECK-NEXT: [[TMP9:%.*]] = add i32 [[TMP1]], [[TMP2]]118; CHECK-NEXT: [[TMP10:%.*]] = add i32 [[TMP9]], [[TMP3]]119; CHECK-NEXT: [[TMP12:%.*]] = add i32 [[TMP10]], [[TMP5]]120; CHECK-NEXT: [[TMP13:%.*]] = add i32 [[TMP12]], [[TMP6]]121; CHECK-NEXT: [[TMP15:%.*]] = add i32 [[TMP13]], [[TMP7]]122; CHECK-NEXT: ret i32 [[TMP15]]123;124 %1 = call i32 @llvm.nvvm.read.ptx.sreg.cluster.ctaid.x()125 %2 = call i32 @llvm.nvvm.read.ptx.sreg.cluster.ctaid.y()126 %3 = call i32 @llvm.nvvm.read.ptx.sreg.cluster.ctaid.z()127 %4 = call i32 @llvm.nvvm.read.ptx.sreg.cluster.nctaid.x()128 %5 = call i32 @llvm.nvvm.read.ptx.sreg.cluster.nctaid.y()129 %6 = call i32 @llvm.nvvm.read.ptx.sreg.cluster.nctaid.z()130 %7 = add i32 %1, %2131 %8 = add i32 %7, %3132 %9 = add i32 %8, %4133 %10 = add i32 %9, %5134 %11 = add i32 %10, %6135 ret i32 %11136}137 138 139; DEFAULT-DAG: declare noundef range(i32 0, 1024) i32 @llvm.nvvm.read.ptx.sreg.tid.x()140; DEFAULT-DAG: declare noundef range(i32 0, 1024) i32 @llvm.nvvm.read.ptx.sreg.tid.y()141; DEFAULT-DAG: declare noundef range(i32 0, 64) i32 @llvm.nvvm.read.ptx.sreg.tid.z()142; DEFAULT-DAG: declare noundef range(i32 0, 1) i32 @llvm.nvvm.read.ptx.sreg.tid.w()143 144; DEFAULT-DAG: declare noundef range(i32 1, 1025) i32 @llvm.nvvm.read.ptx.sreg.ntid.x()145; DEFAULT-DAG: declare noundef range(i32 1, 1025) i32 @llvm.nvvm.read.ptx.sreg.ntid.y()146; DEFAULT-DAG: declare noundef range(i32 1, 65) i32 @llvm.nvvm.read.ptx.sreg.ntid.z()147; DEFAULT-DAG: declare noundef range(i32 0, 1) i32 @llvm.nvvm.read.ptx.sreg.ntid.w()148 149; DEFAULT-DAG: declare noundef range(i32 0, 32) i32 @llvm.nvvm.read.ptx.sreg.laneid()150; DEFAULT-DAG: declare noundef range(i32 32, 33) i32 @llvm.nvvm.read.ptx.sreg.warpsize()151 152; DEFAULT-DAG: declare noundef range(i32 0, 2147483647) i32 @llvm.nvvm.read.ptx.sreg.ctaid.x()153; DEFAULT-DAG: declare noundef range(i32 0, 65535) i32 @llvm.nvvm.read.ptx.sreg.ctaid.y()154; DEFAULT-DAG: declare noundef range(i32 0, 65535) i32 @llvm.nvvm.read.ptx.sreg.ctaid.z()155; DEFAULT-DAG: declare noundef range(i32 0, 1) i32 @llvm.nvvm.read.ptx.sreg.ctaid.w()156 157; DEFAULT-DAG: declare noundef range(i32 1, -2147483648) i32 @llvm.nvvm.read.ptx.sreg.nctaid.x()158; DEFAULT-DAG: declare noundef range(i32 1, 65536) i32 @llvm.nvvm.read.ptx.sreg.nctaid.y()159; DEFAULT-DAG: declare noundef range(i32 1, 65536) i32 @llvm.nvvm.read.ptx.sreg.nctaid.z()160; DEFAULT-DAG: declare noundef range(i32 0, 1) i32 @llvm.nvvm.read.ptx.sreg.nctaid.w()161 162; DEFAULT-DAG: declare noundef range(i32 0, 2147483647) i32 @llvm.nvvm.read.ptx.sreg.clusterid.x()163; DEFAULT-DAG: declare noundef range(i32 0, 65535) i32 @llvm.nvvm.read.ptx.sreg.clusterid.y()164; DEFAULT-DAG: declare noundef range(i32 0, 65535) i32 @llvm.nvvm.read.ptx.sreg.clusterid.z()165; DEFAULT-DAG: declare noundef range(i32 0, 1) i32 @llvm.nvvm.read.ptx.sreg.clusterid.w()166 167; DEFAULT-DAG: declare noundef range(i32 1, -2147483648) i32 @llvm.nvvm.read.ptx.sreg.nclusterid.x()168; DEFAULT-DAG: declare noundef range(i32 1, 65536) i32 @llvm.nvvm.read.ptx.sreg.nclusterid.y()169; DEFAULT-DAG: declare noundef range(i32 1, 65536) i32 @llvm.nvvm.read.ptx.sreg.nclusterid.z()170; DEFAULT-DAG: declare noundef range(i32 0, 1) i32 @llvm.nvvm.read.ptx.sreg.nclusterid.w()171 172; DEFAULT-DAG: declare noundef range(i32 0, 2147483647) i32 @llvm.nvvm.read.ptx.sreg.cluster.ctaid.x()173; DEFAULT-DAG: declare noundef range(i32 0, 65535) i32 @llvm.nvvm.read.ptx.sreg.cluster.ctaid.y()174; DEFAULT-DAG: declare noundef range(i32 0, 65535) i32 @llvm.nvvm.read.ptx.sreg.cluster.ctaid.z()175; DEFAULT-DAG: declare noundef range(i32 0, 1) i32 @llvm.nvvm.read.ptx.sreg.cluster.ctaid.w()176 177; DEFAULT-DAG: declare noundef range(i32 1, -2147483648) i32 @llvm.nvvm.read.ptx.sreg.cluster.nctaid.x()178; DEFAULT-DAG: declare noundef range(i32 1, 65536) i32 @llvm.nvvm.read.ptx.sreg.cluster.nctaid.y()179; DEFAULT-DAG: declare noundef range(i32 1, 65536) i32 @llvm.nvvm.read.ptx.sreg.cluster.nctaid.z()180; DEFAULT-DAG: declare noundef range(i32 0, 1) i32 @llvm.nvvm.read.ptx.sreg.cluster.nctaid.w()181 182declare i32 @llvm.nvvm.read.ptx.sreg.tid.x()183declare i32 @llvm.nvvm.read.ptx.sreg.tid.y()184declare i32 @llvm.nvvm.read.ptx.sreg.tid.z()185declare i32 @llvm.nvvm.read.ptx.sreg.tid.w()186 187declare i32 @llvm.nvvm.read.ptx.sreg.ntid.x()188declare i32 @llvm.nvvm.read.ptx.sreg.ntid.y()189declare i32 @llvm.nvvm.read.ptx.sreg.ntid.z()190declare i32 @llvm.nvvm.read.ptx.sreg.ntid.w()191 192declare i32 @llvm.nvvm.read.ptx.sreg.warpsize()193declare i32 @llvm.nvvm.read.ptx.sreg.laneid()194 195declare i32 @llvm.nvvm.read.ptx.sreg.ctaid.x()196declare i32 @llvm.nvvm.read.ptx.sreg.ctaid.y()197declare i32 @llvm.nvvm.read.ptx.sreg.ctaid.z()198declare i32 @llvm.nvvm.read.ptx.sreg.ctaid.w()199 200declare i32 @llvm.nvvm.read.ptx.sreg.nctaid.x()201declare i32 @llvm.nvvm.read.ptx.sreg.nctaid.y()202declare i32 @llvm.nvvm.read.ptx.sreg.nctaid.z()203declare i32 @llvm.nvvm.read.ptx.sreg.nctaid.w()204 205declare i32 @llvm.nvvm.read.ptx.sreg.clusterid.x()206declare i32 @llvm.nvvm.read.ptx.sreg.clusterid.y()207declare i32 @llvm.nvvm.read.ptx.sreg.clusterid.z()208declare i32 @llvm.nvvm.read.ptx.sreg.clusterid.w()209 210declare i32 @llvm.nvvm.read.ptx.sreg.nclusterid.x()211declare i32 @llvm.nvvm.read.ptx.sreg.nclusterid.y()212declare i32 @llvm.nvvm.read.ptx.sreg.nclusterid.z()213declare i32 @llvm.nvvm.read.ptx.sreg.nclusterid.w()214 215declare i32 @llvm.nvvm.read.ptx.sreg.cluster.ctaid.x()216declare i32 @llvm.nvvm.read.ptx.sreg.cluster.ctaid.y()217declare i32 @llvm.nvvm.read.ptx.sreg.cluster.ctaid.z()218declare i32 @llvm.nvvm.read.ptx.sreg.cluster.ctaid.w()219 220declare i32 @llvm.nvvm.read.ptx.sreg.cluster.nctaid.x()221declare i32 @llvm.nvvm.read.ptx.sreg.cluster.nctaid.y()222declare i32 @llvm.nvvm.read.ptx.sreg.cluster.nctaid.z()223declare i32 @llvm.nvvm.read.ptx.sreg.cluster.nctaid.w()224