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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc < %s -mcpu=sm_100 | FileCheck %s --check-prefix=F32X23; RUN: llc < %s -mcpu=sm_90 | FileCheck %s --check-prefix=NOF32X24; RUN: llc < %s -mcpu=sm_100 -nvptx-no-f32x2 | FileCheck %s --check-prefix=NOF32X25 6target triple = "nvptx64-nvidia-cuda"7 8define <2 x float> @test(<2 x float> %a, <2 x float> %b)  {9; F32X2-LABEL: test(10; F32X2:       {11; F32X2-NEXT:    .reg .b64 %rd<4>;12; F32X2-EMPTY:13; F32X2-NEXT:  // %bb.0:14; F32X2-NEXT:    ld.param.b64 %rd1, [test_param_0];15; F32X2-NEXT:    ld.param.b64 %rd2, [test_param_1];16; F32X2-NEXT:    add.rn.f32x2 %rd3, %rd1, %rd2;17; F32X2-NEXT:    st.param.b64 [func_retval0], %rd3;18; F32X2-NEXT:    ret;19;20; NOF32X2-LABEL: test(21; NOF32X2:       {22; NOF32X2-NEXT:    .reg .b32 %r<7>;23; NOF32X2-EMPTY:24; NOF32X2-NEXT:  // %bb.0:25; NOF32X2-NEXT:    ld.param.v2.b32 {%r1, %r2}, [test_param_0];26; NOF32X2-NEXT:    ld.param.v2.b32 {%r3, %r4}, [test_param_1];27; NOF32X2-NEXT:    add.rn.f32 %r5, %r2, %r4;28; NOF32X2-NEXT:    add.rn.f32 %r6, %r1, %r3;29; NOF32X2-NEXT:    st.param.v2.b32 [func_retval0], {%r6, %r5};30; NOF32X2-NEXT:    ret;31  %c = fadd <2 x float> %a, %b32  ret <2 x float> %c33}34