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1; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_20 | FileCheck %s2; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64 -mcpu=sm_20 | %ptxas-verify %}3 4target triple = "nvptx-nvidia-cuda"5 6; Function Attrs: nounwind7; CHECK: .entry foo8define ptx_kernel void @foo(ptr nocapture %a) #0 {9 %val = load float, ptr %a10 %tan = tail call fastcc float @__nv_fast_tanf(float %val)11 store float %tan, ptr %a12 ret void13}14 15; Function Attrs: nounwind readnone16declare float @llvm.nvvm.sin.approx.ftz.f(float) #117 18; Function Attrs: nounwind readnone19declare float @llvm.nvvm.cos.approx.ftz.f(float) #120 21; Function Attrs: nounwind readnone22declare float @llvm.nvvm.div.approx.ftz.f(float, float) #123 24; Function Attrs: alwaysinline inlinehint nounwind readnone25; CHECK: .func (.param .b32 func_retval0) __nv_fast_tanf26define internal fastcc float @__nv_fast_tanf(float %a) #2 {27entry:28 %0 = tail call float @llvm.nvvm.sin.approx.ftz.f(float %a)29 %1 = tail call float @llvm.nvvm.cos.approx.ftz.f(float %a)30 %2 = tail call float @llvm.nvvm.div.approx.ftz.f(float %0, float %1)31 ret float %232}33 34attributes #0 = { nounwind }35attributes #1 = { nounwind readnone }36attributes #2 = { alwaysinline inlinehint nounwind readnone }37