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1; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_20 | FileCheck %s2; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64 -mcpu=sm_20 | %ptxas-verify %}3 4target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-n16:32:64"5 6 7define void @one(i64 %a, i64 %b, ptr %p1, ptr %p2) {8; CHECK: cvt.s64.s89; CHECK: cvt.s64.s810entry:11 %sext = shl i64 %a, 5612 %conv1 = ashr exact i64 %sext, 5613 %sext1 = shl i64 %b, 5614 %conv4 = ashr exact i64 %sext1, 5615 %shr = ashr i64 %a, 1616 %shr9 = ashr i64 %b, 1617 %add = add nsw i64 %conv4, %conv118 store i64 %add, ptr %p1, align 819 %add17 = add nsw i64 %shr9, %shr20 store i64 %add17, ptr %p2, align 821 ret void22}23 24 25define void @two(i64 %a, i64 %b, ptr %p1, ptr %p2) {26entry:27; CHECK: cvt.s64.s3228; CHECK: cvt.s64.s3229 %sext = shl i64 %a, 3230 %conv1 = ashr exact i64 %sext, 3231 %sext1 = shl i64 %b, 3232 %conv4 = ashr exact i64 %sext1, 3233 %shr = ashr i64 %a, 1634 %shr9 = ashr i64 %b, 1635 %add = add nsw i64 %conv4, %conv136 store i64 %add, ptr %p1, align 837 %add17 = add nsw i64 %shr9, %shr38 store i64 %add17, ptr %p2, align 839 ret void40}41 42 43define void @three(i64 %a, i64 %b, ptr %p1, ptr %p2) {44entry:45; CHECK: cvt.s64.s1646; CHECK: cvt.s64.s1647 %sext = shl i64 %a, 4848 %conv1 = ashr exact i64 %sext, 4849 %sext1 = shl i64 %b, 4850 %conv4 = ashr exact i64 %sext1, 4851 %shr = ashr i64 %a, 1652 %shr9 = ashr i64 %b, 1653 %add = add nsw i64 %conv4, %conv154 store i64 %add, ptr %p1, align 855 %add17 = add nsw i64 %shr9, %shr56 store i64 %add17, ptr %p2, align 857 ret void58}59 60 61define void @four(i32 %a, i32 %b, ptr %p1, ptr %p2) {62entry:63; CHECK: cvt.s32.s864; CHECK: cvt.s32.s865 %sext = shl i32 %a, 2466 %conv1 = ashr exact i32 %sext, 2467 %sext1 = shl i32 %b, 2468 %conv4 = ashr exact i32 %sext1, 2469 %shr = ashr i32 %a, 1670 %shr9 = ashr i32 %b, 1671 %add = add nsw i32 %conv4, %conv172 store i32 %add, ptr %p1, align 473 %add17 = add nsw i32 %shr9, %shr74 store i32 %add17, ptr %p2, align 475 ret void76}77 78 79define void @five(i32 %a, i32 %b, ptr %p1, ptr %p2) {80entry:81; CHECK: cvt.s32.s1682; CHECK: cvt.s32.s1683 %sext = shl i32 %a, 1684 %conv1 = ashr exact i32 %sext, 1685 %sext1 = shl i32 %b, 1686 %conv4 = ashr exact i32 %sext1, 1687 %shr = ashr i32 %a, 1688 %shr9 = ashr i32 %b, 1689 %add = add nsw i32 %conv4, %conv190 store i32 %add, ptr %p1, align 491 %add17 = add nsw i32 %shr9, %shr92 store i32 %add17, ptr %p2, align 493 ret void94}95 96 97define void @six(i16 %a, i16 %b, ptr %p1, ptr %p2) {98entry:99; CHECK: cvt.s16.s8100; CHECK: cvt.s16.s8101 %sext = shl i16 %a, 8102 %conv1 = ashr exact i16 %sext, 8103 %sext1 = shl i16 %b, 8104 %conv4 = ashr exact i16 %sext1, 8105 %shr = ashr i16 %a, 8106 %shr9 = ashr i16 %b, 8107 %add = add nsw i16 %conv4, %conv1108 store i16 %add, ptr %p1, align 4109 %add17 = add nsw i16 %shr9, %shr110 store i16 %add17, ptr %p2, align 4111 ret void112}113