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1; RUN: llc < %s -mtriple=nvptx -mcpu=sm_20 | FileCheck %s --check-prefix=PTX322; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_20 | FileCheck %s --check-prefix=PTX643; RUN: %if ptxas-ptr32 %{ llc < %s -mtriple=nvptx -mcpu=sm_20 | %ptxas-verify %}4; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64 -mcpu=sm_20 | %ptxas-verify %}5 6;; i87 8define void @st_global_i8(ptr addrspace(0) %ptr, i8 %a) {9; PTX32: st.b8 [%r{{[0-9]+}}], %rs{{[0-9]+}}10; PTX32: ret11; PTX64: st.b8 [%rd{{[0-9]+}}], %rs{{[0-9]+}}12; PTX64: ret13 store i8 %a, ptr addrspace(0) %ptr14 ret void15}16 17;; i1618 19define void @st_global_i16(ptr addrspace(0) %ptr, i16 %a) {20; PTX32: st.b16 [%r{{[0-9]+}}], %rs{{[0-9]+}}21; PTX32: ret22; PTX64: st.b16 [%rd{{[0-9]+}}], %rs{{[0-9]+}}23; PTX64: ret24 store i16 %a, ptr addrspace(0) %ptr25 ret void26}27 28;; i3229 30define void @st_global_i32(ptr addrspace(0) %ptr, i32 %a) {31; PTX32: st.b32 [%r{{[0-9]+}}], %r{{[0-9]+}}32; PTX32: ret33; PTX64: st.b32 [%rd{{[0-9]+}}], %r{{[0-9]+}}34; PTX64: ret35 store i32 %a, ptr addrspace(0) %ptr36 ret void37}38 39;; i6440 41define void @st_global_i64(ptr addrspace(0) %ptr, i64 %a) {42; PTX32: st.b64 [%r{{[0-9]+}}], %rd{{[0-9]+}}43; PTX32: ret44; PTX64: st.b64 [%rd{{[0-9]+}}], %rd{{[0-9]+}}45; PTX64: ret46 store i64 %a, ptr addrspace(0) %ptr47 ret void48}49 50;; f3251 52define void @st_global_f32(ptr addrspace(0) %ptr, float %a) {53; PTX32: st.b32 [%r{{[0-9]+}}], %r{{[0-9]+}}54; PTX32: ret55; PTX64: st.b32 [%rd{{[0-9]+}}], %r{{[0-9]+}}56; PTX64: ret57 store float %a, ptr addrspace(0) %ptr58 ret void59}60 61;; f6462 63define void @st_global_f64(ptr addrspace(0) %ptr, double %a) {64; PTX32: st.b64 [%r{{[0-9]+}}], %rd{{[0-9]+}}65; PTX32: ret66; PTX64: st.b64 [%rd{{[0-9]+}}], %rd{{[0-9]+}}67; PTX64: ret68 store double %a, ptr addrspace(0) %ptr69 ret void70}71