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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_20 -verify-machineinstrs | FileCheck %s3; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_30 -verify-machineinstrs | FileCheck %s4; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64 -mcpu=sm_20 -verify-machineinstrs | %ptxas-verify %}5; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64 -mcpu=sm_30 -verify-machineinstrs | %ptxas-verify %}6 7target triple = "nvptx-unknown-cuda"8 9declare void @llvm.nvvm.sust.b.1d.i32.trap(i64, i32, i32)10declare i64 @llvm.nvvm.texsurf.handle.internal.p1(ptr addrspace(1))11 12 13define ptx_kernel void @foo(i64 %img, i32 %val, i32 %idx) {14; CHECK-LABEL: foo(15; CHECK: {16; CHECK-NEXT: .reg .b32 %r<3>;17; CHECK-NEXT: .reg .b64 %rd<2>;18; CHECK-EMPTY:19; CHECK-NEXT: // %bb.0:20; CHECK-NEXT: ld.param.b64 %rd1, [foo_param_0];21; CHECK-NEXT: ld.param.b32 %r1, [foo_param_1];22; CHECK-NEXT: ld.param.b32 %r2, [foo_param_2];23; CHECK-NEXT: sust.b.1d.b32.trap [%rd1, {%r2}], {%r1};24; CHECK-NEXT: ret;25 tail call void @llvm.nvvm.sust.b.1d.i32.trap(i64 %img, i32 %idx, i32 %val)26 ret void27}28 29 30@surf0 = internal addrspace(1) global i64 0, align 831 32 33define ptx_kernel void @bar(i32 %val, i32 %idx) {34; CHECK-LABEL: bar(35; CHECK: {36; CHECK-NEXT: .reg .b32 %r<3>;37; CHECK-EMPTY:38; CHECK-NEXT: // %bb.0:39; CHECK-NEXT: ld.param.b32 %r1, [bar_param_0];40; CHECK-NEXT: ld.param.b32 %r2, [bar_param_1];41; CHECK-NEXT: sust.b.1d.b32.trap [surf0, {%r2}], {%r1};42; CHECK-NEXT: ret;43 %surfHandle = tail call i64 @llvm.nvvm.texsurf.handle.internal.p1(ptr addrspace(1) @surf0)44 tail call void @llvm.nvvm.sust.b.1d.i32.trap(i64 %surfHandle, i32 %idx, i32 %val)45 ret void46}47 48 49!nvvm.annotations = !{!1}50!1 = !{ptr addrspace(1) @surf0, !"surface", i32 1}51 52