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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc < %s -mcpu=sm_75 -mattr=+ptx70 | FileCheck %s3; RUN: %if ptxas-sm_75 && ptxas-isa-7.0 %{ llc < %s -mcpu=sm_75 -mattr=+ptx70 | %ptxas-verify -arch=sm_75 %}4 5target triple = "nvptx64-nvidia-cuda"6 7define float @test1(float %in) local_unnamed_addr {8; CHECK-LABEL: test1(9; CHECK: {10; CHECK-NEXT: .reg .b32 %r<3>;11; CHECK-EMPTY:12; CHECK-NEXT: // %bb.0:13; CHECK-NEXT: ld.param.b32 %r1, [test1_param_0];14; CHECK-NEXT: tanh.approx.f32 %r2, %r1;15; CHECK-NEXT: st.param.b32 [func_retval0], %r2;16; CHECK-NEXT: ret;17 %call = call afn float @llvm.tanh.f32(float %in)18 ret float %call19}20 21define half @test2(half %in) local_unnamed_addr {22; CHECK-LABEL: test2(23; CHECK: {24; CHECK-NEXT: .reg .b16 %rs<3>;25; CHECK-NEXT: .reg .b32 %r<3>;26; CHECK-EMPTY:27; CHECK-NEXT: // %bb.0:28; CHECK-NEXT: ld.param.b16 %rs1, [test2_param_0];29; CHECK-NEXT: cvt.f32.f16 %r1, %rs1;30; CHECK-NEXT: tanh.approx.f32 %r2, %r1;31; CHECK-NEXT: cvt.rn.f16.f32 %rs2, %r2;32; CHECK-NEXT: st.param.b16 [func_retval0], %rs2;33; CHECK-NEXT: ret;34 %call = call afn half @llvm.tanh.f16(half %in)35 ret half %call36}37 38declare float @llvm.tanh.f32(float)39declare half @llvm.tanh.f16(half)40 41