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1; RUN: llc -verify-machineinstrs < %s -mtriple=ppc32-- -mcpu=g52; END.3 4define void @test(ptr %stack) {5entry:6 %tmp9 = icmp eq i32 0, 0 ; <i1> [#uses=1]7 %tmp30 = icmp eq i32 0, 0 ; <i1> [#uses=1]8 br i1 %tmp30, label %cond_next54, label %cond_true319cond_true860: ; preds = %bb85510 %tmp879 = tail call <4 x float> @llvm.ppc.altivec.vmaddfp( <4 x float> zeroinitializer, <4 x float> zeroinitializer, <4 x float> zeroinitializer ) ; <<4 x float>> [#uses=1]11 %tmp880 = bitcast <4 x float> %tmp879 to <4 x i32> ; <<4 x i32>> [#uses=2]12 %tmp883 = shufflevector <4 x i32> %tmp880, <4 x i32> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 > ; <<4 x i32>> [#uses=1]13 %tmp883.upgrd.1 = bitcast <4 x i32> %tmp883 to <4 x float> ; <<4 x float>> [#uses=1]14 %tmp885 = shufflevector <4 x i32> %tmp880, <4 x i32> undef, <4 x i32> < i32 2, i32 2, i32 2, i32 2 > ; <<4 x i32>> [#uses=1]15 %tmp885.upgrd.2 = bitcast <4 x i32> %tmp885 to <4 x float> ; <<4 x float>> [#uses=1]16 br label %cond_next90517cond_true31: ; preds = %entry18 ret void19cond_next54: ; preds = %entry20 br i1 %tmp9, label %cond_false385, label %bb27921bb279: ; preds = %cond_next5422 ret void23cond_false385: ; preds = %cond_next5424 %tmp388 = icmp eq i32 0, 0 ; <i1> [#uses=1]25 br i1 %tmp388, label %cond_next463, label %cond_true38926cond_true389: ; preds = %cond_false38527 ret void28cond_next463: ; preds = %cond_false38529 %tmp1208107 = icmp ugt ptr null, %stack ; <i1> [#uses=1]30 br i1 %tmp1208107, label %cond_true1209.preheader, label %bb121231cond_true498: ; preds = %cond_true1209.preheader32 ret void33cond_true519: ; preds = %cond_true1209.preheader34 %bothcond = or i1 false, false ; <i1> [#uses=1]35 br i1 %bothcond, label %bb855, label %bb98036cond_false548: ; preds = %cond_true1209.preheader37 ret void38bb855: ; preds = %cond_true51939 %tmp859 = icmp eq i32 0, 0 ; <i1> [#uses=1]40 br i1 %tmp859, label %cond_true860, label %cond_next90541cond_next905: ; preds = %bb855, %cond_true86042 %vfpw2.4 = phi <4 x float> [ %tmp885.upgrd.2, %cond_true860 ], [ undef, %bb855 ] ; <<4 x float>> [#uses=0]43 %vfpw1.4 = phi <4 x float> [ %tmp883.upgrd.1, %cond_true860 ], [ undef, %bb855 ] ; <<4 x float>> [#uses=0]44 %tmp930 = bitcast <4 x float> zeroinitializer to <4 x i32> ; <<4 x i32>> [#uses=0]45 ret void46bb980: ; preds = %cond_true51947 ret void48cond_true1209.preheader: ; preds = %cond_next46349 %tmp496 = and i32 0, 12288 ; <i32> [#uses=1]50 switch i32 %tmp496, label %cond_false548 [51 i32 0, label %cond_true49852 i32 4096, label %cond_true51953 ]54bb1212: ; preds = %cond_next46355 ret void56}57 58declare <4 x float> @llvm.ppc.altivec.vmaddfp(<4 x float>, <4 x float>, <4 x float>)59