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1; RUN: llc -verify-machineinstrs < %s | FileCheck %s2; RUN: llc -verify-machineinstrs < %s -regalloc=fast -optimize-regalloc=0 | FileCheck %s3; The first argument of subfc must not be the same as any other register.4 5; CHECK: APP6; CHECK: subc [[REG:[0-9]+]],7; CHECK-NOT: [[REG]]8; CHECK: NO_APP9; PR135710 11;target datalayout = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64"12target triple = "powerpc-unknown-linux-gnu"13 14;long long test(int A, int B, int C) {15; unsigned X, Y;16; __asm__ ("subf%I3c %1,%4,%3\n\tsubfze %0,%2"17; : "=r" (X), "=&r" (Y)18; : "r" (A), "rI" (B), "r" (C));19; return ((long long)Y << 32) | X;20;}21 22define i64 @test(i32 %A, i32 %B, i32 %C) nounwind {23entry:24 %Y = alloca i32, align 4 ; <ptr> [#uses=2]25 %tmp4 = call i32 asm "subf${3:I}c $1,$4,$3\0A\09subfze $0,$2", "=r,=*&r,r,rI,r"( ptr elementtype( i32) %Y, i32 %A, i32 %B, i32 %C ) ; <i32> [#uses=1]26 %tmp5 = load i32, ptr %Y ; <i32> [#uses=1]27 %tmp56 = zext i32 %tmp5 to i64 ; <i64> [#uses=1]28 %tmp7 = shl i64 %tmp56, 32 ; <i64> [#uses=1]29 %tmp89 = zext i32 %tmp4 to i64 ; <i64> [#uses=1]30 %tmp10 = or i64 %tmp7, %tmp89 ; <i64> [#uses=1]31 ret i64 %tmp1032}33