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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -ppc-vsr-nums-as-vr \3; RUN: -ppc-asm-full-reg-names -global-isel -o - < %s | FileCheck %s4; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu -ppc-vsr-nums-as-vr \5; RUN: -ppc-asm-full-reg-names -mattr=-vsx -global-isel -o - < %s | \6; RUN: FileCheck %s --check-prefix=NO-VSX7 8define <16 x i8> @test_and_v16i8(<16 x i8> %a, <16 x i8> %b) {9; CHECK-LABEL: test_and_v16i8:10; CHECK: # %bb.0:11; CHECK-NEXT: xxland v2, v2, v312; CHECK-NEXT: blr13;14; NO-VSX-LABEL: test_and_v16i8:15; NO-VSX: # %bb.0:16; NO-VSX-NEXT: vand v2, v2, v317; NO-VSX-NEXT: blr18 %res = and <16 x i8> %a, %b19 ret <16 x i8> %res20}21 22define <16 x i8> @test_or_v16i8(<16 x i8> %a, <16 x i8> %b) {23; CHECK-LABEL: test_or_v16i8:24; CHECK: # %bb.0:25; CHECK-NEXT: xxlor v2, v2, v326; CHECK-NEXT: blr27;28; NO-VSX-LABEL: test_or_v16i8:29; NO-VSX: # %bb.0:30; NO-VSX-NEXT: vor v2, v2, v331; NO-VSX-NEXT: blr32 %res = or <16 x i8> %a, %b33 ret <16 x i8> %res34}35 36define <16 x i8> @test_xor_v16i8(<16 x i8> %a, <16 x i8> %b) {37; CHECK-LABEL: test_xor_v16i8:38; CHECK: # %bb.0:39; CHECK-NEXT: xxlxor v2, v2, v340; CHECK-NEXT: blr41;42; NO-VSX-LABEL: test_xor_v16i8:43; NO-VSX: # %bb.0:44; NO-VSX-NEXT: vxor v2, v2, v345; NO-VSX-NEXT: blr46 %res = xor <16 x i8> %a, %b47 ret <16 x i8> %res48}49 50define <8 x i16> @test_and_v8i16(<8 x i16> %a, <8 x i16> %b) {51; CHECK-LABEL: test_and_v8i16:52; CHECK: # %bb.0:53; CHECK-NEXT: xxland v2, v2, v354; CHECK-NEXT: blr55;56; NO-VSX-LABEL: test_and_v8i16:57; NO-VSX: # %bb.0:58; NO-VSX-NEXT: vand v2, v2, v359; NO-VSX-NEXT: blr60 %res = and <8 x i16> %a, %b61 ret <8 x i16> %res62}63 64define <8 x i16> @test_or_v8i16(<8 x i16> %a, <8 x i16> %b) {65; CHECK-LABEL: test_or_v8i16:66; CHECK: # %bb.0:67; CHECK-NEXT: xxlor v2, v2, v368; CHECK-NEXT: blr69;70; NO-VSX-LABEL: test_or_v8i16:71; NO-VSX: # %bb.0:72; NO-VSX-NEXT: vor v2, v2, v373; NO-VSX-NEXT: blr74 %res = or <8 x i16> %a, %b75 ret <8 x i16> %res76}77 78define <8 x i16> @test_xor_v8i16(<8 x i16> %a, <8 x i16> %b) {79; CHECK-LABEL: test_xor_v8i16:80; CHECK: # %bb.0:81; CHECK-NEXT: xxlxor v2, v2, v382; CHECK-NEXT: blr83;84; NO-VSX-LABEL: test_xor_v8i16:85; NO-VSX: # %bb.0:86; NO-VSX-NEXT: vxor v2, v2, v387; NO-VSX-NEXT: blr88 %res = xor <8 x i16> %a, %b89 ret <8 x i16> %res90}91 92define <4 x i32> @test_and_v4i32(<4 x i32> %a, <4 x i32> %b) {93; CHECK-LABEL: test_and_v4i32:94; CHECK: # %bb.0:95; CHECK-NEXT: xxland v2, v2, v396; CHECK-NEXT: blr97;98; NO-VSX-LABEL: test_and_v4i32:99; NO-VSX: # %bb.0:100; NO-VSX-NEXT: vand v2, v2, v3101; NO-VSX-NEXT: blr102 %res = and <4 x i32> %a, %b103 ret <4 x i32> %res104}105 106define <4 x i32> @test_or_v4i32(<4 x i32> %a, <4 x i32> %b) {107; CHECK-LABEL: test_or_v4i32:108; CHECK: # %bb.0:109; CHECK-NEXT: xxlor v2, v2, v3110; CHECK-NEXT: blr111;112; NO-VSX-LABEL: test_or_v4i32:113; NO-VSX: # %bb.0:114; NO-VSX-NEXT: vor v2, v2, v3115; NO-VSX-NEXT: blr116 %res = or <4 x i32> %a, %b117 ret <4 x i32> %res118}119 120define <4 x i32> @test_xor_v4i32(<4 x i32> %a, <4 x i32> %b) {121; CHECK-LABEL: test_xor_v4i32:122; CHECK: # %bb.0:123; CHECK-NEXT: xxlxor v2, v2, v3124; CHECK-NEXT: blr125;126; NO-VSX-LABEL: test_xor_v4i32:127; NO-VSX: # %bb.0:128; NO-VSX-NEXT: vxor v2, v2, v3129; NO-VSX-NEXT: blr130 %res = xor <4 x i32> %a, %b131 ret <4 x i32> %res132}133 134define <2 x i64> @test_and_v2i64(<2 x i64> %a, <2 x i64> %b) {135; CHECK-LABEL: test_and_v2i64:136; CHECK: # %bb.0:137; CHECK-NEXT: xxland v2, v2, v3138; CHECK-NEXT: blr139;140; NO-VSX-LABEL: test_and_v2i64:141; NO-VSX: # %bb.0:142; NO-VSX-NEXT: vand v2, v2, v3143; NO-VSX-NEXT: blr144 %res = and <2 x i64> %a, %b145 ret <2 x i64> %res146}147 148define <2 x i64> @test_or_v2i64(<2 x i64> %a, <2 x i64> %b) {149; CHECK-LABEL: test_or_v2i64:150; CHECK: # %bb.0:151; CHECK-NEXT: xxlor v2, v2, v3152; CHECK-NEXT: blr153;154; NO-VSX-LABEL: test_or_v2i64:155; NO-VSX: # %bb.0:156; NO-VSX-NEXT: vor v2, v2, v3157; NO-VSX-NEXT: blr158 %res = or <2 x i64> %a, %b159 ret <2 x i64> %res160}161 162define <2 x i64> @test_xor_v2i64(<2 x i64> %a, <2 x i64> %b) {163; CHECK-LABEL: test_xor_v2i64:164; CHECK: # %bb.0:165; CHECK-NEXT: xxlxor v2, v2, v3166; CHECK-NEXT: blr167;168; NO-VSX-LABEL: test_xor_v2i64:169; NO-VSX: # %bb.0:170; NO-VSX-NEXT: vxor v2, v2, v3171; NO-VSX-NEXT: blr172 %res = xor <2 x i64> %a, %b173 ret <2 x i64> %res174}175