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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \3; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \4; RUN: FileCheck %s --check-prefix=CHECK-LE5; RUN: llc -verify-machineinstrs -mcpu=ppc -mtriple=powerpc64-unknown-linux-gnu \6; RUN: -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \7; RUN: FileCheck %s --check-prefix=CHECK-BE8; RUN: opt --passes='sroa,loop-vectorize,loop-unroll,instcombine' -S \9; RUN: -vectorizer-maximize-bandwidth --mtriple=powerpc64le-- -mcpu=pwr10 < %s | \10; RUN: FileCheck %s --check-prefix=CHECK-OPT11 12target datalayout = "e-m:e-i64:64-n32:64-S128-v256:256:256-v512:512:512"13 14define dso_local signext i32 @test_32byte_vector() nounwind {15; CHECK-LE-LABEL: test_32byte_vector:16; CHECK-LE: # %bb.0: # %entry17; CHECK-LE-NEXT: mflr r018; CHECK-LE-NEXT: std r30, -16(r1)19; CHECK-LE-NEXT: mr r30, r120; CHECK-LE-NEXT: std r0, 16(r1)21; CHECK-LE-NEXT: clrldi r0, r1, 5922; CHECK-LE-NEXT: subfic r0, r0, -9623; CHECK-LE-NEXT: stdux r1, r1, r024; CHECK-LE-NEXT: addis r3, r2, .LCPI0_0@toc@ha25; CHECK-LE-NEXT: addi r3, r3, .LCPI0_0@toc@l26; CHECK-LE-NEXT: lxvd2x vs0, 0, r327; CHECK-LE-NEXT: addi r3, r1, 4828; CHECK-LE-NEXT: stxvd2x vs0, 0, r329; CHECK-LE-NEXT: addis r3, r2, .LCPI0_1@toc@ha30; CHECK-LE-NEXT: addi r3, r3, .LCPI0_1@toc@l31; CHECK-LE-NEXT: lxvd2x vs0, 0, r332; CHECK-LE-NEXT: addi r3, r1, 3233; CHECK-LE-NEXT: stxvd2x vs0, 0, r334; CHECK-LE-NEXT: bl test35; CHECK-LE-NEXT: nop36; CHECK-LE-NEXT: lwa r3, 32(r1)37; CHECK-LE-NEXT: mr r1, r3038; CHECK-LE-NEXT: ld r0, 16(r1)39; CHECK-LE-NEXT: ld r30, -16(r1)40; CHECK-LE-NEXT: mtlr r041; CHECK-LE-NEXT: blr42;43; CHECK-BE-LABEL: test_32byte_vector:44; CHECK-BE: # %bb.0: # %entry45; CHECK-BE-NEXT: mflr r046; CHECK-BE-NEXT: std r30, -16(r1)47; CHECK-BE-NEXT: std r0, 16(r1)48; CHECK-BE-NEXT: clrldi r0, r1, 5949; CHECK-BE-NEXT: mr r30, r150; CHECK-BE-NEXT: subfic r0, r0, -19251; CHECK-BE-NEXT: stdux r1, r1, r052; CHECK-BE-NEXT: lis r3, -819253; CHECK-BE-NEXT: li r4, 554; CHECK-BE-NEXT: lis r5, -1638455; CHECK-BE-NEXT: lis r6, -3276856; CHECK-BE-NEXT: ori r3, r3, 157; CHECK-BE-NEXT: rldic r4, r4, 32, 2958; CHECK-BE-NEXT: ori r5, r5, 159; CHECK-BE-NEXT: ori r6, r6, 160; CHECK-BE-NEXT: rldic r3, r3, 3, 2961; CHECK-BE-NEXT: ori r4, r4, 662; CHECK-BE-NEXT: rldic r5, r5, 2, 3063; CHECK-BE-NEXT: rldic r6, r6, 1, 3164; CHECK-BE-NEXT: std r3, 152(r1)65; CHECK-BE-NEXT: addi r3, r1, 12866; CHECK-BE-NEXT: std r4, 144(r1)67; CHECK-BE-NEXT: std r5, 136(r1)68; CHECK-BE-NEXT: std r6, 128(r1)69; CHECK-BE-NEXT: bl test70; CHECK-BE-NEXT: nop71; CHECK-BE-NEXT: lwa r3, 128(r1)72; CHECK-BE-NEXT: mr r1, r3073; CHECK-BE-NEXT: ld r0, 16(r1)74; CHECK-BE-NEXT: ld r30, -16(r1)75; CHECK-BE-NEXT: mtlr r076; CHECK-BE-NEXT: blr77entry:78 %a = alloca <8 x i32>, align 3279 call void @llvm.lifetime.start.p0(i64 32, ptr %a)80 store <8 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8>, ptr %a, align 3281 call void @test(ptr %a)82 %0 = load <8 x i32>, ptr %a, align 3283 %vecext = extractelement <8 x i32> %0, i32 084 call void @llvm.lifetime.end.p0(i64 32, ptr %a)85 ret i32 %vecext86}87 88define dso_local signext i32 @test_32byte_aligned_vector() nounwind {89; CHECK-LE-LABEL: test_32byte_aligned_vector:90; CHECK-LE: # %bb.0: # %entry91; CHECK-LE-NEXT: mflr r092; CHECK-LE-NEXT: std r30, -16(r1)93; CHECK-LE-NEXT: mr r30, r194; CHECK-LE-NEXT: std r0, 16(r1)95; CHECK-LE-NEXT: clrldi r0, r1, 5996; CHECK-LE-NEXT: subfic r0, r0, -6497; CHECK-LE-NEXT: stdux r1, r1, r098; CHECK-LE-NEXT: addis r3, r2, .LCPI1_0@toc@ha99; CHECK-LE-NEXT: addi r3, r3, .LCPI1_0@toc@l100; CHECK-LE-NEXT: lxvd2x vs0, 0, r3101; CHECK-LE-NEXT: addi r3, r1, 32102; CHECK-LE-NEXT: stxvd2x vs0, 0, r3103; CHECK-LE-NEXT: bl test1104; CHECK-LE-NEXT: nop105; CHECK-LE-NEXT: lwa r3, 32(r1)106; CHECK-LE-NEXT: mr r1, r30107; CHECK-LE-NEXT: ld r0, 16(r1)108; CHECK-LE-NEXT: ld r30, -16(r1)109; CHECK-LE-NEXT: mtlr r0110; CHECK-LE-NEXT: blr111;112; CHECK-BE-LABEL: test_32byte_aligned_vector:113; CHECK-BE: # %bb.0: # %entry114; CHECK-BE-NEXT: mflr r0115; CHECK-BE-NEXT: std r30, -16(r1)116; CHECK-BE-NEXT: std r0, 16(r1)117; CHECK-BE-NEXT: clrldi r0, r1, 59118; CHECK-BE-NEXT: mr r30, r1119; CHECK-BE-NEXT: subfic r0, r0, -160120; CHECK-BE-NEXT: stdux r1, r1, r0121; CHECK-BE-NEXT: lis r3, -16384122; CHECK-BE-NEXT: lis r4, -32768123; CHECK-BE-NEXT: ori r3, r3, 1124; CHECK-BE-NEXT: ori r4, r4, 1125; CHECK-BE-NEXT: rldic r3, r3, 2, 30126; CHECK-BE-NEXT: rldic r4, r4, 1, 31127; CHECK-BE-NEXT: std r3, 136(r1)128; CHECK-BE-NEXT: addi r3, r1, 128129; CHECK-BE-NEXT: std r4, 128(r1)130; CHECK-BE-NEXT: bl test1131; CHECK-BE-NEXT: nop132; CHECK-BE-NEXT: lwa r3, 128(r1)133; CHECK-BE-NEXT: mr r1, r30134; CHECK-BE-NEXT: ld r0, 16(r1)135; CHECK-BE-NEXT: ld r30, -16(r1)136; CHECK-BE-NEXT: mtlr r0137; CHECK-BE-NEXT: blr138entry:139 %a = alloca <4 x i32>, align 32140 call void @llvm.lifetime.start.p0(i64 16, ptr %a)141 store <4 x i32> <i32 1, i32 2, i32 3, i32 4>, ptr %a, align 32142 call void @test1(ptr %a)143 %0 = load <4 x i32>, ptr %a, align 32144 %vecext = extractelement <4 x i32> %0, i32 0145 call void @llvm.lifetime.end.p0(i64 16, ptr %a)146 ret i32 %vecext147}148 149 150@Arr1 = dso_local global [64 x i8] zeroinitializer, align 1151 152define dso_local void @test_Array() nounwind {153; CHECK-OPT-LABEL: @test_Array(154; CHECK-OPT-NEXT: entry:155; CHECK-OPT-NEXT: %Arr2 = alloca [64 x i16], align 2156; CHECK-OPT: store <16 x i16> [[TMP0:%.*]], ptr [[TMP0:%.*]], align 2157; CHECK-LE-LABEL: test_Array:158; CHECK-LE: # %bb.0: # %entry159; CHECK-LE-NEXT: mflr r0160; CHECK-LE-NEXT: stdu r1, -176(r1)161; CHECK-LE-NEXT: li r3, 0162; CHECK-LE-NEXT: addis r4, r2, Arr1@toc@ha163; CHECK-LE-NEXT: li r6, 65164; CHECK-LE-NEXT: std r0, 192(r1)165; CHECK-LE-NEXT: addi r5, r1, 46166; CHECK-LE-NEXT: stw r3, 44(r1)167; CHECK-LE-NEXT: addi r4, r4, Arr1@toc@l168; CHECK-LE-NEXT: mtctr r6169; CHECK-LE-NEXT: addi r4, r4, -1170; CHECK-LE-NEXT: bdz .LBB2_2171; CHECK-LE-NEXT: .p2align 5172; CHECK-LE-NEXT: .LBB2_1: # %for.body173; CHECK-LE-NEXT: #174; CHECK-LE-NEXT: lbz r6, 1(r4)175; CHECK-LE-NEXT: addi r4, r4, 1176; CHECK-LE-NEXT: addi r3, r3, 1177; CHECK-LE-NEXT: sth r6, 2(r5)178; CHECK-LE-NEXT: addi r5, r5, 2179; CHECK-LE-NEXT: bdnz .LBB2_1180; CHECK-LE-NEXT: .LBB2_2: # %for.cond.cleanup181; CHECK-LE-NEXT: addi r3, r1, 48182; CHECK-LE-NEXT: bl test_arr183; CHECK-LE-NEXT: nop184; CHECK-LE-NEXT: addi r1, r1, 176185; CHECK-LE-NEXT: ld r0, 16(r1)186; CHECK-LE-NEXT: mtlr r0187; CHECK-LE-NEXT: blr188;189; CHECK-BE-LABEL: test_Array:190; CHECK-BE: # %bb.0: # %entry191; CHECK-BE-NEXT: mflr r0192; CHECK-BE-NEXT: stdu r1, -256(r1)193; CHECK-BE-NEXT: addis r5, r2, Arr1@toc@ha194; CHECK-BE-NEXT: li r3, 0195; CHECK-BE-NEXT: addi r5, r5, Arr1@toc@l196; CHECK-BE-NEXT: std r0, 272(r1)197; CHECK-BE-NEXT: addi r4, r1, 126198; CHECK-BE-NEXT: li r6, 65199; CHECK-BE-NEXT: stw r3, 124(r1)200; CHECK-BE-NEXT: addi r5, r5, -1201; CHECK-BE-NEXT: mtctr r6202; CHECK-BE-NEXT: bdz .LBB2_2203; CHECK-BE-NEXT: .LBB2_1: # %for.body204; CHECK-BE-NEXT: #205; CHECK-BE-NEXT: lbz r6, 1(r5)206; CHECK-BE-NEXT: addi r5, r5, 1207; CHECK-BE-NEXT: addi r3, r3, 1208; CHECK-BE-NEXT: sth r6, 2(r4)209; CHECK-BE-NEXT: addi r4, r4, 2210; CHECK-BE-NEXT: bdnz .LBB2_1211; CHECK-BE-NEXT: .LBB2_2: # %for.cond.cleanup212; CHECK-BE-NEXT: addi r3, r1, 128213; CHECK-BE-NEXT: bl test_arr214; CHECK-BE-NEXT: nop215; CHECK-BE-NEXT: addi r1, r1, 256216; CHECK-BE-NEXT: ld r0, 16(r1)217; CHECK-BE-NEXT: mtlr r0218; CHECK-BE-NEXT: blr219entry:220 %Arr2 = alloca [64 x i16], align 2221 %i = alloca i32, align 4222 call void @llvm.lifetime.start.p0(i64 128, ptr %Arr2)223 call void @llvm.lifetime.start.p0(i64 4, ptr %i)224 store i32 0, ptr %i, align 4225 br label %for.cond226 227for.cond: ; preds = %for.inc, %entry228 %0 = load i32, ptr %i, align 4229 %cmp = icmp slt i32 %0, 64230 br i1 %cmp, label %for.body, label %for.cond.cleanup231 232for.cond.cleanup: ; preds = %for.cond233 call void @llvm.lifetime.end.p0(i64 4, ptr %i)234 br label %for.end235 236for.body: ; preds = %for.cond237 %1 = load i32, ptr %i, align 4238 %idxprom = sext i32 %1 to i64239 %arrayidx = getelementptr inbounds [64 x i8], ptr @Arr1, i64 0, i64 %idxprom240 %2 = load i8, ptr %arrayidx, align 1241 %conv = zext i8 %2 to i16242 %3 = load i32, ptr %i, align 4243 %idxprom1 = sext i32 %3 to i64244 %arrayidx2 = getelementptr inbounds [64 x i16], ptr %Arr2, i64 0, i64 %idxprom1245 store i16 %conv, ptr %arrayidx2, align 2246 br label %for.inc247 248for.inc: ; preds = %for.body249 %4 = load i32, ptr %i, align 4250 %inc = add nsw i32 %4, 1251 store i32 %inc, ptr %i, align 4252 br label %for.cond253 254for.end: ; preds = %for.cond.cleanup255 call void @test_arr(ptr %Arr2)256 call void @llvm.lifetime.end.p0(i64 128, ptr %Arr2)257 ret void258}259 260declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) nounwind261 262declare void @test(ptr) nounwind263declare void @test1(ptr) nounwind264declare void @test_arr(ptr)265 266declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) nounwind267