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1; RUN: llc -verify-machineinstrs -enable-misched -misched=shuffle -enable-aa-sched-mi -use-tbaa-in-sched-mi=0 -post-RA-scheduler=0 -mcpu=ppc64 < %s | FileCheck %s2 3; REQUIRES: asserts4; -misched=shuffle is NDEBUG only!5 6target datalayout = "E-m:e-i64:64-n32:64"7target triple = "powerpc64-unknown-linux-gnu"8 9%"class.llvm::MCOperand" = type { i8, %union.anon.110 }10%union.anon.110 = type { i64 }11 12define void @foo(i32 %v) {13entry:14 %MCOp = alloca %"class.llvm::MCOperand", align 815 br label %next16 17; CHECK-LABEL: @foo18 19next:20 %sunkaddr18 = ptrtoint ptr %MCOp to i6421 %sunkaddr19 = add i64 %sunkaddr18, 822 %sunkaddr20 = inttoptr i64 %sunkaddr19 to ptr23 store double 0.000000e+00, ptr %sunkaddr20, align 8, !tbaa !124 %sunkaddr21 = ptrtoint ptr %MCOp to i6425 %sunkaddr22 = add i64 %sunkaddr21, 826 %sunkaddr23 = inttoptr i64 %sunkaddr22 to ptr27 store i32 %v, ptr %sunkaddr23, align 8, !tbaa !228 ret void29 30; Make sure that the 64-bit store comes first, regardless of what TBAA says31; about the two not aliasing!32; CHECK: li [[REG:[0-9]+]], 033; CHECK: std [[REG]], -[[OFF:[0-9]+]](1)34; CHECK: stw 3, -[[OFF]](1)35; CHECK: blr36}37 38!0 = !{ !"root" }39!1 = !{ !"set1", !0 }40!2 = !{ !"set2", !0 }41 42